X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/7bc3c99e7ea67d2d67c4c7a44abcea92fa523231..42c235e7efdac01da7e7ef3e4e442557fe50198d:/armsrc/legicrf.c diff --git a/armsrc/legicrf.c b/armsrc/legicrf.c index 42e7649c..f58cb442 100644 --- a/armsrc/legicrf.c +++ b/armsrc/legicrf.c @@ -1,5 +1,6 @@ //----------------------------------------------------------------------------- // (c) 2009 Henryk Plötz +// 2016 Iceman // // This code is licensed to you under the terms of the GNU GPL, version 2 or, // at your option, any later version. See the LICENSE.txt file for the text of @@ -68,7 +69,7 @@ static void setup_timer(void) { */ // At TIMER_CLOCK3 (MCK/32) -// testing calculating in (us) microseconds. +// testing calculating in ticks. 1.5ticks = 1us #define RWD_TIME_1 120 // READER_TIME_PAUSE 20us off, 80us on = 100us 80 * 1.5 == 120ticks #define RWD_TIME_0 60 // READER_TIME_PAUSE 20us off, 40us on = 60us 40 * 1.5 == 60ticks #define RWD_TIME_PAUSE 30 // 20us == 20 * 1.5 == 30ticks */ @@ -85,12 +86,14 @@ static void setup_timer(void) { #define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz))) #ifndef SHORT_COIL -# define SHORT_COIL LOW(GPIO_SSC_DOUT); +# define SHORT_COIL LOW(GPIO_SSC_DOUT); #endif #ifndef OPEN_COIL # define OPEN_COIL HIGH(GPIO_SSC_DOUT); #endif - +#ifndef LINE_IN +# define LINE_IN AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; +#endif // Pause pulse, off in 20us / 30ticks, // ONE / ZERO bit pulse, // one == 80us / 120ticks @@ -102,7 +105,7 @@ static void setup_timer(void) { WaitTicks( (RWD_TIME_PAUSE) ); \ OPEN_COIL; \ WaitTicks((x)); \ - } while (0) + } while (0); #endif // ToDo: define a meaningful maximum size for auth_table. The bigger this is, the lower will be the available memory for traces. @@ -140,14 +143,13 @@ static void frame_clean(struct legic_frame * const f) { /* Generate Keystream */ uint32_t get_key_stream(int skip, int count) { - uint32_t key = 0; + int i; // Use int to enlarge timer tc to 32bit legic_prng_bc += prng_timer->TC_CV; // reset the prng timer. - ResetTimer(prng_timer); /* If skip == -1, forward prng time based */ if(skip == -1) { @@ -161,55 +163,37 @@ uint32_t get_key_stream(int skip, int count) { i = (count == 6) ? -1 : legic_read_count; - /* Write Time Data into LOG */ - // uint8_t *BigBuf = BigBuf_get_addr(); - // BigBuf[OFFSET_LOG+128+i] = legic_prng_count(); - // BigBuf[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff; - // BigBuf[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff; - // BigBuf[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff; - // BigBuf[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff; - // BigBuf[OFFSET_LOG+384+i] = count; - /* Generate KeyStream */ - for(i=0; iPIO_OER = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - /* Use time to crypt frame */ - if(crypt) { - legic_prng_forward(2); /* TAG_FRAME_WAIT -> shift by 2 */ - response ^= legic_prng_get_bits(bits); - } + /* TAG_FRAME_WAIT -> shift by 2 */ + legic_prng_forward(3); + response ^= legic_prng_get_bits(bits); /* Wait for the frame start */ - WaitUS( TAG_FRAME_WAIT ); - - uint8_t bit = 0; - for(int i = 0; i < bits; i++) { + WaitTicks( TAG_FRAME_WAIT ); - bit = response & 1; - response >>= 1; - - if (bit) - HIGH(GPIO_SSC_DOUT); + for (; mask < BITMASK(bits); mask <<= 1) { + if (response & mask) + OPEN_COIL else - LOW(GPIO_SSC_DOUT); - - WaitUS(100); + SHORT_COIL + WaitTicks(TAG_BIT_PERIOD); } - LOW(GPIO_SSC_DOUT); + SHORT_COIL; } /* Send a frame in reader mode, the FPGA must have been set up by @@ -217,24 +201,23 @@ void frame_send_tag(uint16_t response, uint8_t bits, uint8_t crypt) { */ void frame_sendAsReader(uint32_t data, uint8_t bits){ - uint32_t starttime = GET_TICKS, send = 0; - uint16_t mask = 1; + uint32_t starttime = GET_TICKS, send = 0, mask = 1; // xor lsfr onto data. send = data ^ legic_prng_get_bits(bits); for (; mask < BITMASK(bits); mask <<= 1) { if (send & mask) - COIL_PULSE(RWD_TIME_1); + COIL_PULSE(RWD_TIME_1) else - COIL_PULSE(RWD_TIME_0); + COIL_PULSE(RWD_TIME_0) } // Final pause to mark the end of the frame COIL_PULSE(0); // log - uint8_t cmdbytes[] = {bits, BYTEx(data, 0), BYTEx(data, 1), BYTEx(send, 0), BYTEx(send, 1)}; + uint8_t cmdbytes[] = {bits, BYTEx(data,0), BYTEx(data,1), BYTEx(data,2), BYTEx(send,0), BYTEx(send,1), BYTEx(send,2)}; LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, TRUE); } @@ -269,9 +252,6 @@ static void frame_receiveAsReader(struct legic_frame * const f, uint8_t bits) { volatile uint32_t level = 0; frame_clean(f); - - AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; - AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; // calibrate the prng. legic_prng_forward(2); @@ -280,7 +260,6 @@ static void frame_receiveAsReader(struct legic_frame * const f, uint8_t bits) { //FIXED time between sending frame and now listening frame. 330us uint32_t starttime = GET_TICKS; // its about 9+9 ticks delay from end-send to here. - //WaitTicks( 495 - 9 - 9 ); WaitTicks( 477 ); next_bit_at = GET_TICKS + TAG_BIT_PERIOD; @@ -318,19 +297,18 @@ static void frame_receiveAsReader(struct legic_frame * const f, uint8_t bits) { // Setup pm3 as a Legic Reader static uint32_t setup_phase_reader(uint8_t iv) { - // Switch on carrier and let the tag charge for 1ms + // Switch on carrier and let the tag charge for 5ms HIGH(GPIO_SSC_DOUT); - WaitUS(5000); + WaitUS(5000); ResetTicks(); - // no keystream yet legic_prng_init(0); // send IV handshake frame_sendAsReader(iv, 7); - // Now both tag and reader has same IV. Prng can start. + // tag and reader has same IV. legic_prng_init(iv); frame_receiveAsReader(¤t_frame, 6); @@ -354,20 +332,22 @@ static uint32_t setup_phase_reader(uint8_t iv) { return current_frame.data; } -static void LegicCommonInit(void) { +void LegicCommonInit(bool clear_mem) { FpgaDownloadAndGo(FPGA_BITSTREAM_HF); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX); SetAdcMuxFor(GPIO_MUXSEL_HIPKD); /* Bitbang the transmitter */ - LOW(GPIO_SSC_DOUT); + SHORT_COIL; AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - + AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; + // reserve a cardmem, meaning we can use the tracelog function in bigbuff easier. cardmem = BigBuf_get_EM_addr(); - memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE); + if ( clear_mem ) + memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE); clear_trace(); set_tracing(TRUE); @@ -378,7 +358,7 @@ static void LegicCommonInit(void) { // Switch off carrier, make sure tag is reset static void switch_off_tag_rwd(void) { - LOW(GPIO_SSC_DOUT); + SHORT_COIL; WaitUS(20); WDT_HIT(); } @@ -395,9 +375,10 @@ int legic_read_byte( uint16_t index, uint8_t cmd_sz) { uint8_t byte, crc, calcCrc = 0; uint32_t cmd = (index << 1) | LEGIC_READ; - - //WaitTicks(366); - WaitTicks(330); + + // 90ticks = 60us (should be 100us but crc calc takes time.) + //WaitTicks(330); // 330ticks prng(4) - works + WaitTicks(240); // 240ticks prng(3) - works frame_sendAsReader(cmd, cmd_sz); frame_receiveAsReader(¤t_frame, 12); @@ -408,11 +389,11 @@ int legic_read_byte( uint16_t index, uint8_t cmd_sz) { calcCrc = legic4Crc(LEGIC_READ, index, byte, cmd_sz); if( calcCrc != crc ) { - Dbprintf("!!! crc mismatch: expected %x but got %x !!!", calcCrc, crc); + Dbprintf("!!! crc mismatch: %x != %x !!!", calcCrc, crc); return -1; } - legic_prng_forward(4); + legic_prng_forward(3); return byte; } @@ -421,92 +402,84 @@ int legic_read_byte( uint16_t index, uint8_t cmd_sz) { * - wait until the tag sends back an ACK ('1' bit unencrypted) * - forward the prng based on the timing */ -//int legic_write_byte(int byte, int addr, int addr_sz, int PrngCorrection) { -int legic_write_byte(uint8_t byte, uint16_t addr, uint8_t addr_sz) { - - //do not write UID, CRC at offset 0-4. - if (addr <= 4) return 0; - - // crc - crc_clear(&legic_crc); - crc_update(&legic_crc, 0, 1); /* CMD_WRITE */ - crc_update(&legic_crc, addr, addr_sz); - crc_update(&legic_crc, byte, 8); - uint32_t crc = crc_finish(&legic_crc); - uint32_t crc2 = legic4Crc(LEGIC_WRITE, addr, byte, addr_sz+1); - if ( crc != crc2 ) { - Dbprintf("crc is missmatch"); - return 1; - } +bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) { + + bool isOK = false; + int8_t i = 40; + uint8_t edges = 0; + uint8_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd; + uint32_t steps = 0, next_bit_at, start, crc, old_level = 0; + + crc = legic4Crc(LEGIC_WRITE, index, byte, addr_sz+1); + // send write command - uint32_t cmd = ((crc <<(addr_sz+1+8)) //CRC - |(byte <<(addr_sz+1)) //Data - |(addr <<1) //Address - | LEGIC_WRITE); //CMD = Write - - uint32_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd - - legic_prng_forward(2); /* we wait anyways */ + uint32_t cmd = LEGIC_WRITE; + cmd |= index << 1; // index + cmd |= byte << (addr_sz+1); // Data + cmd |= (crc & 0xF ) << (addr_sz+1+8); // CRC - WaitTicks(330); + WaitTicks(240); frame_sendAsReader(cmd, cmd_sz); - - AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; - AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; - - // wait for ack - int t, old_level = 0, edges = 0; - int next_bit_at = 0; + + LINE_IN; - WaitUS(TAG_FRAME_WAIT); + start = GET_TICKS; - for( t = 0; t < 80; ++t) { + // ACK, - one single "1" bit after 3.6ms + // 3.6ms = 3600us * 1.5 = 5400ticks. + WaitTicks(5400); + + next_bit_at = GET_TICKS + TAG_BIT_PERIOD; + + while ( i-- ) { + WDT_HIT(); edges = 0; - next_bit_at += TAG_BIT_PERIOD; - while(timer->TC_CV < next_bit_at) { + while ( GET_TICKS < next_bit_at) { + volatile uint32_t level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - if(level != old_level) - edges++; + + if (level != old_level) + ++edges; old_level = level; } - if(edges > 20 ) { /* expected are 42 edges */ - int t = timer->TC_CV; - int c = t / TAG_BIT_PERIOD; - - ResetTimer(timer); - legic_prng_forward(c); - return 0; + + next_bit_at += TAG_BIT_PERIOD; + + // We expect 42 edges (ONE) + if(edges > 20 ) { + steps = ( (GET_TICKS - start) / TAG_BIT_PERIOD); + legic_prng_forward(steps); + isOK = true; + goto OUT; } } - - ResetTimer(timer); - return -1; + +OUT: ; + legic_prng_forward(1); + + uint8_t cmdbytes[] = {1, isOK, BYTEx(steps, 0), BYTEx(steps, 1) }; + LogTrace(cmdbytes, sizeof(cmdbytes), start, GET_TICKS, NULL, FALSE); + return isOK; } int LegicRfReader(uint16_t offset, uint16_t len, uint8_t iv) { - len &= 0x3FF; - uint16_t i = 0; uint8_t isOK = 1; legic_card_select_t card; - LegicCommonInit(); + LegicCommonInit(TRUE); if ( legic_select_card_iv(&card, iv) ) { isOK = 0; goto OUT; } - switch_off_tag_rwd(); - - if (len + offset >= card.cardsize) + if (len + offset > card.cardsize) len = card.cardsize - offset; - setup_phase_reader(iv); - LED_B_ON(); while (i < len) { int r = legic_read_byte(offset + i, card.cmdsize); @@ -524,189 +497,49 @@ OUT: WDT_HIT(); switch_off_tag_rwd(); LEDsoff(); - cmd_send(CMD_ACK,isOK,len,0,cardmem,len); + cmd_send(CMD_ACK, isOK, len, 0, cardmem, len); return 0; } -/*int _LegicRfWriter(int offset, int bytes, int addr_sz, uint8_t *BigBuf, int RoundBruteforceValue) { - int byte_index=0; - - LED_B_ON(); - setup_phase_reader(iv); - //legic_prng_forward(2); - while(byte_index < bytes) { - int r; - - //check if the DCF should be changed - if ( (offset == 0x05) && (bytes == 0x02) ) { - //write DCF in reverse order (addr 0x06 before 0x05) - r = legic_write_byte(BigBuf[(0x06-byte_index)], (0x06-byte_index), addr_sz, RoundBruteforceValue); - //legic_prng_forward(1); - if(r == 0) { - byte_index++; - r = legic_write_byte(BigBuf[(0x06-byte_index)], (0x06-byte_index), addr_sz, RoundBruteforceValue); - } - //legic_prng_forward(1); - } - else { - r = legic_write_byte(BigBuf[byte_index+offset], byte_index+offset, addr_sz, RoundBruteforceValue); - } - if((r != 0) || BUTTON_PRESS()) { - Dbprintf("operation aborted @ 0x%03.3x", byte_index); - switch_off_tag_rwd(); - LED_B_OFF(); - LED_C_OFF(); - return -1; - } +void LegicRfWriter(uint16_t offset, uint16_t len, uint8_t iv, uint8_t *data) { - WDT_HIT(); - byte_index++; - if(byte_index & 0x10) LED_C_ON(); else LED_C_OFF(); - } - LED_B_OFF(); - LED_C_OFF(); - DbpString("write successful"); - return 0; -}*/ - -void LegicRfWriter(uint16_t offset, uint16_t bytes, uint8_t iv) { - - int byte_index = 0; - uint8_t isOK = 1; + #define LOWERLIMIT 4 + uint8_t isOK = 1, msg = 0; legic_card_select_t card; - LegicCommonInit(); - - if ( legic_select_card_iv(&card, iv) ) { + // uid NOT is writeable. + if ( offset <= LOWERLIMIT ) { isOK = 0; goto OUT; } - switch_off_tag_rwd(); + LegicCommonInit(TRUE); - switch(card.tagtype) { - case 0x0d: - if(offset+bytes > 22) { - Dbprintf("Error: can not write to 0x%03.3x on MIM22", offset + bytes); - return; - } - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset + bytes); - break; - case 0x1d: - if(offset+bytes > 0x100) { - Dbprintf("Error: can not write to 0x%03.3x on MIM256", offset + bytes); - return; - } - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset + bytes); - break; - case 0x3d: - if(offset+bytes > 0x400) { - Dbprintf("Error: can not write to 0x%03.3x on MIM1024", offset + bytes); - return; - } - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset + bytes); - break; - default: - return; + if ( legic_select_card_iv(&card, iv) ) { + isOK = 0; + msg = 1; + goto OUT; } - - LED_B_ON(); - setup_phase_reader(iv); - int r = 0; - while(byte_index < bytes) { - - //check if the DCF should be changed - if ( ((byte_index+offset) == 0x05) && (bytes >= 0x02) ) { - //write DCF in reverse order (addr 0x06 before 0x05) - r = legic_write_byte(cardmem[(0x06-byte_index)], (0x06-byte_index), card.addrsize); - - // write second byte on success - if(r == 0) { - byte_index++; - r = legic_write_byte(cardmem[(0x06-byte_index)], (0x06-byte_index), card.addrsize); - } - } - else { - r = legic_write_byte(cardmem[byte_index+offset], byte_index+offset, card.addrsize); - } - - if ((r != 0) || BUTTON_PRESS()) { - Dbprintf("operation aborted @ 0x%03.3x", byte_index); + if ( len + offset > card.cardsize) + len = card.cardsize - offset; + + LED_B_ON(); + while( len > 0 ) { + --len; + if ( !legic_write_byte( len + offset, data[len], card.addrsize) ) { + Dbprintf("operation failed | %02X | %02X | %02X", len + offset, len, data[len] ); isOK = 0; goto OUT; } - - WDT_HIT(); - byte_index++; + WDT_HIT(); } - OUT: - cmd_send(CMD_ACK, isOK, 0,0,0,0); + cmd_send(CMD_ACK, isOK, msg,0,0,0); switch_off_tag_rwd(); LEDsoff(); } -void LegicRfRawWriter(int address, int byte, uint8_t iv) { - - int byte_index = 0, addr_sz = 0; - - LegicCommonInit(); - - if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card"); - - uint32_t tag_type = setup_phase_reader(iv); - - switch_off_tag_rwd(); - - switch(tag_type) { - case 0x0d: - if(address > 22) { - Dbprintf("Error: can not write to 0x%03.3x on MIM22", address); - return; - } - addr_sz = 5; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte); - break; - case 0x1d: - if(address > 0x100) { - Dbprintf("Error: can not write to 0x%03.3x on MIM256", address); - return; - } - addr_sz = 8; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte); - break; - case 0x3d: - if(address > 0x400) { - Dbprintf("Error: can not write to 0x%03.3x on MIM1024", address); - return; - } - addr_sz = 10; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing at addr 0x%03.3x - value 0x%03.3x ...", address, byte); - break; - default: - Dbprintf("No or unknown card found, aborting"); - return; - } - - Dbprintf("integer value: %d address: %d addr_sz: %d", byte, address, addr_sz); - LED_B_ON(); - - setup_phase_reader(iv); - - int r = legic_write_byte(byte, address, addr_sz); - - if((r != 0) || BUTTON_PRESS()) { - Dbprintf("operation aborted @ 0x%03.3x (%1d)", byte_index, r); - switch_off_tag_rwd(); - LEDsoff(); - return; - } - - LEDsoff(); - if ( MF_DBGLEVEL >= 1) DbpString("write successful"); -} - int legic_select_card_iv(legic_card_select_t *p_card, uint8_t iv){ if ( p_card == NULL ) return 1; @@ -741,12 +574,46 @@ int legic_select_card(legic_card_select_t *p_card){ return legic_select_card_iv(p_card, 0x01); } +//----------------------------------------------------------------------------- +// Work with emulator memory +// +// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not +// involved in dealing with emulator memory. But if it is called later, it might +// destroy the Emulator Memory. +//----------------------------------------------------------------------------- +// arg0 = offset +// arg1 = num of bytes +void LegicEMemSet(uint32_t arg0, uint32_t arg1, uint8_t *data) { + FpgaDownloadAndGo(FPGA_BITSTREAM_HF); + legic_emlset_mem(data, arg0, arg1); +} +// arg0 = offset +// arg1 = num of bytes +void LegicEMemGet(uint32_t arg0, uint32_t arg1) { + FpgaDownloadAndGo(FPGA_BITSTREAM_HF); + uint8_t buf[USB_CMD_DATA_SIZE] = {0x00}; + legic_emlget_mem(buf, arg0, arg1); + LED_B_ON(); + cmd_send(CMD_ACK, arg0, arg1, 0, buf, USB_CMD_DATA_SIZE); + LED_B_OFF(); +} +void legic_emlset_mem(uint8_t *data, int offset, int numofbytes) { + cardmem = BigBuf_get_EM_addr(); + memcpy(cardmem + offset, data, numofbytes); +} +void legic_emlget_mem(uint8_t *data, int offset, int numofbytes) { + cardmem = BigBuf_get_EM_addr(); + memcpy(data, cardmem + offset, numofbytes); +} + void LegicRfInfo(void){ + int r; + uint8_t buf[sizeof(legic_card_select_t)] = {0x00}; legic_card_select_t *card = (legic_card_select_t*) buf; - LegicCommonInit(); + LegicCommonInit(FALSE); if ( legic_select_card(card) ) { cmd_send(CMD_ACK,0,0,0,0,0); @@ -755,7 +622,7 @@ void LegicRfInfo(void){ // read UID bytes for ( uint8_t i = 0; i < sizeof(card->uid); ++i) { - int r = legic_read_byte(i, card->cmdsize); + r = legic_read_byte(i, card->cmdsize); if ( r == -1 ) { cmd_send(CMD_ACK,0,0,0,0,0); goto OUT; @@ -763,8 +630,17 @@ void LegicRfInfo(void){ card->uid[i] = r & 0xFF; } - cmd_send(CMD_ACK, 1, 0, 0, buf, sizeof(legic_card_select_t)); + // MCC byte. + r = legic_read_byte(4, card->cmdsize); + uint32_t calc_mcc = CRC8Legic(card->uid, 4);; + if ( r != calc_mcc) { + cmd_send(CMD_ACK,0,0,0,0,0); + goto OUT; + } + // OK + cmd_send(CMD_ACK, 1, 0, 0, buf, sizeof(legic_card_select_t)); + OUT: switch_off_tag_rwd(); LEDsoff(); @@ -775,38 +651,50 @@ OUT: */ static void frame_handle_tag(struct legic_frame const * const f) { - uint8_t *BigBuf = BigBuf_get_addr(); + // log + //uint8_t cmdbytes[] = {bits, BYTEx(data, 0), BYTEx(data, 1)}; + //LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, FALSE); + //Dbprintf("ICE: enter frame_handle_tag: %02x ", f->bits); + + /* First Part of Handshake (IV) */ + if(f->bits == 7) { - /* First Part of Handshake (IV) */ - if(f->bits == 7) { + LED_C_ON(); - LED_C_ON(); - // Reset prng timer - ResetTimer(prng_timer); + //ResetTimer(prng_timer); + ResetTicks(); + + // IV from reader. + legic_prng_init(f->data); - legic_prng_init(f->data); - frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1B */ - legic_state = STATE_IV; - legic_read_count = 0; - legic_prng_bc = 0; - legic_prng_iv = f->data; - - - ResetTimer(timer); - WaitUS(280); - return; - } + Dbprintf("ICE: IV: %02x ", f->data); + + // We should have three tagtypes with three different answers. + legic_prng_forward(2); + //frame_send_tag(0x3d, 6); /* MIM1024 0x3d^0x26 = 0x1B */ + frame_send_tag(0x1d, 6); // MIM256 + + legic_state = STATE_IV; + legic_read_count = 0; + legic_prng_bc = 0; + legic_prng_iv = f->data; + + //ResetTimer(timer); + //WaitUS(280); + WaitTicks(388); + return; + } /* 0x19==??? */ if(legic_state == STATE_IV) { - int local_key = get_key_stream(3, 6); + uint32_t local_key = get_key_stream(3, 6); int xored = 0x39 ^ local_key; if((f->bits == 6) && (f->data == xored)) { legic_state = STATE_CON; ResetTimer(timer); - WaitUS(200); + WaitTicks(300); return; } else { @@ -820,64 +708,53 @@ static void frame_handle_tag(struct legic_frame const * const f) /* Read */ if(f->bits == 11) { if(legic_state == STATE_CON) { - int key = get_key_stream(2, 11); //legic_phase_drift, 11); - int addr = f->data ^ key; addr = addr >> 1; - int data = BigBuf[addr]; - int hash = legic4Crc(LEGIC_READ, addr, data, 11) << 8; - BigBuf[OFFSET_LOG+legic_read_count] = (uint8_t)addr; - legic_read_count++; - - //Dbprintf("Data:%03.3x, key:%03.3x, addr: %03.3x, read_c:%u", f->data, key, addr, read_c); - legic_prng_forward(legic_reqresp_drift); - - frame_send_tag(hash | data, 12, 1); - - ResetTimer(timer); + uint32_t key = get_key_stream(2, 11); //legic_phase_drift, 11); + uint16_t addr = f->data ^ key; + addr >>= 1; + uint8_t data = cardmem[addr]; + + uint32_t crc = legic4Crc(LEGIC_READ, addr, data, 11) << 8; + + //legic_read_count++; + //legic_prng_forward(legic_reqresp_drift); + + frame_send_tag(crc | data, 12); + //ResetTimer(timer); legic_prng_forward(2); - WaitUS(180); + WaitTicks(330); return; } } /* Write */ - if(f->bits == 23) { - int key = get_key_stream(-1, 23); //legic_frame_drift, 23); - int addr = f->data ^ key; addr = addr >> 1; addr = addr & 0x3ff; - int data = f->data ^ key; data = data >> 11; data = data & 0xff; - + if (f->bits == 23 || f->bits == 21 ) { + uint32_t key = get_key_stream(-1, 23); //legic_frame_drift, 23); + uint16_t addr = f->data ^ key; + addr >>= 1; + addr &= 0x3ff; + uint32_t data = f->data ^ key; + data >>= 11; + data &= 0xff; + + cardmem[addr] = data; /* write command */ legic_state = STATE_DISCON; LED_C_OFF(); Dbprintf("write - addr: %x, data: %x", addr, data); + // should send a ACK after 3.6ms return; } if(legic_state != STATE_DISCON) { Dbprintf("Unexpected: sz:%u, Data:%03.3x, State:%u, Count:%u", f->bits, f->data, legic_state, legic_read_count); - int i; Dbprintf("IV: %03.3x", legic_prng_iv); - for(i = 0; i 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); + // return; + // } + //StartCountSspClk(); /* Bitbang the receiver */ AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; - //setup_timer(); + // need a way to determine which tagtype we are simulating + + // hook up emulator memory + cardmem = BigBuf_get_EM_addr(); + + clear_trace(); + set_tracing(TRUE); + crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0); - int old_level = 0; - int active = 0; - legic_state = STATE_DISCON; + StartTicks(); LED_B_ON(); DbpString("Starting Legic emulator, press button to end"); - + + /* + * The mode FPGA_HF_SIMULATOR_MODULATE_212K works like this. + * - A 1-bit input to the FPGA becomes 8 pulses on 212kHz (fc/64) (18.88us). + * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us + * + * In this mode the SOF can be written as 00011101 = 0x1D + * The EOF can be written as 10111000 = 0xb8 + * A logic 1 is 01 + * A logic 0 is 10 + volatile uint8_t b; + uint8_t i = 0; + while( !BUTTON_PRESS() ) { + WDT_HIT(); + + // not sending anything. + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x00; + } + + // receive + if ( AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY ) { + b = (uint8_t) AT91C_BASE_SSC->SSC_RHR; + bd[i] = b; + ++i; + // if(OutOfNDecoding(b & 0x0f)) + // *len = Uart.byteCnt; + } + + } + */ + while(!BUTTON_PRESS() && !usb_poll_validate_length()) { - int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - int time = timer->TC_CV; + + level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - if(level != old_level) { - if(level == 1) { - timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; - + uint32_t time = GET_TICKS; + + if (level != old_level) { + if (level == 1) { + + //Dbprintf("start, %u ", time); + StartTicks(); + // did we get a signal if (FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) { - /* 1 bit */ + // 1 bit emit(1); active = 1; LED_A_ON(); } else if (FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) { - /* 0 bit */ + // 0 bit emit(0); active = 1; LED_A_ON(); } else if (active) { - /* invalid */ + // invalid emit(-1); active = 0; LED_A_OFF(); @@ -967,24 +904,36 @@ void LegicRfSimulate(int phase, int frame, int reqresp) } } + /* Frame end */ - if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) { + if(time >= (RWD_TIME_1 + RWD_TIME_FUZZ) && active) { emit(-1); active = 0; LED_A_OFF(); } - if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) { - timer->TC_CCR = AT91C_TC_CLKDIS; - } + /* + * Disable the counter, Then wait for the clock to acknowledge the + * shutdown in its status register. Reading the SR has the + * side-effect of clearing any pending state in there. + */ + //if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) + if(time >= (20 * RWD_TIME_1) ) + StopTicks(); old_level = level; WDT_HIT(); - } - if ( MF_DBGLEVEL >= 1) DbpString("Stopped"); +} + + WDT_HIT(); + DbpString("LEGIC Prime emulator stopped"); + switch_off_tag_rwd(); + FpgaDisableSscDma(); LEDsoff(); + cmd_send(CMD_ACK, 1, 0, 0, 0, 0); } + //----------------------------------------------------------------------------- // Code up a string of octets at layer 2 (including CRC, we don't generate // that here) so that they can be transmitted to the reader. Doesn't transmit