X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/7bc95e2e43c0b00b72fc794b18c26a880ac19d1c..1c4b102cd55d96d6a870f7f2153199b9e721e077:/armsrc/util.c?ds=sidebyside diff --git a/armsrc/util.c b/armsrc/util.c index 6d34ae5e..5b68f513 100644 --- a/armsrc/util.c +++ b/armsrc/util.c @@ -225,29 +225,29 @@ void FormatVersionInformation(char *dst, int len, const char *prefix, void *vers { struct version_information *v = (struct version_information*)version_information; dst[0] = 0; - strncat(dst, prefix, len); + strncat(dst, prefix, len-1); if(v->magic != VERSION_INFORMATION_MAGIC) { - strncat(dst, "Missing/Invalid version information", len); + strncat(dst, "Missing/Invalid version information", len - strlen(dst) - 1); return; } if(v->versionversion != 1) { - strncat(dst, "Version information not understood", len); + strncat(dst, "Version information not understood", len - strlen(dst) - 1); return; } if(!v->present) { - strncat(dst, "Version information not available", len); + strncat(dst, "Version information not available", len - strlen(dst) - 1); return; } - strncat(dst, v->svnversion, len); + strncat(dst, v->gitversion, len - strlen(dst) - 1); if(v->clean == 0) { - strncat(dst, "-unclean", len); + strncat(dst, "-unclean", len - strlen(dst) - 1); } else if(v->clean == 2) { - strncat(dst, "-suspect", len); + strncat(dst, "-suspect", len - strlen(dst) - 1); } - strncat(dst, " ", len); - strncat(dst, v->buildtime, len); + strncat(dst, " ", len - strlen(dst) - 1); + strncat(dst, v->buildtime, len - strlen(dst) - 1); } // ------------------------------------------------------------------------- @@ -363,8 +363,6 @@ void StartCountSspClk() // while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME)); // wait for ssp_frame to go high (start of frame) while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME); // wait for ssp_frame to be low - // after the falling edge of ssp_frame, there is delay of 1/13,56MHz (73ns) until the next rising edge of ssp_clk. This are only a few - // processor cycles. We therefore may or may not be able to sync on this edge. Therefore better make sure that we miss it: while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)); // wait for ssp_clk to go high // note: up to now two ssp_clk rising edges have passed since the rising edge of ssp_frame // it is now safe to assert a sync signal. This sets all timers to 0 on next active clock edge