X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/902cb3c00b49535f0de9a3b6d5ba0c54260ccac1..046f3dfa7c818ef45815d37abf2407cafacde961:/armsrc/fpgaloader.c?ds=inline

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index e3784bf5..d63310a3 100644
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -115,11 +115,11 @@ void FpgaSetupSsc(void)
 	AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(1) | SSC_CLOCK_MODE_START(1);
 
 	// 8 bits per transfer, no loopback, MSB first, 1 transfer per sync
-	// pulse, no output sync, start on positive-going edge of sync
+	// pulse, no output sync
 	AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) |	AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
 
 	// clock comes from TK pin, no clock output, outputs change on falling
-	// edge of TK, start on rising edge of TF
+	// edge of TK, sample on rising edge of TK, start on positive-going edge of sync
 	AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) |	SSC_CLOCK_MODE_START(5);
 
 	// tx framing is the same as the rx framing
@@ -140,12 +140,12 @@ bool FpgaSetupSscDma(uint8_t *buf, int len)
         return false;
     }
 
-	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
-	AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;
-	AT91C_BASE_PDC_SSC->PDC_RCR = len;
-	AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;
-	AT91C_BASE_PDC_SSC->PDC_RNCR = len;
-	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
+	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;	// Disable DMA Transfer
+	AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;		// transfer to this memory address
+	AT91C_BASE_PDC_SSC->PDC_RCR = len;					// transfer this many bytes
+	AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;		// next transfer to same memory address
+	AT91C_BASE_PDC_SSC->PDC_RNCR = len;					// ... with same number of bytes
+	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;		// go!
     
     return true;
 }