X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/d8af608f8e4e6dc520045bac69e8e9dac6de7d42..e3f9c50d81680809c6cdb821dee419a666ecd2c3:/armsrc/iso14443b.c diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c index 2bdce7cb..72c71964 100644 --- a/armsrc/iso14443b.c +++ b/armsrc/iso14443b.c @@ -13,13 +13,11 @@ #include "apps.h" #include "util.h" #include "string.h" - #include "iso14443crc.h" - -#define RECEIVE_SAMPLES_TIMEOUT 0x0004FFFF +#include "common.h" +#define RECEIVE_SAMPLES_TIMEOUT 20000 #define ISO14443B_DMA_BUFFER_SIZE 256 -uint8_t PowerOn = TRUE; // PCB Block number for APDUs static uint8_t pcb_blocknum = 0; @@ -31,6 +29,88 @@ static uint8_t pcb_blocknum = 0; // a response. //============================================================================= + +//----------------------------------------------------------------------------- +// The software UART that receives commands from the reader, and its state +// variables. +//----------------------------------------------------------------------------- +static struct { + enum { + STATE_UNSYNCD, + STATE_GOT_FALLING_EDGE_OF_SOF, + STATE_AWAITING_START_BIT, + STATE_RECEIVING_DATA + } state; + uint16_t shiftReg; + int bitCnt; + int byteCnt; + int byteCntMax; + int posCnt; + uint8_t *output; +} Uart; + +static void UartReset() +{ + Uart.byteCntMax = MAX_FRAME_SIZE; + Uart.state = STATE_UNSYNCD; + Uart.byteCnt = 0; + Uart.bitCnt = 0; + Uart.posCnt = 0; + memset(Uart.output, 0x00, MAX_FRAME_SIZE); +} + +static void UartInit(uint8_t *data) +{ + Uart.output = data; + UartReset(); +} + + +static struct { + enum { + DEMOD_UNSYNCD, + DEMOD_PHASE_REF_TRAINING, + DEMOD_AWAITING_FALLING_EDGE_OF_SOF, + DEMOD_GOT_FALLING_EDGE_OF_SOF, + DEMOD_AWAITING_START_BIT, + DEMOD_RECEIVING_DATA + } state; + int bitCount; + int posCount; + int thisBit; +/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. + int metric; + int metricN; +*/ + uint16_t shiftReg; + uint8_t *output; + int len; + int sumI; + int sumQ; +} Demod; + +static void DemodReset() +{ + // Clear out the state of the "UART" that receives from the tag. + Demod.len = 0; + Demod.state = DEMOD_UNSYNCD; + Demod.posCount = 0; + Demod.sumI = 0; + Demod.sumQ = 0; + Demod.bitCount = 0; + Demod.thisBit = 0; + Demod.shiftReg = 0; + memset(Demod.output, 0x00, MAX_FRAME_SIZE); +} + + +static void DemodInit(uint8_t *data) +{ + Demod.output = data; + DemodReset(); +} + + //----------------------------------------------------------------------------- // Code up a string of octets at layer 2 (including CRC, we don't generate // that here) so that they can be transmitted to the reader. Doesn't transmit @@ -118,24 +198,7 @@ static void CodeIso14443bAsTag(const uint8_t *cmd, int len) ToSendMax++; } -//----------------------------------------------------------------------------- -// The software UART that receives commands from the reader, and its state -// variables. -//----------------------------------------------------------------------------- -static struct { - enum { - STATE_UNSYNCD, - STATE_GOT_FALLING_EDGE_OF_SOF, - STATE_AWAITING_START_BIT, - STATE_RECEIVING_DATA - } state; - uint16_t shiftReg; - int bitCnt; - int byteCnt; - int byteCntMax; - int posCnt; - uint8_t *output; -} Uart; + /* Receive & handle a bit coming from the reader. * @@ -263,24 +326,6 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) return FALSE; } - -static void UartReset() -{ - Uart.byteCntMax = MAX_FRAME_SIZE; - Uart.state = STATE_UNSYNCD; - Uart.byteCnt = 0; - Uart.bitCnt = 0; - memset(Uart.output, 0x00, MAX_FRAME_SIZE); -} - - -static void UartInit(uint8_t *data) -{ - Uart.output = data; - UartReset(); -} - - //----------------------------------------------------------------------------- // Receive a command (from the reader to us, where we are the simulated tag), // and store it in the given buffer, up to the given maximum length. Keeps @@ -345,7 +390,7 @@ void SimulateIso14443bTag(void) // response to HLTB and ATTRIB static const uint8_t response2[] = {0x00, 0x78, 0xF0}; - uint8_t parity[MAX_PARITY_SIZE]; + //uint8_t parity[MAX_PARITY_SIZE] = {0x00}; FpgaDownloadAndGo(FPGA_BITSTREAM_HF); @@ -357,7 +402,8 @@ void SimulateIso14443bTag(void) uint16_t respLen, respCodeLen; // allocate command receive buffer - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); + uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); uint16_t len; @@ -383,14 +429,15 @@ void SimulateIso14443bTag(void) for(;;) { - if(!GetIso14443bCommandFromReader(receivedCmd, &len)) { - Dbprintf("button pressed, received %d commands", cmdsRecvd); - break; + if (!GetIso14443bCommandFromReader(receivedCmd, &len)) { + Dbprintf("button pressed, received %d commands", cmdsRecvd); + break; } - if (tracing) { - LogTrace(receivedCmd, len, 0, 0, parity, TRUE); - } + if (tracing) + //LogTrace(receivedCmd, len, 0, 0, parity, TRUE); + LogTrace(receivedCmd, len, 0, 0, NULL, TRUE); + // Good, look at the command now. if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) @@ -410,14 +457,14 @@ void SimulateIso14443bTag(void) // And print whether the CRC fails, just for good measure uint8_t b1, b2; if (len >= 3){ // if crc exists - ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); - if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { - // Not so good, try again. - DbpString("+++CRC fail"); - - } else { - DbpString("CRC passes"); - } + ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); + if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { + // Not so good, try again. + DbpString("+++CRC fail"); + + } else { + DbpString("CRC passes"); + } } //get rid of compiler warning respCodeLen = 0; @@ -444,41 +491,30 @@ void SimulateIso14443bTag(void) AT91C_BASE_SSC->SSC_THR = 0xff; FpgaSetupSsc(); - uint8_t c; - // clear receiving shift register and holding register - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - - // Clear TXRDY: - AT91C_BASE_SSC->SSC_THR = 0x00; - // Transmit the response. - uint16_t FpgaSendQueueDelay = 0; uint16_t i = 0; - for(;i < respCodeLen; ) { - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = respCode[i++]; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - } - if(BUTTON_PRESS()) break; - } - - // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: - uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; - for (i = 0; i <= fpga_queued_bits/8 + 1; ) { + for(;;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = 0x00; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + uint8_t b = respCode[i]; + + AT91C_BASE_SSC->SSC_THR = b; + i++; + if(i > respCodeLen) { + break; + } + } + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + (void)b; } } // trace the response: - if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE); + if (tracing) + //LogTrace(resp, respLen, 0, 0, parity, FALSE); + LogTrace(resp, respLen, 0, 0, NULL, FALSE); } - FpgaDisableSscDma(); } //============================================================================= @@ -488,29 +524,6 @@ void SimulateIso14443bTag(void) // PC side. //============================================================================= -static struct { - enum { - DEMOD_UNSYNCD, - DEMOD_PHASE_REF_TRAINING, - DEMOD_AWAITING_FALLING_EDGE_OF_SOF, - DEMOD_GOT_FALLING_EDGE_OF_SOF, - DEMOD_AWAITING_START_BIT, - DEMOD_RECEIVING_DATA - } state; - int bitCount; - int posCount; - int thisBit; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - int metric; - int metricN; -*/ - uint16_t shiftReg; - uint8_t *output; - int len; - int sumI; - int sumQ; -} Demod; - /* * Handles reception of a bit from the tag * @@ -525,10 +538,13 @@ static struct { * false if we are still waiting for some more * */ +#ifndef SUBCARRIER_DETECT_THRESHOLD +# define SUBCARRIER_DETECT_THRESHOLD 6 +#endif + static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) { - int v; - + int v = 0; // The soft decision on the bit uses an estimate of just the // quadrant of the reference angle, not the exact angle. #define MAKE_SOFT_DECISION() { \ @@ -544,8 +560,6 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } \ } -#define SUBCARRIER_DETECT_THRESHOLD 8 - // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) /* #define CHECK_FOR_SUBCARRIER() { \ v = ci; \ @@ -555,7 +569,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } else { \ v -= cq; \ } \ - } + } */ // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) #define CHECK_FOR_SUBCARRIER() { \ @@ -589,11 +603,15 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } \ } \ } - + + switch(Demod.state) { case DEMOD_UNSYNCD: + CHECK_FOR_SUBCARRIER(); - if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected + + // subcarrier detected + if(v > SUBCARRIER_DETECT_THRESHOLD) { Demod.state = DEMOD_PHASE_REF_TRAINING; Demod.sumI = ci; Demod.sumQ = cq; @@ -602,15 +620,18 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_PHASE_REF_TRAINING: - if(Demod.posCount < 10*2) { + if(Demod.posCount < 8) { + CHECK_FOR_SUBCARRIER(); + if (v > SUBCARRIER_DETECT_THRESHOLD) { // set the reference phase (will code a logic '1') by averaging over 32 1/fs. // note: synchronization time > 80 1/fs Demod.sumI += ci; Demod.sumQ += cq; - Demod.posCount++; - } else { // subcarrier lost + ++Demod.posCount; + } else { + // subcarrier lost Demod.state = DEMOD_UNSYNCD; } } else { @@ -619,37 +640,38 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: + MAKE_SOFT_DECISION(); + + //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq ); if(v < 0) { // logic '0' detected Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; Demod.posCount = 0; // start of SOF sequence } else { - //if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs - if(Demod.posCount > 25*2) { // maximum length of TR1 = 200 1/fs - Demod.state = DEMOD_UNSYNCD; - } + // maximum length of TR1 = 200 1/fs + if(Demod.posCount > 25*2) Demod.state = DEMOD_UNSYNCD; } - Demod.posCount++; + ++Demod.posCount; break; case DEMOD_GOT_FALLING_EDGE_OF_SOF: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); + if(v > 0) { - if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + if(Demod.posCount < 9*2) { Demod.state = DEMOD_UNSYNCD; } else { LED_C_ON(); // Got SOF Demod.state = DEMOD_AWAITING_START_BIT; Demod.posCount = 0; Demod.len = 0; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - Demod.metricN = 0; - Demod.metric = 0; -*/ } } else { - if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu) + // low phase of SOF too long (> 12 etu) + if (Demod.posCount > 12*2) { Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); } @@ -657,9 +679,11 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_START_BIT: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); - if(v > 0) { + + if (v > 0) { if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); @@ -674,42 +698,39 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_RECEIVING_DATA: + MAKE_SOFT_DECISION(); - if(Demod.posCount == 0) { // first half of bit + + if (Demod.posCount == 0) { + // first half of bit Demod.thisBit = v; Demod.posCount = 1; - } else { // second half of bit + } else { + // second half of bit Demod.thisBit += v; - -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - if(Demod.thisBit > 0) { - Demod.metric += Demod.thisBit; - } else { - Demod.metric -= Demod.thisBit; - } - (Demod.metricN)++; -*/ - Demod.shiftReg >>= 1; - if(Demod.thisBit > 0) { // logic '1' - Demod.shiftReg |= 0x200; - } - Demod.bitCount++; + // logic '1' + if(Demod.thisBit > 0) Demod.shiftReg |= 0x200; + + ++Demod.bitCount; + if(Demod.bitCount == 10) { + uint16_t s = Demod.shiftReg; - if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' + + // stop bit == '1', start bit == '0' + if((s & 0x200) && !(s & 0x001)) { uint8_t b = (s >> 1); Demod.output[Demod.len] = b; - Demod.len++; + ++Demod.len; Demod.state = DEMOD_AWAITING_START_BIT; } else { Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); - if(s == 0x000) { - // This is EOF (start, stop and all data bits == '0' - return TRUE; - } + + // This is EOF (start, stop and all data bits == '0' + if(s == 0) return TRUE; } } Demod.posCount = 0; @@ -725,23 +746,6 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } -static void DemodReset() -{ - // Clear out the state of the "UART" that receives from the tag. - Demod.len = 0; - Demod.state = DEMOD_UNSYNCD; - Demod.posCount = 0; - memset(Demod.output, 0x00, MAX_FRAME_SIZE); -} - - -static void DemodInit(uint8_t *data) -{ - Demod.output = data; - DemodReset(); -} - - /* * Demodulate the samples we received from the tag, also log to tracebuffer * quiet: set to 'TRUE' to disable debug output @@ -756,29 +760,24 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) // free all previous allocations first BigBuf_free(); - // And put the FPGA in the appropriate mode - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); - // The response (tag -> reader) that we're receiving. - uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE); - // Set up the demodulator for tag -> reader responses. - DemodInit(resp); + DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); // The DMA buffer, used to stream samples from the FPGA int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); - + // And put the FPGA in the appropriate mode + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); + + // Setup and start DMA. + FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); + int8_t *upTo = dmaBuf; lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; // Signal field is ON with the appropriate LED: LED_D_ON(); - - // Setup and start DMA. - FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); - - for(;;) { int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; if(behindBy > max) max = behindBy; @@ -793,30 +792,32 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; } lastRxCounter -= 2; - if(lastRxCounter <= 0) { + + if(lastRxCounter <= 0) lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; - } samples += 2; - if(Handle14443bSamplesDemod(ci | 0x01 , cq | 0x01)) { - gotFrame = TRUE; + // + gotFrame = Handle14443bSamplesDemod(ci , cq ); + if ( gotFrame ) break; } - } if(samples > n || gotFrame) { break; } } + //disable AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; - if (!quiet && Demod.len == 0) { - Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", + if (!quiet) { + Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.state = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, - gotFrame, + (gotFrame) ? "true" : "false", + Demod.state, Demod.len, Demod.sumI, Demod.sumQ @@ -824,10 +825,8 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) } //Tracing - if (tracing && Demod.len > 0) { - uint8_t parity[MAX_PARITY_SIZE]; - LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); - } + if (Demod.len > 0) + LogTrace(Demod.output, Demod.len, 0, 0, NULL, FALSE); } @@ -837,31 +836,25 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) static void TransmitFor14443b(void) { int c; - + volatile uint32_t r; FpgaSetupSsc(); - - // Start the timer - StartCountSspClk(); - while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) AT91C_BASE_SSC->SSC_THR = 0xff; - } // Signal field is ON with the appropriate Red LED LED_D_ON(); // Signal we are transmitting with the Green LED LED_B_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); - if ( !PowerOn ) - SpinDelay(200); for(c = 0; c < 10;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { AT91C_BASE_SSC->SSC_THR = 0xff; - c++; + ++c; } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; + r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -871,13 +864,12 @@ static void TransmitFor14443b(void) for(;;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { AT91C_BASE_SSC->SSC_THR = ToSend[c]; - c++; - if(c >= ToSendMax) { + ++c; + if(c >= ToSendMax) break; - } } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; + r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -898,13 +890,12 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) ToSendReset(); // Establish initial reference level - for(i = 0; i < 80; i++) { + for(i = 0; i < 40; i++) ToSendStuffBit(1); - } + // Send SOF - for(i = 0; i < 11; i++) { + for(i = 0; i < 10; i++) ToSendStuffBit(0); - } for(i = 0; i < len; i++) { // Stop bits/EGT @@ -915,31 +906,30 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) // Data bits b = cmd[i]; for(j = 0; j < 8; j++) { - if(b & 1) { + if(b & 1) ToSendStuffBit(1); - } else { + else ToSendStuffBit(0); - } + b >>= 1; } } // Send EOF ToSendStuffBit(1); - for(i = 0; i < 11; i++) { + for(i = 0; i < 10; i++) ToSendStuffBit(0); - } - for(i = 0; i < 8; i++) { + + for(i = 0; i < 8; i++) ToSendStuffBit(1); - } + // And then a little more, to make sure that the last character makes // it out before we switch to rx mode. - for(i = 0; i < 10; i++) { + for(i = 0; i < 24; i++) ToSendStuffBit(1); - } // Convert from last character reference to length - ToSendMax++; + ++ToSendMax; } @@ -951,8 +941,9 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) CodeIso14443bAsReader(cmd, len); TransmitFor14443b(); if (tracing) { - uint8_t parity[MAX_PARITY_SIZE]; - LogTrace(cmd,len, 0, 0, parity, TRUE); + //uint8_t parity[MAX_PARITY_SIZE]; + //LogTrace(cmd,len, 0, 0, parity, TRUE); + LogTrace(cmd,len, 0, 0, NULL, TRUE); } } @@ -974,17 +965,15 @@ int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *respo // send CodeAndTransmit14443bAsReader(message_frame, message_length + 4); // get response - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE); + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); if(Demod.len < 3) - { return 0; - } + // TODO: Check CRC // copy response contents if(response != NULL) - { memcpy(response, Demod.output, Demod.len); - } + return Demod.len; } @@ -1007,9 +996,7 @@ int iso14443b_select_card() GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); // ATQB too short? if (Demod.len < 14) - { return 2; - } // select the tag // copy the PUPI to ATTRIB @@ -1022,9 +1009,8 @@ int iso14443b_select_card() GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); // Answer to ATTRIB too short? if(Demod.len < 3) - { return 2; - } + // reset PCB block number pcb_blocknum = 0; return 1; @@ -1032,22 +1018,26 @@ int iso14443b_select_card() // Set up ISO 14443 Type B communication (similar to iso14443a_setup) void iso14443b_setup() { + FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); + + BigBuf_free(); BigBuf_Clear_ext(false); + DemodReset(); + UartReset(); + // Set up the synchronous serial port FpgaSetupSsc(); + // connect Demodulated Signal to ADC: SetAdcMuxFor(GPIO_MUXSEL_HIPKD); // Signal field is on with the appropriate LED LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); + SpinDelay(200); // Start the timer StartCountSspClk(); - - DemodReset(); - UartReset(); } //----------------------------------------------------------------------------- @@ -1062,8 +1052,6 @@ void iso14443b_setup() { void ReadSTMemoryIso14443b(uint32_t dwLast) { FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); - clear_trace(); set_tracing(TRUE); @@ -1091,6 +1079,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) if (Demod.len == 0) { DbpString("No response from tag"); + set_tracing(FALSE); return; } else { Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x", @@ -1106,17 +1095,20 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); if (Demod.len != 3) { Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); + set_tracing(FALSE); return; } // Check the CRC of the answer: ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { DbpString("CRC Error reading select response."); + set_tracing(FALSE); return; } // Check response from the tag: should be the same UID as the command we just sent: if (cmd1[1] != Demod.output[0]) { Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]); + set_tracing(FALSE); return; } @@ -1128,6 +1120,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); if (Demod.len != 10) { Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); + set_tracing(FALSE); return; } // The check the CRC of the answer (use cmd1 as temporary variable): @@ -1175,6 +1168,8 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) } i++; } + + set_tracing(FALSE); } @@ -1203,7 +1198,7 @@ void RAMFUNC SnoopIso14443b(void) int triggered = TRUE; // TODO: set and evaluate trigger condition FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); clear_trace(); set_tracing(TRUE); @@ -1241,7 +1236,7 @@ void RAMFUNC SnoopIso14443b(void) upTo = dmaBuf; lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); - uint8_t parity[MAX_PARITY_SIZE]; + //uint8_t parity[MAX_PARITY_SIZE] = {0x00}; bool TagIsActive = FALSE; bool ReaderIsActive = FALSE; @@ -1270,10 +1265,12 @@ void RAMFUNC SnoopIso14443b(void) Dbprintf("blew circular buffer! behindBy=%d", behindBy); break; } + if(!tracing) { - DbpString("Reached trace limit"); + DbpString("Trace full"); break; } + if(BUTTON_PRESS()) { DbpString("cancelled"); break; @@ -1283,26 +1280,28 @@ void RAMFUNC SnoopIso14443b(void) samples += 2; if (!TagIsActive) { // no need to try decoding reader data if the tag is sending - if(Handle14443bUartBit(ci & 0x01)) { - if(triggered && tracing) { - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); - } - /* And ready to receive another command. */ - UartReset(); - /* And also reset the demod code, which might have been */ - /* false-triggered by the commands from the reader. */ - DemodReset(); - } - if(Handle14443bUartBit(cq & 0x01)) { - if(triggered && tracing) { - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + if (Handle14443bUartBit(ci & 0x01)) { + if(triggered && tracing) { + //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); + } + /* And ready to receive another command. */ + UartReset(); + /* And also reset the demod code, which might have been */ + /* false-triggered by the commands from the reader. */ + DemodReset(); } - /* And ready to receive another command. */ - UartReset(); - /* And also reset the demod code, which might have been */ - /* false-triggered by the commands from the reader. */ - DemodReset(); - } + if (Handle14443bUartBit(cq & 0x01)) { + if(triggered && tracing) { + //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); + } + /* And ready to receive another command. */ + UartReset(); + /* And also reset the demod code, which might have been */ + /* false-triggered by the commands from the reader. */ + DemodReset(); + } ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); } @@ -1310,24 +1309,23 @@ void RAMFUNC SnoopIso14443b(void) // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103 if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { - //Use samples as a time measurement - if(tracing) - { - //uint8_t parity[MAX_PARITY_SIZE]; - LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); - } - triggered = TRUE; + //Use samples as a time measurement + if(tracing) + //LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); + LogTrace(Demod.output, Demod.len, samples, samples, NULL, FALSE); - // And ready to receive another response. - DemodReset(); - } + triggered = TRUE; + + // And ready to receive another response. + DemodReset(); + } TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); } - } FpgaDisableSscDma(); LEDsoff(); + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; DbpString("Snoop statistics:"); Dbprintf(" Max behind by: %i", maxBehindBy); @@ -1335,6 +1333,7 @@ void RAMFUNC SnoopIso14443b(void) Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); + set_tracing(FALSE); } @@ -1352,38 +1351,32 @@ void RAMFUNC SnoopIso14443b(void) */ void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) { + // param ISO_ + // param ISO_CONNECT + // param ISO14A_NO_DISCONNECT + //if (param & ISO14A_NO_DISCONNECT) + // return; iso14443b_setup(); - FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); - if ( !PowerOn ){ - FpgaSetupSsc(); - } - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - - // Start the timer - StartCountSspClk(); - - DemodReset(); - UartReset(); if ( datalen == 0 && recv == 0 && powerfield == 0){ + + } else { clear_trace(); - } else { set_tracing(TRUE); CodeAndTransmit14443bAsReader(data, datalen); } - if(recv) { + if (recv) { GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE); - uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); - cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); + uint16_t len = MIN(Demod.len, USB_CMD_DATA_SIZE); + cmd_send(CMD_ACK, len, 0, 0, Demod.output, len); } - if(!powerfield) { + if (!powerfield) { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaDisableSscDma(); + set_tracing(FALSE); LED_D_OFF(); - PowerOn = 0; } }