X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/ff3e07447893b004c6de5c7202c9b50f2c81ab04..f4d7d1fed17809ea9d7b919bd32265d2b6cc895f:/armsrc/iso14443b.c?ds=inline diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c index a47f3017..68f0c366 100644 --- a/armsrc/iso14443b.c +++ b/armsrc/iso14443b.c @@ -8,19 +8,49 @@ // Routines to support ISO 14443B. This includes both the reader software and // the `fake tag' modes. //----------------------------------------------------------------------------- - -#include "proxmark3.h" -#include "apps.h" -#include "util.h" -#include "string.h" -#include "iso14443crc.h" -#include "common.h" -#define RECEIVE_SAMPLES_TIMEOUT 600000 -#define ISO14443B_DMA_BUFFER_SIZE 256 - - -// PCB Block number for APDUs +#include "iso14443b.h" + +#ifndef FWT_TIMEOUT_14B +// defaults to 2000ms +# define FWT_TIMEOUT_14B 35312 +#endif +#ifndef ISO14443B_DMA_BUFFER_SIZE +# define ISO14443B_DMA_BUFFER_SIZE 256 +#endif +#ifndef RECEIVE_MASK +# define RECEIVE_MASK (ISO14443B_DMA_BUFFER_SIZE-1) +#endif + +// Guard Time (per 14443-2) +#ifndef TR0 +# define TR0 0 +#endif + +// Synchronization time (per 14443-2) +#ifndef TR1 +# define TR1 0 +#endif +// Frame Delay Time PICC to PCD (per 14443-3 Amendment 1) +#ifndef TR2 +# define TR2 0 +#endif + +// 4sample +#define SEND4STUFFBIT(x) ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x); +//#define SEND4STUFFBIT(x) ToSendStuffBit(x); + // iceman, this threshold value, what makes 8 a good amplituted for this IQ values? +#ifndef SUBCARRIER_DETECT_THRESHOLD +# define SUBCARRIER_DETECT_THRESHOLD 8 +#endif + +static void iso14b_set_timeout(uint32_t timeout); +static void iso14b_set_maxframesize(uint16_t size); +static void switch_off(void); + +// the block number for the ISO14443-4 PCB (used with APDUs) static uint8_t pcb_blocknum = 0; +static uint32_t iso14b_timeout = FWT_TIMEOUT_14B; + //============================================================================= // An ISO 14443 Type B tag. We listen for commands from the reader, using @@ -30,111 +60,260 @@ static uint8_t pcb_blocknum = 0; // a response. //============================================================================= + +//----------------------------------------------------------------------------- +// The software UART that receives commands from the reader, and its state variables. +//----------------------------------------------------------------------------- +static struct { + enum { + STATE_UNSYNCD, + STATE_GOT_FALLING_EDGE_OF_SOF, + STATE_AWAITING_START_BIT, + STATE_RECEIVING_DATA + } state; + uint16_t shiftReg; + int bitCnt; + int byteCnt; + int byteCntMax; + int posCnt; + uint8_t *output; +} Uart; + +static void UartReset() { + Uart.state = STATE_UNSYNCD; + Uart.shiftReg = 0; + Uart.bitCnt = 0; + Uart.byteCnt = 0; + Uart.byteCntMax = MAX_FRAME_SIZE; + Uart.posCnt = 0; +} + +static void UartInit(uint8_t *data) { + Uart.output = data; + UartReset(); +// memset(Uart.output, 0x00, MAX_FRAME_SIZE); +} + +//----------------------------------------------------------------------------- +// The software Demod that receives commands from the tag, and its state variables. +//----------------------------------------------------------------------------- +static struct { + enum { + DEMOD_UNSYNCD, + DEMOD_PHASE_REF_TRAINING, + DEMOD_AWAITING_FALLING_EDGE_OF_SOF, + DEMOD_GOT_FALLING_EDGE_OF_SOF, + DEMOD_AWAITING_START_BIT, + DEMOD_RECEIVING_DATA + } state; + uint16_t bitCount; + int posCount; + int thisBit; +/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. + int metric; + int metricN; +*/ + uint16_t shiftReg; + uint8_t *output; + uint16_t len; + int sumI; + int sumQ; + uint32_t startTime, endTime; +} Demod; + +// Clear out the state of the "UART" that receives from the tag. +static void DemodReset() { + Demod.state = DEMOD_UNSYNCD; + Demod.bitCount = 0; + Demod.posCount = 0; + Demod.thisBit = 0; + Demod.shiftReg = 0; + Demod.len = 0; + Demod.sumI = 0; + Demod.sumQ = 0; + Demod.startTime = 0; + Demod.endTime = 0; +} + +static void DemodInit(uint8_t *data) { + Demod.output = data; + DemodReset(); + // memset(Demod.output, 0x00, MAX_FRAME_SIZE); +} + + +/* +* 9.4395 us = 1 ETU and clock is about 1.5 us +* 13560000Hz +* 1000ms/s +* timeout in ETUs (time to transfer 1 bit, 9.4395 us) +* +* Formula to calculate FWT (in ETUs) by timeout (in ms): +* fwt = 13560000 * 1000 / (8*16) * timeout; +* Sample: 3sec == 3000ms +* 13560000 * 1000 / (8*16) * 3000 == +* 13560000000 / 384000 = 35312 FWT +* @param timeout is in frame wait time, fwt, measured in ETUs +*/ +static void iso14b_set_timeout(uint32_t timeout) { + #define MAX_TIMEOUT 40542464 // 13560000Hz * 1000ms / (2^32-1) * (8*16) + if(timeout > MAX_TIMEOUT) + timeout = MAX_TIMEOUT; + + iso14b_timeout = timeout; + if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443B Timeout set to %ld fwt", iso14b_timeout); +} +static void iso14b_set_maxframesize(uint16_t size) { + if (size > 256) + size = MAX_FRAME_SIZE; + + Uart.byteCntMax = size; + if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443B Max frame size set to %d bytes", Uart.byteCntMax); +} +static void switch_off(void){ + if (MF_DBGLEVEL > 3) Dbprintf("switch_off"); + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); + SpinDelay(100); + FpgaDisableSscDma(); + set_tracing(FALSE); + LEDsoff(); +} + +void AppendCrc14443b(uint8_t* data, int len) { + ComputeCrc14443(CRC_14443_B, data, len, data+len, data+len+1); +} + //----------------------------------------------------------------------------- // Code up a string of octets at layer 2 (including CRC, we don't generate // that here) so that they can be transmitted to the reader. Doesn't transmit // them yet, just leaves them ready to send in ToSend[]. //----------------------------------------------------------------------------- -static void CodeIso14443bAsTag(const uint8_t *cmd, int len) -{ - int i; - +static void CodeIso14443bAsTag(const uint8_t *cmd, int len) { + /* ISO 14443 B + * + * Reader to card | ASK - Amplitude Shift Keying Modulation (PCD to PICC for Type B) (NRZ-L encodig) + * Card to reader | BPSK - Binary Phase Shift Keying Modulation, (PICC to PCD for Type B) + * + * fc - carrier frequency 13.56mHz + * TR0 - Guard Time per 14443-2 + * TR1 - Synchronization Time per 14443-2 + * TR2 - PICC to PCD Frame Delay Time (per 14443-3 Amendment 1) + * + * Elementary Time Unit (ETU) is + * - 128 Carrier Cycles (9.4395 µS) = 8 Subcarrier Units + * - 1 ETU = 1 bit + * - 10 ETU = 1 startbit, 8 databits, 1 stopbit (10bits length) + * - startbit is a 0 + * - stopbit is a 1 + * + * Start of frame (SOF) is + * - [10-11] ETU of ZEROS, unmodulated time + * - [2-3] ETU of ONES, + * + * End of frame (EOF) is + * - [10-11] ETU of ZEROS, unmodulated time + * + * -TO VERIFY THIS BELOW- + * The mode FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK which we use to simulate tag + * works like this: + * - A 1-bit input to the FPGA becomes 8 pulses at 847.5kHz (9.44µS) + * - A 0-bit input to the FPGA becomes an unmodulated time of 9.44µS + * + * + * + * Card sends data ub 847.e kHz subcarrier + * 848k = 9.44µS = 128 fc + * 424k = 18.88µS = 256 fc + * 212k = 37.76µS = 512 fc + * 106k = 75.52µS = 1024 fc + * + * Reader data transmission: + * - no modulation ONES + * - SOF + * - Command, data and CRC_B + * - EOF + * - no modulation ONES + * + * Card data transmission + * - TR1 + * - SOF + * - data (each bytes is: 1startbit, 8bits, 1stopbit) + * - CRC_B + * - EOF + * + * FPGA implementation : + * At this point only Type A is implemented. This means that we are using a + * bit rate of 106 kbit/s, or fc/128. Oversample by 4, which ought to make + * things practical for the ARM (fc/32, 423.8 kbits/s, ~50 kbytes/s) + * + */ + + int i,j; + uint8_t b; + ToSendReset(); // Transmit a burst of ones, as the initial thing that lets the - // reader get phase sync. This (TR1) must be > 80/fs, per spec, - // but tag that I've tried (a Paypass) exceeds that by a fair bit, - // so I will too. - for(i = 0; i < 20; i++) { - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - } + // reader get phase sync. + // This loop is TR1, per specification + // TR1 minimum must be > 80/fs + // TR1 maximum 200/fs + // 80/fs < TR1 < 200/fs + // 10 ETU < TR1 < 24 ETU // Send SOF. - for(i = 0; i < 10; i++) { - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - } - for(i = 0; i < 2; i++) { - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - } - - for(i = 0; i < len; i++) { - int j; - uint8_t b = cmd[i]; - + // 10-11 ETU * 4times samples ZEROS + for(i = 0; i < 10; i++) { SEND4STUFFBIT(0); } + //for(i = 0; i < 10; i++) { ToSendStuffBit(0); } + + // 2-3 ETU * 4times samples ONES + for(i = 0; i < 3; i++) { SEND4STUFFBIT(1); } + //for(i = 0; i < 3; i++) { ToSendStuffBit(1); } + + // data + for(i = 0; i < len; ++i) { + // Start bit - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); + SEND4STUFFBIT(0); + //ToSendStuffBit(0); // Data bits - for(j = 0; j < 8; j++) { - if(b & 1) { - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - } else { - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - } + b = cmd[i]; + for(j = 0; j < 8; ++j) { + // if(b & 1) { + // SEND4STUFFBIT(1); + // //ToSendStuffBit(1); + // } else { + // SEND4STUFFBIT(0); + // //ToSendStuffBit(0); + // } + SEND4STUFFBIT( b & 1 ); b >>= 1; } // Stop bit - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); + SEND4STUFFBIT(1); + //ToSendStuffBit(1); + + // Extra Guard bit + // For PICC it ranges 0-18us (1etu = 9us) + SEND4STUFFBIT(1); + //ToSendStuffBit(1); } // Send EOF. - for(i = 0; i < 10; i++) { - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - ToSendStuffBit(0); - } - for(i = 0; i < 2; i++) { - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - ToSendStuffBit(1); - } - + // 10-11 ETU * 4 sample rate = ZEROS + for(i = 0; i < 10; i++) { SEND4STUFFBIT(0); } + //for(i = 0; i < 10; i++) { ToSendStuffBit(0); } + + // why this? + for(i = 0; i < 40; i++) { SEND4STUFFBIT(1); } + //for(i = 0; i < 40; i++) { ToSendStuffBit(1); } + // Convert from last byte pos to length - ToSendMax++; + ++ToSendMax; } -//----------------------------------------------------------------------------- -// The software UART that receives commands from the reader, and its state -// variables. -//----------------------------------------------------------------------------- -static struct { - enum { - STATE_UNSYNCD, - STATE_GOT_FALLING_EDGE_OF_SOF, - STATE_AWAITING_START_BIT, - STATE_RECEIVING_DATA - } state; - uint16_t shiftReg; - int bitCnt; - int byteCnt; - int byteCntMax; - int posCnt; - uint8_t *output; -} Uart; /* Receive & handle a bit coming from the reader. * @@ -148,13 +327,11 @@ static struct { * Returns: true if we received a EOF * false if we are still waiting for some more */ -static RAMFUNC int Handle14443bUartBit(uint8_t bit) -{ - switch(Uart.state) { +static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) { + switch (Uart.state) { case STATE_UNSYNCD: - if(!bit) { - // we went low, so this could be the beginning - // of an SOF + if (!bit) { + // we went low, so this could be the beginning of an SOF Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF; Uart.posCnt = 0; Uart.bitCnt = 0; @@ -163,9 +340,9 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) case STATE_GOT_FALLING_EDGE_OF_SOF: Uart.posCnt++; - if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit - if(bit) { - if(Uart.bitCnt > 9) { + if (Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit + if (bit) { + if (Uart.bitCnt > 9) { // we've seen enough consecutive // zeros that it's a valid SOF Uart.posCnt = 0; @@ -173,8 +350,7 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) Uart.state = STATE_AWAITING_START_BIT; LED_A_ON(); // Indicate we got a valid SOF } else { - // didn't stay down long enough - // before going high, error + // didn't stay down long enough before going high, error Uart.state = STATE_UNSYNCD; } } else { @@ -182,10 +358,9 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) } Uart.bitCnt++; } - if(Uart.posCnt >= 4) Uart.posCnt = 0; - if(Uart.bitCnt > 12) { - // Give up if we see too many zeros without - // a one, too. + if (Uart.posCnt >= 4) Uart.posCnt = 0; + if (Uart.bitCnt > 12) { + // Give up if we see too many zeros without a one, too. LED_A_OFF(); Uart.state = STATE_UNSYNCD; } @@ -193,10 +368,9 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) case STATE_AWAITING_START_BIT: Uart.posCnt++; - if(bit) { - if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs - // stayed high for too long between - // characters, error + if (bit) { + if (Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs + // stayed high for too long between characters, error Uart.state = STATE_UNSYNCD; } } else { @@ -210,26 +384,26 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) case STATE_RECEIVING_DATA: Uart.posCnt++; - if(Uart.posCnt == 2) { + if (Uart.posCnt == 2) { // time to sample a bit Uart.shiftReg >>= 1; - if(bit) { + if (bit) { Uart.shiftReg |= 0x200; } Uart.bitCnt++; } - if(Uart.posCnt >= 4) { + if (Uart.posCnt >= 4) { Uart.posCnt = 0; } - if(Uart.bitCnt == 10) { - if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) + if (Uart.bitCnt == 10) { + if ((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) { // this is a data byte, with correct // start and stop bits Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; Uart.byteCnt++; - if(Uart.byteCnt >= Uart.byteCntMax) { + if (Uart.byteCnt >= Uart.byteCntMax) { // Buffer overflowed, give up LED_A_OFF(); Uart.state = STATE_UNSYNCD; @@ -242,9 +416,9 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) // this is an EOF byte LED_A_OFF(); // Finished receiving Uart.state = STATE_UNSYNCD; - if (Uart.byteCnt != 0) { - return TRUE; - } + if (Uart.byteCnt != 0) + return TRUE; + } else { // this is an error LED_A_OFF(); @@ -258,29 +432,9 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) Uart.state = STATE_UNSYNCD; break; } - return FALSE; } - -static void UartReset() -{ - Uart.byteCntMax = MAX_FRAME_SIZE; - Uart.state = STATE_UNSYNCD; - Uart.byteCnt = 0; - Uart.bitCnt = 0; - Uart.posCnt = 0; - memset(Uart.output, 0x00, MAX_FRAME_SIZE); -} - - -static void UartInit(uint8_t *data) -{ - Uart.output = data; - UartReset(); -} - - //----------------------------------------------------------------------------- // Receive a command (from the reader to us, where we are the simulated tag), // and store it in the given buffer, up to the given maximum length. Keeps @@ -290,193 +444,280 @@ static void UartInit(uint8_t *data) // Assume that we're called with the SSC (to the FPGA) and ADC path set // correctly. //----------------------------------------------------------------------------- -static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) -{ +static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) { // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen // only, since we are receiving, not transmitting). // Signal field is off with the appropriate LED LED_D_OFF(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); + + StartCountSspClk(); + + volatile uint8_t b = 0; + // clear receiving shift register and holding register + // What does this loop do? Is it TR1? + for(uint8_t c = 0; c < 10;) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0xFF; + ++c; + } + } + // Now run a `software UART' on the stream of incoming samples. UartInit(received); - for(;;) { + uint8_t mask; + while( !BUTTON_PRESS() ) { WDT_HIT(); - if(BUTTON_PRESS()) return FALSE; - - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) { - if(Handle14443bUartBit(b & mask)) { + if ( AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY ) { + b = (uint8_t) AT91C_BASE_SSC->SSC_RHR; + for ( mask = 0x80; mask != 0; mask >>= 1) { + if ( Handle14443bReaderUartBit(b & mask)) { *len = Uart.byteCnt; return TRUE; } } } + } + return FALSE; +} + +void ClearFpgaShiftingRegisters(void){ + + volatile uint8_t b; + + // clear receiving shift register and holding register + while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {}; + + b = AT91C_BASE_SSC->SSC_RHR; (void) b; + + while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {}; + + b = AT91C_BASE_SSC->SSC_RHR; (void) b; + + + // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) + for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never + while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); + if (AT91C_BASE_SSC->SSC_RHR) break; } - return FALSE; + // Clear TXRDY: + //AT91C_BASE_SSC->SSC_THR = 0xFF; +} + +void WaitForFpgaDelayQueueIsEmpty( uint16_t delay ){ + // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: + uint8_t fpga_queued_bits = delay >> 3; // twich /8 ?? >>3, + for (uint8_t i = 0; i <= fpga_queued_bits/8 + 1; ) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0xFF; + i++; + } + } } +static void TransmitFor14443b_AsTag( uint8_t *response, uint16_t len) { + + volatile uint32_t b; + + // Signal field is off with the appropriate LED + LED_D_OFF(); + //uint16_t fpgasendQueueDelay = 0; + + // Modulate BPSK + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); + SpinDelay(40); + + ClearFpgaShiftingRegisters(); + + FpgaSetupSsc(); + + // Transmit the response. + for(uint16_t i = 0; i < len;) { + if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { + AT91C_BASE_SSC->SSC_THR = response[++i]; + } + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + b = AT91C_BASE_SSC->SSC_RHR; + (void)b; + } + } + + //WaitForFpgaDelayQueueIsEmpty(fpgasendQueueDelay); + AT91C_BASE_SSC->SSC_THR = 0xFF; +} //----------------------------------------------------------------------------- // Main loop of simulated tag: receive commands from reader, decide what // response to send, and send it. //----------------------------------------------------------------------------- -void SimulateIso14443bTag(void) -{ - // the only commands we understand is WUPB, AFI=0, Select All, N=1: - static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB - // ... and REQB, AFI=0, Normal Request, N=1: - static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB - // ... and HLTB - static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB - // ... and ATTRIB - static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB - - // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, - // supports only 106kBit/s in both directions, max frame size = 32Bytes, - // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: - static const uint8_t response1[] = { - 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22, - 0x00, 0x21, 0x85, 0x5e, 0xd7 - }; - // response to HLTB and ATTRIB - static const uint8_t response2[] = {0x00, 0x78, 0xF0}; +void SimulateIso14443bTag(uint32_t pupi) { - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; - + ///////////// setup device. FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - clear_trace(); - set_tracing(TRUE); - - const uint8_t *resp; - uint8_t *respCode; - uint16_t respLen, respCodeLen; - // allocate command receive buffer BigBuf_free(); - uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); + BigBuf_Clear_ext(false); + clear_trace(); //sim + set_tracing(TRUE); + + // connect Demodulated Signal to ADC: + SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - uint16_t len; - uint16_t cmdsRecvd = 0; + // Set up the synchronous serial port + FpgaSetupSsc(); + ///////////// + + uint16_t len, cmdsReceived = 0; + int cardSTATE = SIM_NOFIELD; + int vHf = 0; // in mV + // uint32_t time_0 = 0; + // uint32_t t2r_time = 0; + // uint32_t r2t_time = 0; + uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); + + // the only commands we understand is WUPB, AFI=0, Select All, N=1: +// static const uint8_t cmdWUPB[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB + // ... and REQB, AFI=0, Normal Request, N=1: +// static const uint8_t cmdREQB[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB + // ... and ATTRIB +// static const uint8_t cmdATTRIB[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB - // prepare the (only one) tag answer: - CodeIso14443bAsTag(response1, sizeof(response1)); - uint8_t *resp1Code = BigBuf_malloc(ToSendMax); - memcpy(resp1Code, ToSend, ToSendMax); - uint16_t resp1CodeLen = ToSendMax; + // ... if not PUPI/UID is supplied we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, + // supports only 106kBit/s in both directions, max frame size = 32Bytes, + // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: + uint8_t respATQB[] = { 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, + 0x22, 0x00, 0x21, 0x85, 0x5e, 0xd7 }; + + // response to HLTB and ATTRIB + static const uint8_t respOK[] = {0x00, 0x78, 0xF0}; - // prepare the (other) tag answer: - CodeIso14443bAsTag(response2, sizeof(response2)); - uint8_t *resp2Code = BigBuf_malloc(ToSendMax); - memcpy(resp2Code, ToSend, ToSendMax); - uint16_t resp2CodeLen = ToSendMax; + // ...PUPI/UID supplied from user. Adjust ATQB response accordingly + if ( pupi > 0 ) { + uint8_t len = sizeof(respATQB); + num_to_bytes(pupi, 4, respATQB+1); + ComputeCrc14443(CRC_14443_B, respATQB, 12, &respATQB[len-2], &respATQB[len-1]); + } - // We need to listen to the high-frequency, peak-detected path. - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - FpgaSetupSsc(); + // prepare "ATQB" tag answer (encoded): + CodeIso14443bAsTag(respATQB, sizeof(respATQB)); + uint8_t *encodedATQB = BigBuf_malloc(ToSendMax); + uint16_t encodedATQBLen = ToSendMax; + memcpy(encodedATQB, ToSend, ToSendMax); - cmdsRecvd = 0; + + // prepare "OK" tag answer (encoded): + CodeIso14443bAsTag(respOK, sizeof(respOK)); + uint8_t *encodedOK = BigBuf_malloc(ToSendMax); + uint16_t encodedOKLen = ToSendMax; + memcpy(encodedOK, ToSend, ToSendMax); + + // Simulation loop + while (!BUTTON_PRESS() && !usb_poll_validate_length()) { + WDT_HIT(); - for(;;) { + // find reader field + if (cardSTATE == SIM_NOFIELD) { + vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10; + if ( vHf > MF_MINFIELDV ) { + cardSTATE = SIM_IDLE; + LED_A_ON(); + } + } + if (cardSTATE == SIM_NOFIELD) continue; + // Get reader command if (!GetIso14443bCommandFromReader(receivedCmd, &len)) { - Dbprintf("button pressed, received %d commands", cmdsRecvd); + Dbprintf("button pressed, received %d commands", cmdsReceived); break; } - LogTrace(receivedCmd, len, 0, 0, parity, TRUE); - - // Good, look at the command now. - if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) - || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) { - resp = response1; - respLen = sizeof(response1); - respCode = resp1Code; - respCodeLen = resp1CodeLen; - } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0]) - || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) { - resp = response2; - respLen = sizeof(response2); - respCode = resp2Code; - respCodeLen = resp2CodeLen; - } else { - Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); - // And print whether the CRC fails, just for good measure - uint8_t b1, b2; - if (len >= 3){ // if crc exists - ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); - if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { - // Not so good, try again. - DbpString("+++CRC fail"); - - } else { - DbpString("CRC passes"); - } + // ISO14443-B protocol states: + // REQ or WUP request in ANY state + // WUP in HALTED state + if (len == 5 ) { + if ( (receivedCmd[0] == ISO14443B_REQB && (receivedCmd[2] & 0x8)== 0x8 && cardSTATE == SIM_HALTED) || + receivedCmd[0] == ISO14443B_REQB ){ + LogTrace(receivedCmd, len, 0, 0, NULL, TRUE); + cardSTATE = SIM_SELECTING; } - //get rid of compiler warning - respCodeLen = 0; - resp = response1; - respLen = 0; - respCode = resp1Code; - //don't crash at new command just wait and see if reader will send other new cmds. - //break; - } - - cmdsRecvd++; - - if(cmdsRecvd > 0x30) { - DbpString("many commands later..."); - break; } - - if(respCodeLen <= 0) continue; - - // Modulate BPSK - // Signal field is off with the appropriate LED - LED_D_OFF(); - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); - AT91C_BASE_SSC->SSC_THR = 0xff; - FpgaSetupSsc(); - - uint8_t c; - // clear receiving shift register and holding register - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - // Clear TXRDY: - AT91C_BASE_SSC->SSC_THR = 0x00; + /* + * How should this flow go? + * REQB or WUPB + * send response ( waiting for Attrib) + * ATTRIB + * send response ( waiting for commands 7816) + * HALT + send halt response ( waiting for wupb ) + */ - // Transmit the response. - uint16_t FpgaSendQueueDelay = 0; - uint16_t i = 0; - for(;i < respCodeLen; ) { - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = respCode[i++]; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + switch (cardSTATE) { + case SIM_NOFIELD: + case SIM_HALTED: + case SIM_IDLE: { + LogTrace(receivedCmd, len, 0, 0, NULL, TRUE); + break; } - if(BUTTON_PRESS()) break; - } - - // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: - uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; - for (i = 0; i <= fpga_queued_bits/8 + 1; ) { - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = 0x00; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - i++; + case SIM_SELECTING: { + TransmitFor14443b_AsTag( encodedATQB, encodedATQBLen ); + LogTrace(respATQB, sizeof(respATQB), 0, 0, NULL, FALSE); + cardSTATE = SIM_WORK; + break; } + case SIM_HALTING: { + TransmitFor14443b_AsTag( encodedOK, encodedOKLen ); + LogTrace(respOK, sizeof(respOK), 0, 0, NULL, FALSE); + cardSTATE = SIM_HALTED; + break; + } + case SIM_ACKNOWLEDGE: { + TransmitFor14443b_AsTag( encodedOK, encodedOKLen ); + LogTrace(respOK, sizeof(respOK), 0, 0, NULL, FALSE); + cardSTATE = SIM_IDLE; + break; + } + case SIM_WORK: { + if ( len == 7 && receivedCmd[0] == ISO14443B_HALT ) { + cardSTATE = SIM_HALTED; + } else if ( len == 11 && receivedCmd[0] == ISO14443B_ATTRIB ) { + cardSTATE = SIM_ACKNOWLEDGE; + } else { + // Todo: + // - SLOT MARKER + // - ISO7816 + // - emulate with a memory dump + Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsReceived); + + // CRC Check + uint8_t b1, b2; + if (len >= 3){ // if crc exists + ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); + if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) + DbpString("+++CRC fail"); + else + DbpString("CRC passes"); + } + cardSTATE = SIM_IDLE; + } + break; + } + default: break; + } + + ++cmdsReceived; + // iceman, could add a switch to turn this on/off (if off, no logging?) + if(cmdsReceived > 1000) { + DbpString("14B Simulate, 1000 commands later..."); + break; } - - LogTrace(resp, respLen, 0, 0, parity, FALSE); } - FpgaDisableSscDma(); - set_tracing(FALSE); + if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen()); + switch_off(); //simulate } //============================================================================= @@ -486,29 +727,6 @@ void SimulateIso14443bTag(void) // PC side. //============================================================================= -static struct { - enum { - DEMOD_UNSYNCD, - DEMOD_PHASE_REF_TRAINING, - DEMOD_AWAITING_FALLING_EDGE_OF_SOF, - DEMOD_GOT_FALLING_EDGE_OF_SOF, - DEMOD_AWAITING_START_BIT, - DEMOD_RECEIVING_DATA - } state; - int bitCount; - int posCount; - int thisBit; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - int metric; - int metricN; -*/ - uint16_t shiftReg; - uint8_t *output; - int len; - int sumI; - int sumQ; -} Demod; - /* * Handles reception of a bit from the tag * @@ -523,14 +741,8 @@ static struct { * false if we are still waiting for some more * */ - #define abs(x) ( ((x)<0) ? -(x) : (x) ) -static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) -{ - int v = 0; - int ai = abs(ci); - int aq = abs(cq); - int halfci = (ai >> 1); - int halfcq = (aq >> 1); +static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) { + int v = 0, myI = ABS(ci), myQ = ABS(cq); // The soft decision on the bit uses an estimate of just the // quadrant of the reference angle, not the exact angle. @@ -547,18 +759,52 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } \ } -#define SUBCARRIER_DETECT_THRESHOLD 8 - +// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) -#define CHECK_FOR_SUBCARRIER() { \ - v = MAX(ai, aq) + MIN(halfci, halfcq); \ -} +#define CHECK_FOR_SUBCARRIER_old() { \ + if(ci < 0) { \ + if(cq < 0) { /* ci < 0, cq < 0 */ \ + if (cq < ci) { \ + v = -cq - (ci >> 1); \ + } else { \ + v = -ci - (cq >> 1); \ + } \ + } else { /* ci < 0, cq >= 0 */ \ + if (cq < -ci) { \ + v = -ci + (cq >> 1); \ + } else { \ + v = cq - (ci >> 1); \ + } \ + } \ + } else { \ + if(cq < 0) { /* ci >= 0, cq < 0 */ \ + if (-cq < ci) { \ + v = ci - (cq >> 1); \ + } else { \ + v = -cq + (ci >> 1); \ + } \ + } else { /* ci >= 0, cq >= 0 */ \ + if (cq < ci) { \ + v = ci + (cq >> 1); \ + } else { \ + v = cq + (ci >> 1); \ + } \ + } \ + } \ + } +//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow +#define CHECK_FOR_SUBCARRIER() { \ + v = MAX(myI, myQ) + (MIN(myI, myQ) >> 1); \ + } switch(Demod.state) { case DEMOD_UNSYNCD: + CHECK_FOR_SUBCARRIER(); - if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected + + // subcarrier detected + if (v > SUBCARRIER_DETECT_THRESHOLD) { Demod.state = DEMOD_PHASE_REF_TRAINING; Demod.sumI = ci; Demod.sumQ = cq; @@ -567,16 +813,18 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_PHASE_REF_TRAINING: - if(Demod.posCount < 8) { - //if(Demod.posCount < 10*2) { + if (Demod.posCount < 8) { + CHECK_FOR_SUBCARRIER(); + if (v > SUBCARRIER_DETECT_THRESHOLD) { // set the reference phase (will code a logic '1') by averaging over 32 1/fs. // note: synchronization time > 80 1/fs Demod.sumI += ci; Demod.sumQ += cq; - Demod.posCount++; - } else { // subcarrier lost + ++Demod.posCount; + } else { + // subcarrier lost Demod.state = DEMOD_UNSYNCD; } } else { @@ -585,37 +833,38 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: + MAKE_SOFT_DECISION(); - //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq ); - if(v <= 0) { // logic '0' detected + + if (v < 0) { // logic '0' detected Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; Demod.posCount = 0; // start of SOF sequence } else { - if(Demod.posCount > 25*2) { // maximum length of TR1 = 200 1/fs - Demod.state = DEMOD_UNSYNCD; - } + // maximum length of TR1 = 200 1/fs + if(Demod.posCount > 26*2) Demod.state = DEMOD_UNSYNCD; } - Demod.posCount++; + ++Demod.posCount; break; case DEMOD_GOT_FALLING_EDGE_OF_SOF: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); - if(v > 0) { - if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + + if (v > 0) { + // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + if (Demod.posCount < 8*2) { Demod.state = DEMOD_UNSYNCD; } else { LED_C_ON(); // Got SOF + //Demod.startTime = GetCountSspClk(); Demod.state = DEMOD_AWAITING_START_BIT; Demod.posCount = 0; Demod.len = 0; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - Demod.metricN = 0; - Demod.metric = 0; -*/ } } else { - if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu) + // low phase of SOF too long (> 12 etu) + if (Demod.posCount > 14*2) { Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); } @@ -623,10 +872,12 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_START_BIT: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); - if(v > 0) { - if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs + + if (v > 0) { + if(Demod.posCount > 2*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); } @@ -640,42 +891,42 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_RECEIVING_DATA: + MAKE_SOFT_DECISION(); - if(Demod.posCount == 0) { // first half of bit + + if (Demod.posCount == 0) { + // first half of bit Demod.thisBit = v; Demod.posCount = 1; - } else { // second half of bit + } else { + // second half of bit Demod.thisBit += v; - -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - if(Demod.thisBit > 0) { - Demod.metric += Demod.thisBit; - } else { - Demod.metric -= Demod.thisBit; - } - (Demod.metricN)++; -*/ - Demod.shiftReg >>= 1; - if(Demod.thisBit > 0) { // logic '1' - Demod.shiftReg |= 0x200; - } - Demod.bitCount++; - if(Demod.bitCount == 10) { + // OR in a logic '1' + if (Demod.thisBit > 0) Demod.shiftReg |= 0x200; + + ++Demod.bitCount; + + // 1 start 8 data 1 stop = 10 + if (Demod.bitCount == 10) { + uint16_t s = Demod.shiftReg; - if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' - uint8_t b = (s >> 1); - Demod.output[Demod.len] = b; - Demod.len++; + + // stop bit == '1', start bit == '0' + if ((s & 0x200) && (s & 0x001) == 0 ) { + // left shift to drop the startbit + Demod.output[Demod.len] = (s >> 1) & 0xFF; + ++Demod.len; Demod.state = DEMOD_AWAITING_START_BIT; } else { + // this one is a bit hard, either its a correc byte or its unsynced. Demod.state = DEMOD_UNSYNCD; + //Demod.endTime = GetCountSspClk(); LED_C_OFF(); - if(s == 0x000) { - // This is EOF (start, stop and all data bits == '0' - return TRUE; - } + + // This is EOF (start, stop and all data bits == '0' + if (s == 0) return TRUE; } } Demod.posCount = 0; @@ -691,237 +942,239 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } -static void DemodReset() -{ - // Clear out the state of the "UART" that receives from the tag. - Demod.len = 0; - Demod.state = DEMOD_UNSYNCD; - Demod.posCount = 0; - Demod.sumI = 0; - Demod.sumQ = 0; - Demod.bitCount = 0; - Demod.thisBit = 0; - Demod.shiftReg = 0; - memset(Demod.output, 0x00, MAX_FRAME_SIZE); -} - - -static void DemodInit(uint8_t *data) -{ - Demod.output = data; - DemodReset(); -} - - /* * Demodulate the samples we received from the tag, also log to tracebuffer * quiet: set to 'TRUE' to disable debug output */ -static void GetSamplesFor14443bDemod(int n, bool quiet) -{ - int max = 0; - bool gotFrame = FALSE; - int lastRxCounter, ci, cq, samples = 0; +static void GetTagSamplesFor14443bDemod() { + bool gotFrame = FALSE, finished = FALSE; + int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; + int ci = 0, cq = 0; + uint32_t time_0 = 0, time_stop = 0; - // Allocate memory from BigBuf for some buffers - // free all previous allocations first BigBuf_free(); - - // And put the FPGA in the appropriate mode - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); - - // The response (tag -> reader) that we're receiving. + // Set up the demodulator for tag -> reader responses. DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); // The DMA buffer, used to stream samples from the FPGA int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); - - // Setup and start DMA. - FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); - int8_t *upTo = dmaBuf; - lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; + + // Setup and start DMA. + if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE) ){ + if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); + return; + } - // Signal field is ON with the appropriate LED: - LED_D_ON(); - for(;;) { - int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; - if(behindBy > max) max = behindBy; - - while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) { - ci = upTo[0]; - cq = upTo[1]; - upTo += 2; - if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { - upTo = dmaBuf; - AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; - AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; - } - lastRxCounter -= 2; - if(lastRxCounter <= 0) { - lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; - } + // And put the FPGA in the appropriate mode + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); + + // get current clock + time_0 = GetCountSspClk(); + + // rx counter - dma counter? (how much?) & (mod) mask > 2. (since 2bytes at the time is read) + while ( !finished ) { - samples += 2; + LED_A_INV(); + WDT_HIT(); - // - gotFrame = Handle14443bSamplesDemod(ci , cq ); - if ( gotFrame ) - break; - } + // LSB is a fpga signal bit. + ci = upTo[0] >> 1; + cq = upTo[1] >> 1; + upTo += 2; + lastRxCounter -= 2; - if(samples > n || gotFrame) { - break; + // restart DMA buffer to receive again. + if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { + upTo = dmaBuf; + lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; + AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; + AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; } - } - AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; + // https://github.com/Proxmark/proxmark3/issues/103 + gotFrame = Handle14443bTagSamplesDemod(ci, cq); + time_stop = GetCountSspClk() - time_0; - if (!quiet) { - Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", - max, - samples, - (gotFrame) ? "true" : "false", - Demod.len, - Demod.sumI, - Demod.sumQ - ); + finished = (time_stop > iso14b_timeout || gotFrame); } - - //Tracing - if (Demod.len > 0) { - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; - LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); + + FpgaDisableSscDma(); + + if ( upTo ) upTo = NULL; + + if (MF_DBGLEVEL >= 3) { + Dbprintf("Demod.state = %d, Demod.len = %u, PDC_RCR = %u", + Demod.state, + Demod.len, + AT91C_BASE_PDC_SSC->PDC_RCR + ); } + + // print the last batch of IQ values from FPGA + if (MF_DBGLEVEL == 4) + Dbhexdump(ISO14443B_DMA_BUFFER_SIZE, (uint8_t *)dmaBuf, FALSE); + + if ( Demod.len > 0 ) + LogTrace(Demod.output, Demod.len, time_0, time_stop, NULL, FALSE); } //----------------------------------------------------------------------------- // Transmit the command (to the tag) that was placed in ToSend[]. //----------------------------------------------------------------------------- -static void TransmitFor14443b(void) -{ - int c; +static void TransmitFor14443b_AsReader(void) { - FpgaSetupSsc(); + // we could been in following mode: + // FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ + // if its second call or more - while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = 0xff; - } - - // Signal field is ON with the appropriate Red LED - LED_D_ON(); - // Signal we are transmitting with the Green LED - LED_B_ON(); - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); + // while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + // AT91C_BASE_SSC->SSC_THR = 0XFF; + // } - for(c = 0; c < 10;) { + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); + SpinDelay(40); + + int c; + volatile uint32_t b; + + // What does this loop do? Is it TR1? + // 0xFF = 8 bits of 1. 1 bit == 1Etu,.. + // loop 10 * 8 = 80 ETU of delay, with a non modulated signal. why? + // 80*9 = 720us. + for(c = 0; c < 50;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = 0xff; - c++; + AT91C_BASE_SSC->SSC_THR = 0xFF; + ++c; } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; - (void)r; + b = AT91C_BASE_SSC->SSC_RHR; + (void)b; } - WDT_HIT(); } - c = 0; - for(;;) { + // Send frame loop + for(c = 0; c < ToSendMax;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = ToSend[c]; - c++; - if(c >= ToSendMax) { - break; - } + AT91C_BASE_SSC->SSC_THR = ToSend[c++]; } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; - (void)r; - } - WDT_HIT(); + b = AT91C_BASE_SSC->SSC_RHR; + (void)b; + } } - LED_B_OFF(); // Finished sending + //WaitForFpgaDelayQueueIsEmpty(delay); + // We should wait here for the FPGA to send all bits. + WDT_HIT(); } - //----------------------------------------------------------------------------- // Code a layer 2 command (string of octets, including CRC) into ToSend[], // so that it is ready to transmit to the tag using TransmitFor14443b(). //----------------------------------------------------------------------------- -static void CodeIso14443bAsReader(const uint8_t *cmd, int len) -{ - int i, j; +static void CodeIso14443bAsReader(const uint8_t *cmd, int len) { + /* + * Reader data transmission: + * - no modulation ONES + * - SOF + * - Command, data and CRC_B + * - EOF + * - no modulation ONES + * + * 1 ETU == 1 BIT! + * TR0 - 8 ETUS minimum. + * + * QUESTION: how long is a 1 or 0 in pulses in the xcorr_848 mode? + * 1 "stuffbit" = 1ETU (9us) + */ + int i; uint8_t b; - + ToSendReset(); - // Establish initial reference level - for(i = 0; i < 40; i++) { - ToSendStuffBit(1); - } // Send SOF - for(i = 0; i < 11; i++) { + // 10-11 ETUs of ZERO + for(i = 0; i < 10; ++i) ToSendStuffBit(0); + + // 2-3 ETUs of ONE + ToSendStuffBit(1); + ToSendStuffBit(1); + ToSendStuffBit(1); + + // Sending cmd, LSB + // from here we add BITS + for(i = 0; i < len; ++i) { + // Start bit ToSendStuffBit(0); - } - - for(i = 0; i < len; i++) { - // Stop bits/EGT + // Data bits + b = cmd[i]; + // if ( b & 1 ) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>1) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>2) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>3) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>4) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>5) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>6) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + // if ( (b>>7) & 1) ToSendStuffBit(1); else ToSendStuffBit(0); + + ToSendStuffBit( b & 1); + ToSendStuffBit( (b>>1) & 1); + ToSendStuffBit( (b>>2) & 1); + ToSendStuffBit( (b>>3) & 1); + ToSendStuffBit( (b>>4) & 1); + ToSendStuffBit( (b>>5) & 1); + ToSendStuffBit( (b>>6) & 1); + ToSendStuffBit( (b>>7) & 1); + + // Stop bit ToSendStuffBit(1); + // EGT extra guard time + // For PCD it ranges 0-57us (1etu = 9us) ToSendStuffBit(1); - // Start bit - ToSendStuffBit(0); - // Data bits - b = cmd[i]; - for(j = 0; j < 8; j++) { - if(b & 1) { - ToSendStuffBit(1); - } else { - ToSendStuffBit(0); - } - b >>= 1; - } - } - // Send EOF - ToSendStuffBit(1); - for(i = 0; i < 11; i++) { - ToSendStuffBit(0); - } - for(i = 0; i < 8; i++) { ToSendStuffBit(1); - } - - // And then a little more, to make sure that the last character makes - // it out before we switch to rx mode. - for(i = 0; i < 10; i++) { ToSendStuffBit(1); } - + + // Send EOF + // 10-11 ETUs of ZERO + for(i = 0; i < 10; ++i) ToSendStuffBit(0); + + // Transition time. TR0 - guard time + // 8ETUS minum? + // Per specification, Subcarrier must be stopped no later than 2 ETUs after EOF. + // I'm guessing this is for the FPGA to be able to send all bits before we switch to listening mode + for(i = 0; i < 32 ; ++i) ToSendStuffBit(1); + + // TR1 - Synchronization time // Convert from last character reference to length - ToSendMax++; + ++ToSendMax; } -/** - Convenience function to encode, transmit and trace iso 14443b comms - **/ -static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) -{ +/* +* Convenience function to encode, transmit and trace iso 14443b comms +*/ +static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) { + + uint32_t time_start = GetCountSspClk(); + CodeIso14443bAsReader(cmd, len); - TransmitFor14443b(); - if (tracing) { - uint8_t parity[MAX_PARITY_SIZE]; - LogTrace(cmd,len, 0, 0, parity, TRUE); - } + + TransmitFor14443b_AsReader(); + + if(trigger) LED_A_ON(); + + LogTrace(cmd, len, time_start, GetCountSspClk()-time_start, NULL, TRUE); } /* Sends an APDU to the tag * TODO: check CRC and preamble */ -int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) +uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) { + uint8_t crc[2] = {0x00, 0x00}; uint8_t message_frame[message_length + 4]; // PCB message_frame[0] = 0x0A | pcb_blocknum; @@ -933,86 +1186,187 @@ int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *respo // EDC (CRC) ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]); // send - CodeAndTransmit14443bAsReader(message_frame, message_length + 4); + CodeAndTransmit14443bAsReader(message_frame, message_length + 4); //no // get response - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE); + GetTagSamplesFor14443bDemod(); //no if(Demod.len < 3) - { return 0; - } - // TODO: Check CRC + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[Demod.len-2] || crc[1] != Demod.output[Demod.len-1] ) + return 0; + // copy response contents if(response != NULL) - { memcpy(response, Demod.output, Demod.len); - } + return Demod.len; } +/** +* SRx Initialise. +*/ +uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card ) +{ + // INITIATE command: wake up the tag using the INITIATE + static const uint8_t init_srx[] = { ISO14443B_INITIATE, 0x00, 0x97, 0x5b }; + // SELECT command (with space for CRC) + uint8_t select_srx[] = { ISO14443B_SELECT, 0x00, 0x00, 0x00}; + // temp to calc crc. + uint8_t crc[2] = {0x00, 0x00}; + + CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx)); + GetTagSamplesFor14443bDemod(); //no + + if (Demod.len == 0) return 2; + + // Randomly generated Chip ID + if (card) card->chipid = Demod.output[0]; + + select_srx[1] = Demod.output[0]; + + ComputeCrc14443(CRC_14443_B, select_srx, 2, &select_srx[2], &select_srx[3]); + CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx)); + GetTagSamplesFor14443bDemod(); //no + + if (Demod.len != 3) return 2; + + // Check the CRC of the answer: + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2 , &crc[0], &crc[1]); + if(crc[0] != Demod.output[1] || crc[1] != Demod.output[2]) return 3; + + // Check response from the tag: should be the same UID as the command we just sent: + if (select_srx[1] != Demod.output[0]) return 1; + + // First get the tag's UID: + select_srx[0] = ISO14443B_GET_UID; + + ComputeCrc14443(CRC_14443_B, select_srx, 1 , &select_srx[1], &select_srx[2]); + CodeAndTransmit14443bAsReader(select_srx, 3); // Only first three bytes for this one + GetTagSamplesFor14443bDemod(); //no + + if (Demod.len != 10) return 2; + + // The check the CRC of the answer + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if(crc[0] != Demod.output[8] || crc[1] != Demod.output[9]) return 3; + + if (card) { + card->uidlen = 8; + memcpy(card->uid, Demod.output, 8); + } + + return 0; +} /* Perform the ISO 14443 B Card Selection procedure * Currently does NOT do any collision handling. * It expects 0-1 cards in the device's range. * TODO: Support multiple cards (perform anticollision) * TODO: Verify CRC checksums */ -int iso14443b_select_card() +uint8_t iso14443b_select_card(iso14b_card_select_t *card ) { // WUPB command (including CRC) // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state - static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; + static const uint8_t wupb[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // ATTRIB command (with space for CRC) - uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; + uint8_t attrib[] = { ISO14443B_ATTRIB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; + // temp to calc crc. + uint8_t crc[2] = {0x00, 0x00}; + // first, wake up the tag CodeAndTransmit14443bAsReader(wupb, sizeof(wupb)); - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + GetTagSamplesFor14443bDemod(); //select_card + // ATQB too short? - if (Demod.len < 14) - { - return 2; + if (Demod.len < 14) return 2; + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[12] || crc[1] != Demod.output[13] ) + return 3; + + if (card) { + card->uidlen = 4; + memcpy(card->uid, Demod.output+1, 4); + memcpy(card->atqb, Demod.output+5, 7); } - // select the tag - // copy the PUPI to ATTRIB + // copy the PUPI to ATTRIB ( PUPI == UID ) memcpy(attrib + 1, Demod.output + 1, 4); - /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into - ATTRIB (Param 3) */ + + // copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into ATTRIB (Param 3) attrib[7] = Demod.output[10] & 0x0F; ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10); + CodeAndTransmit14443bAsReader(attrib, sizeof(attrib)); - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + GetTagSamplesFor14443bDemod();//select_card + // Answer to ATTRIB too short? - if(Demod.len < 3) - { - return 2; + if(Demod.len < 3) return 2; + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[1] || crc[1] != Demod.output[2] ) + return 3; + + if (card) { + + // CID + card->cid = Demod.output[0]; + + // MAX FRAME + uint16_t maxFrame = card->atqb[5] >> 4; + if (maxFrame < 5) maxFrame = 8 * maxFrame + 16; + else if (maxFrame == 5) maxFrame = 64; + else if (maxFrame == 6) maxFrame = 96; + else if (maxFrame == 7) maxFrame = 128; + else if (maxFrame == 8) maxFrame = 256; + else maxFrame = 257; + iso14b_set_maxframesize(maxFrame); + + // FWT + uint8_t fwt = card->atqb[6] >> 4; + if ( fwt < 16 ){ + uint32_t fwt_time = (302 << fwt); + iso14b_set_timeout( fwt_time); + } } // reset PCB block number pcb_blocknum = 0; - return 1; + return 0; } // Set up ISO 14443 Type B communication (similar to iso14443a_setup) +// field is setup for "Sending as Reader" void iso14443b_setup() { - + if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup Enter"); + LEDsoff(); FpgaDownloadAndGo(FPGA_BITSTREAM_HF); + //BigBuf_free(); + //BigBuf_Clear_ext(false); - BigBuf_free(); - // Set up the synchronous serial port - FpgaSetupSsc(); + // Initialize Demod and Uart structs + DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); + UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); + // connect Demodulated Signal to ADC: SetAdcMuxFor(GPIO_MUXSEL_HIPKD); + // Set up the synchronous serial port + FpgaSetupSsc(); + // Signal field is on with the appropriate LED - LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); - - //SpinDelay(100); + SpinDelay(100); // Start the timer StartCountSspClk(); - - DemodReset(); - UartReset(); + + LED_D_ON(); + if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup Exit"); } //----------------------------------------------------------------------------- @@ -1024,22 +1378,18 @@ void iso14443b_setup() { // // I tried to be systematic and check every answer of the tag, every CRC, etc... //----------------------------------------------------------------------------- -void ReadSTMemoryIso14443b(uint32_t dwLast) +void ReadSTMemoryIso14443b(uint8_t numofblocks) { FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); - clear_trace(); + // Make sure that we start from off, since the tags are stateful; + // confusing things will happen if we don't reset them between reads. + switch_off(); // before ReadStMemory + set_tracing(TRUE); uint8_t i = 0x00; - // Make sure that we start from off, since the tags are stateful; - // confusing things will happen if we don't reset them between reads. - LED_D_OFF(); - FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); - SpinDelay(200); - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); FpgaSetupSsc(); @@ -1047,12 +1397,12 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // Signal field is on with the appropriate LED LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); - SpinDelay(200); + SpinDelay(20); // First command: wake up the tag using the INITIATE command - uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; - CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + uint8_t cmd1[] = {ISO14443B_INITIATE, 0x00, 0x97, 0x5b}; + CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no + GetTagSamplesFor14443bDemod(); // no if (Demod.len == 0) { DbpString("No response from tag"); @@ -1065,11 +1415,11 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // There is a response, SELECT the uid DbpString("Now SELECT tag:"); - cmd1[0] = 0x0E; // 0x0E is SELECT + cmd1[0] = ISO14443B_SELECT; // 0x0E is SELECT cmd1[1] = Demod.output[0]; ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); - CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no + GetTagSamplesFor14443bDemod(); //no if (Demod.len != 3) { Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); set_tracing(FALSE); @@ -1091,10 +1441,10 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // Tag is now selected, // First get the tag's UID: - cmd1[0] = 0x0B; + cmd1[0] = ISO14443B_GET_UID; ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); - CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + CodeAndTransmit14443bAsReader(cmd1, 3); // no -- Only first three bytes for this one + GetTagSamplesFor14443bDemod(); //no if (Demod.len != 10) { Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); set_tracing(FALSE); @@ -1112,22 +1462,24 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); // Now loop to read all 16 blocks, address from 0 to last block - Dbprintf("Tag memory dump, block 0 to %d", dwLast); + Dbprintf("Tag memory dump, block 0 to %d", numofblocks); cmd1[0] = 0x08; i = 0x00; - dwLast++; + ++numofblocks; + for (;;) { - if (i == dwLast) { + if (i == numofblocks) { DbpString("System area block (0xff):"); i = 0xff; } cmd1[1] = i; ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); - CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no + GetTagSamplesFor14443bDemod(); //no + if (Demod.len != 6) { // Check if we got an answer from the tag - DbpString("Expected 6 bytes from tag, got less..."); - return; + DbpString("Expected 6 bytes from tag, got less..."); + return; } // The check the CRC of the answer (use cmd1 as temporary variable): ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); @@ -1140,16 +1492,52 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], (Demod.output[4]<<8)+Demod.output[5]); - if (i == 0xff) { - break; - } - i++; + + if (i == 0xff) break; + ++i; } set_tracing(FALSE); } +static void iso1444b_setup_snoop(void){ + if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup_snoop Enter"); + LEDsoff(); + FpgaDownloadAndGo(FPGA_BITSTREAM_HF); + BigBuf_free(); + BigBuf_Clear_ext(false); + clear_trace();//setup snoop + set_tracing(TRUE); + + // Initialize Demod and Uart structs + DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); + UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); + + if (MF_DBGLEVEL > 1) { + // Print debug information about the buffer sizes + Dbprintf("Snooping buffers initialized:"); + Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); + Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); + Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); + Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); + } + + // connect Demodulated Signal to ADC: + SetAdcMuxFor(GPIO_MUXSEL_HIPKD); + + // Setup for the DMA. + FpgaSetupSsc(); + + // Set FPGA in the appropriate mode + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); + SpinDelay(20); + + // Start the SSP timer + StartCountSspClk(); + if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup_snoop Exit"); +} + //============================================================================= // Finally, the `sniffer' combines elements from both the reader and // simulated tag, to show both sides of the conversation. @@ -1167,188 +1555,219 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE * Demodulated samples received - all the rest */ -void RAMFUNC SnoopIso14443b(void) -{ +void RAMFUNC SnoopIso14443b(void) { + + uint32_t time_0 = 0, time_start = 0, time_stop = 0; + int ci = 0, cq = 0; + int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; + // We won't start recording the frames that we acquire until we trigger; // a good trigger condition to get started is probably when we see a // response from the tag. - int triggered = TRUE; // TODO: set and evaluate trigger condition - - FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); - - clear_trace(); - set_tracing(TRUE); + bool triggered = TRUE; // TODO: set and evaluate trigger condition + bool TagIsActive = FALSE; + bool ReaderIsActive = FALSE; + iso1444b_setup_snoop(); + // The DMA buffer, used to stream samples from the FPGA int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); - int lastRxCounter; - int8_t *upTo; - int ci, cq; - int maxBehindBy = 0; - - // Count of samples received so far, so that we can include timing - // information in the trace buffer. - int samples = 0; - - DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); - UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); - - // Print some debug information about the buffer sizes - Dbprintf("Snooping buffers initialized:"); - Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); - Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); - Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); - Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); - - // Signal field is off, no reader signal, no tag signal - LEDsoff(); - - // And put the FPGA in the appropriate mode - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - - // Setup for the DMA. - FpgaSetupSsc(); - upTo = dmaBuf; - lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; - FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; + int8_t *upTo = dmaBuf; - bool TagIsActive = FALSE; - bool ReaderIsActive = FALSE; + // Setup and start DMA. + if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE) ){ + if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); + BigBuf_free(); + return; + } + + time_0 = GetCountSspClk(); // And now we loop, receiving samples. for(;;) { - int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & - (ISO14443B_DMA_BUFFER_SIZE-1); - if(behindBy > maxBehindBy) { - maxBehindBy = behindBy; - } - if(behindBy < 2) continue; + WDT_HIT(); ci = upTo[0]; cq = upTo[1]; - upTo += 2; + upTo += 2; lastRxCounter -= 2; - if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { + + if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { upTo = dmaBuf; - lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; + lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; - WDT_HIT(); - if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not? - Dbprintf("blew circular buffer! behindBy=%d", behindBy); - break; - } - - if(!tracing) { - DbpString("Trace full"); + + if (!tracing) { + if (MF_DBGLEVEL >= 2) DbpString("Trace full"); break; } - - if(BUTTON_PRESS()) { - DbpString("cancelled"); + + if (BUTTON_PRESS()) { + if (MF_DBGLEVEL >= 2) DbpString("cancelled"); break; } } + + if (!TagIsActive) { + + LED_A_ON(); + + // no need to try decoding reader data if the tag is sending + if (Handle14443bReaderUartBit(ci & 0x01)) { - samples += 2; - - if (!TagIsActive) { // no need to try decoding reader data if the tag is sending - if (Handle14443bUartBit(ci & 0x01)) { - if ( triggered) - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + time_stop = GetCountSspClk() - time_0; + + if (triggered) + LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, NULL, TRUE); /* And ready to receive another command. */ UartReset(); /* And also reset the demod code, which might have been */ /* false-triggered by the commands from the reader. */ DemodReset(); + } else { + time_start = GetCountSspClk() - time_0; } - if (Handle14443bUartBit(cq & 0x01)) { + + if (Handle14443bReaderUartBit(cq & 0x01)) { + + time_stop = GetCountSspClk() - time_0; + if (triggered) - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, NULL, TRUE); - /* And ready to receive another command. */ - UartReset(); - /* And also reset the demod code, which might have been */ - /* false-triggered by the commands from the reader. */ - DemodReset(); - } + /* And ready to receive another command. */ + UartReset(); + /* And also reset the demod code, which might have been */ + /* false-triggered by the commands from the reader. */ + DemodReset(); + } else { + time_start = GetCountSspClk() - time_0; + } ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); + LED_A_OFF(); } - - if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time + + if (!ReaderIsActive) { + // no need to try decoding tag data if the reader is sending - and we cannot afford the time // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103 - if(Handle14443bSamplesDemod(ci & 0xfe, cq & 0xfe)) { - - //Use samples as a time measurement - LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); + // LSB is a fpga signal bit. + if (Handle14443bTagSamplesDemod(ci >> 1, cq >> 1)) { + + time_stop = GetCountSspClk() - time_0; + + LogTrace(Demod.output, Demod.len, time_start, time_stop, NULL, FALSE); triggered = TRUE; // And ready to receive another response. DemodReset(); + } else { + time_start = GetCountSspClk() - time_0; } TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); } } - FpgaDisableSscDma(); - LEDsoff(); + switch_off(); // Snoop - AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; DbpString("Snoop statistics:"); - Dbprintf(" Max behind by: %i", maxBehindBy); - Dbprintf(" Uart State: %x", Uart.state); - Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); - Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); + Dbprintf(" Uart State: %x ByteCount: %i ByteCountMax: %i", Uart.state, Uart.byteCnt, Uart.byteCntMax); Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); - set_tracing(FALSE); + + // free mem refs. + if ( upTo ) upTo = NULL; + + // Uart.byteCntMax should be set with ATQB value.. } +void iso14b_set_trigger(bool enable) { + trigger = enable; +} /* * Send raw command to tag ISO14443B * @Input - * datalen len of buffer data - * recv bool when true wait for data from tag and send to client - * powerfield bool leave the field on when true - * data buffer with byte to send + * param flags enum ISO14B_COMMAND. (mifare.h) + * len len of buffer data + * data buffer with bytes to send * * @Output * none * */ -void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) +void SendRawCommand14443B_Ex(UsbCommand *c) { - // param ISO_ - // param ISO_CONNECT - // param ISO14A_NO_DISCONNECT - //if (param & ISO14A_NO_DISCONNECT) - // return; - iso14443b_setup(); - - if ( datalen == 0 && recv == 0 && powerfield == 0){ - - } else { - set_tracing(TRUE); - CodeAndTransmit14443bAsReader(data, datalen); + iso14b_command_t param = c->arg[0]; + size_t len = c->arg[1] & 0xffff; + uint8_t *cmd = c->d.asBytes; + uint8_t status = 0; + uint32_t sendlen = sizeof(iso14b_card_select_t); + uint8_t buf[USB_CMD_DATA_SIZE] = {0x00}; + + if (MF_DBGLEVEL > 3) Dbprintf("14b raw: param, %04x", param ); + + // turn on trigger (LED_A) + if ((param & ISO14B_REQUEST_TRIGGER) == ISO14B_REQUEST_TRIGGER) + iso14b_set_trigger(TRUE); + + if ((param & ISO14B_CONNECT) == ISO14B_CONNECT) { + // Make sure that we start from off, since the tags are stateful; + // confusing things will happen if we don't reset them between reads. + //switch_off(); // before connect in raw + iso14443b_setup(); } + + set_tracing(TRUE); - if (recv) { - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE); - uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); - cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); + if ((param & ISO14B_SELECT_STD) == ISO14B_SELECT_STD) { + iso14b_card_select_t *card = (iso14b_card_select_t*)buf; + status = iso14443b_select_card(card); + cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen); + // 0: OK 2: attrib fail, 3:crc fail, + if ( status > 0 ) return; + } + + if ((param & ISO14B_SELECT_SR) == ISO14B_SELECT_SR) { + iso14b_card_select_t *card = (iso14b_card_select_t*)buf; + status = iso14443b_select_srx_card(card); + cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen); + // 0: OK 2: attrib fail, 3:crc fail, + if ( status > 0 ) return; + } + + if ((param & ISO14B_APDU) == ISO14B_APDU) { + status = iso14443b_apdu(cmd, len, buf); + cmd_send(CMD_ACK, status, status, 0, buf, status); + } + + if ((param & ISO14B_RAW) == ISO14B_RAW) { + if((param & ISO14B_APPEND_CRC) == ISO14B_APPEND_CRC) { + AppendCrc14443b(cmd, len); + len += 2; + } + + CodeAndTransmit14443bAsReader(cmd, len); // raw + GetTagSamplesFor14443bDemod(); // raw + + sendlen = MIN(Demod.len, USB_CMD_DATA_SIZE); + status = (Demod.len > 0) ? 0 : 1; + cmd_send(CMD_ACK, status, sendlen, 0, Demod.output, sendlen); } - if (!powerfield) { - FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); - FpgaDisableSscDma(); - set_tracing(FALSE); - LED_D_OFF(); + // turn off trigger (LED_A) + if ((param & ISO14B_REQUEST_TRIGGER) == ISO14B_REQUEST_TRIGGER) + iso14b_set_trigger(FALSE); + + // turn off antenna et al + // we don't send a HALT command. + if ((param & ISO14B_DISCONNECT) == ISO14B_DISCONNECT) { + if (MF_DBGLEVEL > 3) Dbprintf("disconnect"); + switch_off(); // disconnect raw + } else { + //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); } -} - + +} \ No newline at end of file