]> cvs.zerfleddert.de Git - proxmark3-svn/commit - fpga/Makefile
New LF edge detection algorithm + lowpass filter
authoriZsh <izsh@fail0verflow.com>
Sat, 21 Jun 2014 22:26:38 +0000 (00:26 +0200)
committeriZsh <izsh@fail0verflow.com>
Fri, 27 Jun 2014 12:27:03 +0000 (14:27 +0200)
commit3b2fee43ea7d9e08b7729d662d8d010ee0e2a2e3
treea5f1aa0cb5bfc8f75398186dbe4da2f41e53714b
parente17437f985b1c955b3a2e3cab4f9146db54631a1
New LF edge detection algorithm + lowpass filter

This is a new LF edge detection algorithm for the FPGA.

- It uses a low-pass IIR filter to clean the signal
(see https://fail0verflow.com/blog/2014/proxmark3-fpga-iir-filter.html)
- The algorithm is able to detect consecutive peaks in the same
  direction
- It uses an envelope follower to dynamically adjust the peak thresholds
- The main threshold used in the envelope follower can be set from the ARM side

fpga/lf_edge_detect.v,
fpga/lp20khz_1MSa_iir_filter.v,
fpga/min_max_tracker.v: New file.

fpga/lo_edge_detect.v, fpga/fpga_lf.v: Modify accordingly.

armsrc/apps.h (FPGA_CMD_SET_USER_BYTE1,
FPGA_CMD_SET_EDGE_DETECT_THRESHOLD): New FPGA command.
fpga/fpga_lf.v: Modify accordingly/Add a 8bit user register.

fpga/fpga_lf.bit: Update accordingly.

fpga/tests: New directory for testbenches

fpga/tests/Makefile: New file. It compiles the testbenches
and runs all the tests by default (comparing with the golden output)

fpga/tests/tb_lp20khz_1MSa_iir_filter.v,
fpga/tests/tb_min_max_tracker.v,
fpga/tests/tb_lf_edge_detect.v: New testbenches

fpga/tests/plot_edgedetect.py: New script to plot the results from
the edge detection tests.

fpga/tests/tb_data: New directory for data and golden outputs
36 files changed:
.gitignore
armsrc/apps.h
fpga/Makefile
fpga/fpga_lf.bit
fpga/fpga_lf.v
fpga/lf_edge_detect.v [new file with mode: 0644]
fpga/lo_edge_detect.v
fpga/lp20khz_1MSa_iir_filter.v [new file with mode: 0644]
fpga/min_max_tracker.v [new file with mode: 0644]
fpga/tests/Makefile [new file with mode: 0644]
fpga/tests/plot_edgedetect.py [new file with mode: 0755]
fpga/tests/tb_data/pcf7931_read_1MSA_data.filtered.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.high.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.highz.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.in [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.low.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.lowz.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.max.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.min.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.state.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.time [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_read_1MSA_data.toggle.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.filtered.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.high.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.highz.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.in [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.low.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.lowz.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.max.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.min.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.state.gold [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.time [new file with mode: 0644]
fpga/tests/tb_data/pcf7931_write1byte_1MSA_data.toggle.gold [new file with mode: 0644]
fpga/tests/tb_lf_edge_detect.v [new file with mode: 0644]
fpga/tests/tb_lp20khz_1MSa_iir_filter.v [new file with mode: 0644]
fpga/tests/tb_min_max_tracker.v [new file with mode: 0644]
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