]> cvs.zerfleddert.de Git - proxmark3-svn/commit - fpga/hi_read_tx.v
Legic: rewrite reader to use xcorrelation and precise timing (#654)
authorAntiCat <contiki@anticat.ch>
Mon, 20 Aug 2018 20:29:34 +0000 (22:29 +0200)
committerpwpiwi <pwpiwi@users.noreply.github.com>
Mon, 20 Aug 2018 20:29:34 +0000 (22:29 +0200)
commitda05bc6eca632aa8ef5251942919ab8650191357
tree56ea9cf12bb859736486dba5920aebf21e2469d1
parent315e18e66cea20bd426be9b05337f53c9055e0c7
Legic: rewrite reader to use xcorrelation and precise timing (#654)

* Legic: rewrite reader to use xcorrelation and precise timing
 - Even tough Legic tags transmit just AM, receiving using
   xcorrelation results in a significantly better signal
   quality.
 - Switching from bit bang to a hardware based ssc frees
   up CPU time for other tasks e.g. prng and demodulation
 - Having all times based on a fixed ts, results in perfect
   rwd-tag synchronization without magic +/- calculations.
* hi_read_tx: remove jerry-riged hysteresis based receiver
- This feature got obsolete by a x-correlation based receiver.
* Legic: adjusted sampling to new ssp clock speed
- Sampling is 4 times faster and pipeline daly reduced to 1/4.
 The new code samples each bit earyler to account for the
 shorter pipeline. That introduced bit errors by leeking the
 next bit into the current one.
* Legic: average 8 samples for better noise rejection.
* Update CHANGELOG.md
CHANGELOG.md
armsrc/legicrf.c
armsrc/legicrf.h
fpga/hi_read_tx.v
include/legic.h [new file with mode: 0644]
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