CHG: Xoring in the value allows for the ticks timers to co-exist. Or that is the...

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 86f144cfefd6a5c43b7ad7301442bbf1b29432c0..08a3866340f6229ab5a3f7b304cefaa25336a8ea 100644 (file)
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -126,7 +126,7 @@ void FpgaSetupSsc(void) {
                GPIO_SSC_CLK;
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
 
                GPIO_SSC_CLK;
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
 

-       AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC);
+       AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_SSC);

 
        // Now set up the SSC proper, starting from a known state.
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
 
        // Now set up the SSC proper, starting from a known state.
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;

diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h
index 5c0f802e4123340453011b1d984b3d21f05b8ae9..5e5e6af65fe877d73c8e483042c903f936820e1b 100644 (file)
--- a/armsrc/fpgaloader.h
+++ b/armsrc/fpgaloader.h
@@ -59,11 +59,11 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_HF_READER_RX_XCORR_SNOOP                          (1<<1)
 #define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ           (1<<2)
 // Options for the HF simulated tag, how to modulate
 #define FPGA_HF_READER_RX_XCORR_SNOOP                          (1<<1)
 #define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ           (1<<2)
 // Options for the HF simulated tag, how to modulate

-#define FPGA_HF_SIMULATOR_NO_MODULATION                                (0<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_BPSK                                (1<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_212K                                (2<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_424K                                (4<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT           0x5//101
+#define FPGA_HF_SIMULATOR_NO_MODULATION                                (0<<0) // 0000
+#define FPGA_HF_SIMULATOR_MODULATE_BPSK                                (1<<0) // 0001
+#define FPGA_HF_SIMULATOR_MODULATE_212K                                (2<<0) // 0010
+#define FPGA_HF_SIMULATOR_MODULATE_424K                                (4<<0) // 0100
+#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT           0x5    // 0101

 //  no 848K 
 
 // Options for ISO14443A
 //  no 848K 
 
 // Options for ISO14443A