From: iceman1001 <iceman@iuse.se>
Date: Mon, 10 Oct 2016 19:53:44 +0000 (+0200)
Subject: CHG:  syntax suger
X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/c7b4bcc4ab0a799e5ffca43cf46e4aa881d3a6d1?ds=inline

CHG:  syntax suger
---

diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c
index 5d506c3b..68f0c366 100644
--- a/armsrc/iso14443b.c
+++ b/armsrc/iso14443b.c
@@ -453,7 +453,7 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) {
 		
 	StartCountSspClk();
 	
-	volatile uint8_t b;
+	volatile uint8_t b = 0;
 
 	// clear receiving shift register and holding register
 	// What does this loop do? Is it TR1?
@@ -467,7 +467,6 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) {
 	// Now run a `software UART' on the stream of incoming samples.
 	UartInit(received);
 
-	b = 0;
 	uint8_t mask;
 	while( !BUTTON_PRESS() ) {
 		WDT_HIT();
@@ -490,11 +489,11 @@ void ClearFpgaShiftingRegisters(void){
 	volatile uint8_t b;
 
 	// clear receiving shift register and holding register
-	while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+	while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {};
 
 	b = AT91C_BASE_SSC->SSC_RHR; (void) b;
 
-	while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+	while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {};
 
 	b = AT91C_BASE_SSC->SSC_RHR; (void) b;