From: marshmellow42 Date: Thu, 15 Oct 2015 05:09:49 +0000 (-0400) Subject: adjust lf t55xx read commands X-Git-Tag: v2.3.0~15^2~18 X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/f4eadf8a50c4eed513fcb93b05c21ddadbddb2ed adjust lf t55xx read commands seems to make them a lot more accurate for me --- diff --git a/armsrc/lfops.c b/armsrc/lfops.c index 36420e57..0be81bc2 100644 --- a/armsrc/lfops.c +++ b/armsrc/lfops.c @@ -1085,6 +1085,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol) #define T55x7_MODULATION_FSK2a 0x00007000 #define T55x7_MODULATION_MANCHESTER 0x00008000 #define T55x7_MODULATION_BIPHASE 0x00010000 +#define T55x7_MODULATION_DIPHASE 0x00018000 #define T55x7_BITRATE_RF_8 0 #define T55x7_BITRATE_RF_16 0x00040000 #define T55x7_BITRATE_RF_32 0x00080000 @@ -1126,7 +1127,9 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol) #define WRITE_1 50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc) 432 for T55x7; 448 for E5550 #define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..) - +#define T55xx_READ_UPPER_THRESHOLD 128+40 // 50 +#define T55xx_READ_TOL 5 +//#define T55xx_READ_LOWER_THRESHOLD 128-40 //-50 // Write one bit to card void T55xxWriteBit(int bit) { @@ -1148,7 +1151,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod // Set up FPGA, 125kHz // Wait for config.. (192+8190xPOW)x8 == 67ms - LFSetupFPGAForADC(0, true); + LFSetupFPGAForADC(95, true); // Now start writting FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); @@ -1184,7 +1187,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod void TurnReadLFOn(){ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); // Give it a bit of time for the resonant antenna to settle. - SpinDelayUs(8*150); + SpinDelayUs(50*8); //155*8 } @@ -1196,13 +1199,26 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode) uint16_t bufferlength = BigBuf_max_traceLen(); if ( bufferlength > T55xx_SAMPLES_SIZE ) bufferlength = T55xx_SAMPLES_SIZE; - + Block &= 0x7; //make sure block is at max 7 // Clear destination buffer before sending the command memset(dest, 0x80, bufferlength); // Set up FPGA, 125kHz // Wait for config.. (192+8190xPOW)x8 == 67ms - LFSetupFPGAForADC(0, true); + + LFSetupFPGAForADC(95, true); + FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); + + // Connect the A/D to the peak-detected low-frequency path. + SetAdcMuxFor(GPIO_MUXSEL_LOPKD); + + // Now set up the SSC to get the ADC samples that are now streaming at us. + FpgaSetupSsc(); + + // Give it a bit of time for the resonant antenna to settle. + //SpinDelayUs(8*200); //192FC + SpinDelay(50); + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); SpinDelayUs(START_GAP); @@ -1224,16 +1240,34 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode) TurnReadLFOn(); // Now do the acquisition i = 0; + bool startFound = false; + bool highFound = false; + uint8_t curSample = 0; + uint8_t firstSample = 0; for(;;) { if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { AT91C_BASE_SSC->SSC_THR = 0x43; LED_D_ON(); } if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { - dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - i++; - LED_D_OFF(); - if (i >= bufferlength) break; + curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + + // find first high sample + if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) { + if (curSample > firstSample) firstSample = curSample; + highFound = true; + } else if (!highFound) { + continue; + } + + // skip until samples begin to change + if (startFound || curSample < firstSample-T55xx_READ_TOL){ + if (!startFound) dest[i++] = firstSample; + startFound = true; + dest[i++] = curSample; + LED_D_OFF(); + if (i >= bufferlength) break; + } } } @@ -1266,17 +1300,34 @@ void T55xxReadTrace(void){ TurnReadLFOn(); // Now do the acquisition + bool startFound = false;// false; + bool highFound = false; + uint8_t curSample = 0; + uint8_t firstSample = 0; for(;;) { if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { AT91C_BASE_SSC->SSC_THR = 0x43; LED_D_ON(); } if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { - dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - i++; - LED_D_OFF(); + curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + + // find first high sample + if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) { + if (curSample > firstSample) firstSample = curSample; + highFound = true; + } else if (!highFound) { + continue; + } - if (i >= bufferlength) break; + // skip until samples begin to change + if (startFound || curSample < firstSample-T55xx_READ_TOL){ + if (!startFound) dest[i++] = firstSample; + startFound = true; + dest[i++] = curSample; + LED_D_OFF(); + if (i >= bufferlength) break; + } } } diff --git a/client/cmdlft55xx.c b/client/cmdlft55xx.c index 88754724..c2a99ce3 100644 --- a/client/cmdlft55xx.c +++ b/client/cmdlft55xx.c @@ -270,8 +270,8 @@ bool DecodeT55xxBlock(){ DemodBufferLen = 0x00; //trim 1/2 a clock from beginning - snprintf(cmdStr, sizeof(buf),"%d", bitRate[config.bitrate]/2 ); - CmdLtrim(cmdStr); + //snprintf(cmdStr, sizeof(buf),"%d", bitRate[config.bitrate]/2 ); + //CmdLtrim(cmdStr); switch( config.modulation ){ case DEMOD_FSK: snprintf(cmdStr, sizeof(buf),"%d %d", bitRate[config.bitrate], config.inverted ); @@ -333,7 +333,7 @@ int CmdT55xxDetect(const char *Cmd){ // detect configuration? bool tryDetectModulation(){ - char cmdStr[8] = {0}; + //char cmdStr[8] = {0}; uint8_t hits = 0; t55xx_conf_block_t tests[15]; int bitRate=0; @@ -341,8 +341,8 @@ bool tryDetectModulation(){ save_restoreGB(1); if (GetFskClock("", FALSE, FALSE)){ fskClocks(&fc1, &fc2, &clk, FALSE); - sprintf(cmdStr,"%d", clk/2); - CmdLtrim(cmdStr); + //sprintf(cmdStr,"%d", clk/2); + //CmdLtrim(cmdStr); if ( FSKrawDemod("0 0", FALSE) && test(DEMOD_FSK, &tests[hits].offset, &bitRate)){ tests[hits].modulation = DEMOD_FSK; if (fc1==8 && fc2 == 5) @@ -369,8 +369,8 @@ bool tryDetectModulation(){ } else { clk = GetAskClock("", FALSE, FALSE); if (clk>0) { - sprintf(cmdStr,"%d", clk/2); - CmdLtrim(cmdStr); + //sprintf(cmdStr,"%d", clk/2); + //CmdLtrim(cmdStr); if ( ASKDemod("0 0 0", FALSE, FALSE, 1) && test(DEMOD_ASK, &tests[hits].offset, &bitRate)) { tests[hits].modulation = DEMOD_ASK; tests[hits].bitrate = bitRate; @@ -404,8 +404,8 @@ bool tryDetectModulation(){ save_restoreGB(0); clk = GetNrzClock("", FALSE, FALSE); if (clk>0) { - sprintf(cmdStr,"%d", clk/2); - CmdLtrim(cmdStr); + //sprintf(cmdStr,"%d", clk/2); + //CmdLtrim(cmdStr); if ( NRZrawDemod("0 0 1", FALSE) && test(DEMOD_NRZ, &tests[hits].offset, &bitRate)) { tests[hits].modulation = DEMOD_NRZ; tests[hits].bitrate = bitRate; @@ -427,9 +427,9 @@ bool tryDetectModulation(){ save_restoreGB(0); clk = GetPskClock("", FALSE, FALSE); if (clk>0) { - PrintAndLog("clk %d",clk); - sprintf(cmdStr,"%d", clk/2); - CmdLtrim(cmdStr); + //PrintAndLog("clk %d",clk); + //sprintf(cmdStr,"%d", clk/2); + //CmdLtrim(cmdStr); if ( PSKDemod("0 0 1", FALSE) && test(DEMOD_PSK1, &tests[hits].offset, &bitRate)) { tests[hits].modulation = DEMOD_PSK1; tests[hits].bitrate = bitRate; diff --git a/common/lfdemod.c b/common/lfdemod.c index a3a7a500..3b9402cc 100644 --- a/common/lfdemod.c +++ b/common/lfdemod.c @@ -369,7 +369,9 @@ size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow if (fclow==0) fclow=8; //set the threshold close to 0 (graph) or 128 std to avoid static uint8_t threshold_value = 123; - + size_t preLastSample = 0; + size_t LastSample = 0; + size_t currSample = 0; // sync to first lo-hi transition, and threshold // Need to threshold first sample @@ -389,13 +391,22 @@ size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow // Check for 0->1 transition if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition - if ((idx-last_transition)<(fclow-2)){ //0-5 = garbage noise + preLastSample = LastSample; + LastSample = currSample; + currSample = idx-last_transition; + if (currSample < (fclow-2)){ //0-5 = garbage noise //do nothing with extra garbage - } else if ((idx-last_transition) < (fchigh-1)) { //6-8 = 8 waves + } else if (currSample < (fchigh-1)) { //6-8 = 8 sample waves + if (LastSample > (fchigh-2) && preLastSample < (fchigh-1)){ + dest[numBits-1]=1; //correct last 9 wave surrounded by 8 waves + } dest[numBits++]=1; - } else if ((idx-last_transition) > (fchigh+1) && !numBits) { //12 + and first bit = garbage + + } else if (currSample > (fchigh+1) && !numBits) { //12 + and first bit = garbage //do nothing with beginning garbage - } else { //9+ = 10 waves + } else if (currSample == (fclow+1) && LastSample == (fclow-1)) { // had a 7 then a 9 should be two 8's + dest[numBits++]=1; + } else { //9+ = 10 sample waves dest[numBits++]=0; } last_transition = idx;