From 6949aca9fa0e37539fc277bac78e3d7a22117467 Mon Sep 17 00:00:00 2001 From: d18c7db Date: Tue, 29 Sep 2009 12:13:41 +0000 Subject: [PATCH] Pushed standard AT91 defines into main code --- armsrc/LCD.c | 8 +- armsrc/LCD.h | 3 - armsrc/appmain.c | 1530 ++++++++++++++++++++-------------------- armsrc/apps.h | 24 +- armsrc/fpgaloader.c | 134 ++-- armsrc/iso14443.c | 236 +++---- armsrc/iso14443a.c | 50 +- armsrc/iso15693.c | 56 +- armsrc/lfops.c | 140 ++-- armsrc/util.c | 40 +- bootrom/bootrom.c | 174 ++--- common/Makefile.common | 2 +- common/usb.c | 124 ++-- include/at91sam7s128.h | 220 ------ include/config_gpio.h | 67 +- include/proxmark3.h | 85 ++- 16 files changed, 1370 insertions(+), 1523 deletions(-) delete mode 100644 include/at91sam7s128.h diff --git a/armsrc/LCD.c b/armsrc/LCD.c index 02c2f696..8e44f7de 100644 --- a/armsrc/LCD.c +++ b/armsrc/LCD.c @@ -5,10 +5,10 @@ void LCDSend(unsigned int data) { // 9th bit set for data, clear for command - while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete + while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); // wait for the transfer to complete // For clarity's sake we pass data with 9th bit clear and commands with 9th // bit set since they're implemented as defines, se we need to invert bit - SPI_TX_DATA = data^0x100; // Send the data/command + AT91C_BASE_SPI->SPI_TDR = data^0x100; // Send the data/command } void LCDSetXY(unsigned char x, unsigned char y) @@ -86,10 +86,10 @@ void LCDReset(void) { LED_A_ON(); SetupSpi(SPI_LCD_MODE); - LCD_RESET_LOW(); + LOW(GPIO_LRST); SpinDelay(100); - LCD_RESET_HIGH(); + HIGH(GPIO_LRST); SpinDelay(100); LED_A_OFF(); } diff --git a/armsrc/LCD.h b/armsrc/LCD.h index 27971eba..17b334d1 100644 --- a/armsrc/LCD.h +++ b/armsrc/LCD.h @@ -1,9 +1,6 @@ #ifndef __LCD #define __LCD -#define LCD_RESET_HIGH() PIO_OUTPUT_DATA_SET |= (1< -#include -#include "apps.h" -#ifdef WITH_LCD -#include "fonts.h" -#include "LCD.h" -#endif - -//============================================================================= -// A buffer where we can queue things up to be sent through the FPGA, for -// any purpose (fake tag, as reader, whatever). We go MSB first, since that -// is the order in which they go out on the wire. -//============================================================================= - -BYTE ToSend[256]; -int ToSendMax; -static int ToSendBit; -struct common_area common_area __attribute__((section(".commonarea"))); - -void BufferClear(void) -{ - memset(BigBuf,0,sizeof(BigBuf)); - DbpString("Buffer cleared"); -} - -void ToSendReset(void) -{ - ToSendMax = -1; - ToSendBit = 8; -} - -void ToSendStuffBit(int b) -{ - if(ToSendBit >= 8) { - ToSendMax++; - ToSend[ToSendMax] = 0; - ToSendBit = 0; - } - - if(b) { - ToSend[ToSendMax] |= (1 << (7 - ToSendBit)); - } - - ToSendBit++; - - if(ToSendBit >= sizeof(ToSend)) { - ToSendBit = 0; - DbpString("ToSendStuffBit overflowed!"); - } -} - -//============================================================================= -// Debug print functions, to go out over USB, to the usual PC-side client. -//============================================================================= - -void DbpString(char *str) -{ - /* this holds up stuff unless we're connected to usb */ - if (!UsbConnected()) - return; - - UsbCommand c; - c.cmd = CMD_DEBUG_PRINT_STRING; - c.ext1 = strlen(str); - memcpy(c.d.asBytes, str, c.ext1); - - UsbSendPacket((BYTE *)&c, sizeof(c)); - // TODO fix USB so stupid things like this aren't req'd - SpinDelay(50); -} - -void DbpIntegers(int x1, int x2, int x3) -{ - /* this holds up stuff unless we're connected to usb */ - if (!UsbConnected()) - return; - - UsbCommand c; - c.cmd = CMD_DEBUG_PRINT_INTEGERS; - c.ext1 = x1; - c.ext2 = x2; - c.ext3 = x3; - - UsbSendPacket((BYTE *)&c, sizeof(c)); - // XXX - SpinDelay(50); -} - -//----------------------------------------------------------------------------- -// Read an ADC channel and block till it completes, then return the result -// in ADC units (0 to 1023). Also a routine to average 32 samples and -// return that. -//----------------------------------------------------------------------------- -static int ReadAdc(int ch) -{ - DWORD d; - - ADC_CONTROL = ADC_CONTROL_RESET; - ADC_MODE = ADC_MODE_PRESCALE(32) | ADC_MODE_STARTUP_TIME(16) | - ADC_MODE_SAMPLE_HOLD_TIME(8); - ADC_CHANNEL_ENABLE = ADC_CHANNEL(ch); - - ADC_CONTROL = ADC_CONTROL_START; - while(!(ADC_STATUS & ADC_END_OF_CONVERSION(ch))) - ; - d = ADC_CHANNEL_DATA(ch); - - return d; -} - -static int AvgAdc(int ch) -{ - int i; - int a = 0; - - for(i = 0; i < 32; i++) { - a += ReadAdc(ch); - } - - return (a + 15) >> 5; -} - -void MeasureAntennaTuning(void) -{ - BYTE *dest = (BYTE *)BigBuf; - int i, ptr = 0, adcval = 0, peak = 0, peakv = 0, peakf = 0;; - int vLf125 = 0, vLf134 = 0, vHf = 0; // in mV - - UsbCommand c; - - DbpString("Measuring antenna characteristics, please wait."); - memset(BigBuf,0,sizeof(BigBuf)); - -/* - * Sweeps the useful LF range of the proxmark from - * 46.8kHz (divisor=255) to 600kHz (divisor=19) and - * read the voltage in the antenna, the result left - * in the buffer is a graph which should clearly show - * the resonating frequency of your LF antenna - * ( hopefully around 95 if it is tuned to 125kHz!) - */ - FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER); - for (i=255; i>19; i--) { - FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i); - SpinDelay(20); - // Vref = 3.3V, and a 10000:240 voltage divider on the input - // can measure voltages up to 137500 mV - adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10); - if (i==95) vLf125 = adcval; // voltage at 125Khz - if (i==89) vLf134 = adcval; // voltage at 134Khz - - dest[i] = adcval>>8; // scale int to fit in byte for graphing purposes - if(dest[i] > peak) { - peakv = adcval; - peak = dest[i]; - peakf = i; - ptr = i; - } - } - - // Let the FPGA drive the high-frequency antenna around 13.56 MHz. - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR); - SpinDelay(20); - // Vref = 3300mV, and an 10:1 voltage divider on the input - // can measure voltages up to 33000 mV - vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10; - - c.cmd = CMD_MEASURED_ANTENNA_TUNING; - c.ext1 = (vLf125 << 0) | (vLf134 << 16); - c.ext2 = vHf; - c.ext3 = peakf | (peakv << 16); - UsbSendPacket((BYTE *)&c, sizeof(c)); -} - -void SimulateTagHfListen(void) -{ - BYTE *dest = (BYTE *)BigBuf; - int n = sizeof(BigBuf); - BYTE v = 0; - int i; - int p = 0; - - // We're using this mode just so that I can test it out; the simulated - // tag mode would work just as well and be simpler. - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); - - // We need to listen to the high-frequency, peak-detected path. - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - - FpgaSetupSsc(); - - i = 0; - for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0xff; - } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - BYTE r = (BYTE)SSC_RECEIVE_HOLDING; - - v <<= 1; - if(r & 1) { - v |= 1; - } - p++; - - if(p >= 8) { - dest[i] = v; - v = 0; - p = 0; - i++; - - if(i >= n) { - break; - } - } - } - } - DbpString("simulate tag (now type bitsamples)"); -} - -void ReadMem(int addr) -{ - const DWORD *data = ((DWORD *)addr); - int i; - - DbpString("Reading memory at address"); - DbpIntegers(0, 0, addr); - for (i = 0; i < 8; i+= 2) - DbpIntegers(0, data[i], data[i+1]); -} - -/* osimage version information is linked in */ -extern struct version_information version_information; -/* bootrom version information is pointed to from _bootphase1_version_pointer */ -extern char *_bootphase1_version_pointer, _flash_start, _flash_end; -void SendVersion(void) -{ - char temp[48]; /* Limited data payload in USB packets */ - DbpString("Prox/RFID mark3 RFID instrument"); - - /* Try to find the bootrom version information. Expect to find a pointer at - * symbol _bootphase1_version_pointer, perform slight sanity checks on the - * pointer, then use it. - */ - char *bootrom_version = *(char**)&_bootphase1_version_pointer; - if( bootrom_version < &_flash_start || bootrom_version >= &_flash_end ) { - DbpString("bootrom version information appears invalid"); - } else { - FormatVersionInformation(temp, sizeof(temp), "bootrom: ", bootrom_version); - DbpString(temp); - } - - FormatVersionInformation(temp, sizeof(temp), "os: ", &version_information); - DbpString(temp); - - FpgaGatherVersion(temp, sizeof(temp)); - DbpString(temp); -} - -// samy's sniff and repeat routine -void SamyRun() -{ - DbpString("Stand-alone mode! No PC necessary."); - - // 3 possible options? no just 2 for now -#define OPTS 2 - - int high[OPTS], low[OPTS]; - - // Oooh pretty -- notify user we're in elite samy mode now - LED(LED_RED, 200); - LED(LED_ORANGE, 200); - LED(LED_GREEN, 200); - LED(LED_ORANGE, 200); - LED(LED_RED, 200); - LED(LED_ORANGE, 200); - LED(LED_GREEN, 200); - LED(LED_ORANGE, 200); - LED(LED_RED, 200); - - int selected = 0; - int playing = 0; - - // Turn on selected LED - LED(selected + 1, 0); - - for (;;) - { - UsbPoll(FALSE); - WDT_HIT(); - - // Was our button held down or pressed? - int button_pressed = BUTTON_HELD(1000); - SpinDelay(300); - - // Button was held for a second, begin recording - if (button_pressed > 0) - { - LEDsoff(); - LED(selected + 1, 0); - LED(LED_RED2, 0); - - // record - DbpString("Starting recording"); - - // wait for button to be released - while(BUTTON_PRESS()) - WDT_HIT(); - - /* need this delay to prevent catching some weird data */ - SpinDelay(500); - - CmdHIDdemodFSK(1, &high[selected], &low[selected], 0); - DbpString("Recorded"); - DbpIntegers(selected, high[selected], low[selected]); - - LEDsoff(); - LED(selected + 1, 0); - // Finished recording - - // If we were previously playing, set playing off - // so next button push begins playing what we recorded - playing = 0; - } - - // Change where to record (or begin playing) - else if (button_pressed) - { - // Next option if we were previously playing - if (playing) - selected = (selected + 1) % OPTS; - playing = !playing; - - LEDsoff(); - LED(selected + 1, 0); - - // Begin transmitting - if (playing) - { - LED(LED_GREEN, 0); - DbpString("Playing"); - // wait for button to be released - while(BUTTON_PRESS()) - WDT_HIT(); - DbpIntegers(selected, high[selected], low[selected]); - CmdHIDsimTAG(high[selected], low[selected], 0); - DbpString("Done playing"); - if (BUTTON_HELD(1000) > 0) - { - DbpString("Exiting"); - LEDsoff(); - return; - } - - /* We pressed a button so ignore it here with a delay */ - SpinDelay(300); - - // when done, we're done playing, move to next option - selected = (selected + 1) % OPTS; - playing = !playing; - LEDsoff(); - LED(selected + 1, 0); - } - else - while(BUTTON_PRESS()) - WDT_HIT(); - } - } -} - - -/* -OBJECTIVE -Listen and detect an external reader. Determine the best location -for the antenna. - -INSTRUCTIONS: -Inside the ListenReaderField() function, there is two mode. -By default, when you call the function, you will enter mode 1. -If you press the PM3 button one time, you will enter mode 2. -If you press the PM3 button a second time, you will exit the function. - -DESCRIPTION OF MODE 1: -This mode just listens for an external reader field and lights up green -for HF and/or red for LF. This is the original mode of the detectreader -function. - -DESCRIPTION OF MODE 2: -This mode will visually represent, using the LEDs, the actual strength of the -current compared to the maximum current detected. Basically, once you know -what kind of external reader is present, it will help you spot the best location to place -your antenna. You will probably not get some good results if there is a LF and a HF reader -at the same place! :-) - -LIGHT SCHEME USED: -*/ -static const char LIGHT_SCHEME[] = { - 0x0, /* ---- | No field detected */ - 0x1, /* X--- | 14% of maximum current detected */ - 0x2, /* -X-- | 29% of maximum current detected */ - 0x4, /* --X- | 43% of maximum current detected */ - 0x8, /* ---X | 57% of maximum current detected */ - 0xC, /* --XX | 71% of maximum current detected */ - 0xE, /* -XXX | 86% of maximum current detected */ - 0xF, /* XXXX | 100% of maximum current detected */ -}; -static const int LIGHT_LEN = sizeof(LIGHT_SCHEME)/sizeof(LIGHT_SCHEME[0]); - -void ListenReaderField(int limit) -{ - int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max; - int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max; - int mode=1, display_val, display_max, i; - -#define LF_ONLY 1 -#define HF_ONLY 2 - - LEDsoff(); - - lf_av=lf_max=ReadAdc(ADC_CHAN_LF); - - if(limit != HF_ONLY) { - DbpString("LF 125/134 Baseline:"); - DbpIntegers(lf_av,0,0); - lf_baseline= lf_av; - } - - hf_av=hf_max=ReadAdc(ADC_CHAN_HF); - - if (limit != LF_ONLY) { - DbpString("HF 13.56 Baseline:"); - DbpIntegers(hf_av,0,0); - hf_baseline= hf_av; - } - - for(;;) { - if (BUTTON_PRESS()) { - SpinDelay(500); - switch (mode) { - case 1: - mode=2; - DbpString("Signal Strength Mode"); - break; - case 2: - default: - DbpString("Stopped"); - LEDsoff(); - return; - break; - } - } - WDT_HIT(); - - if (limit != HF_ONLY) { - if(mode==1) { - if (abs(lf_av - lf_baseline) > 10) LED_D_ON(); - else LED_D_OFF(); - } - - ++lf_count; - lf_av_new= ReadAdc(ADC_CHAN_LF); - // see if there's a significant change - if(abs(lf_av - lf_av_new) > 10) { - DbpString("LF 125/134 Field Change:"); - DbpIntegers(lf_av,lf_av_new,lf_count); - lf_av= lf_av_new; - if (lf_av > lf_max) - lf_max = lf_av; - lf_count= 0; - } - } - - if (limit != LF_ONLY) { - if (mode == 1){ - if (abs(hf_av - hf_baseline) > 10) LED_B_ON(); - else LED_B_OFF(); - } - - ++hf_count; - hf_av_new= ReadAdc(ADC_CHAN_HF); - // see if there's a significant change - if(abs(hf_av - hf_av_new) > 10) { - DbpString("HF 13.56 Field Change:"); - DbpIntegers(hf_av,hf_av_new,hf_count); - hf_av= hf_av_new; - if (hf_av > hf_max) - hf_max = hf_av; - hf_count= 0; - } - } - - if(mode == 2) { - if (limit == LF_ONLY) { - display_val = lf_av; - display_max = lf_max; - } else if (limit == HF_ONLY) { - display_val = hf_av; - display_max = hf_max; - } else { /* Pick one at random */ - if( (hf_max - hf_baseline) > (lf_max - lf_baseline) ) { - display_val = hf_av; - display_max = hf_max; - } else { - display_val = lf_av; - display_max = lf_max; - } - } - for (i=0; i= ((display_max/LIGHT_LEN)*i) && display_val <= ((display_max/LIGHT_LEN)*(i+1))) { - if (LIGHT_SCHEME[i] & 0x1) LED_C_ON(); else LED_C_OFF(); - if (LIGHT_SCHEME[i] & 0x2) LED_A_ON(); else LED_A_OFF(); - if (LIGHT_SCHEME[i] & 0x4) LED_B_ON(); else LED_B_OFF(); - if (LIGHT_SCHEME[i] & 0x8) LED_D_ON(); else LED_D_OFF(); - break; - } - } - } - } -} - -void UsbPacketReceived(BYTE *packet, int len) -{ - UsbCommand *c = (UsbCommand *)packet; - - switch(c->cmd) { - case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K: - AcquireRawAdcSamples125k(c->ext1); - break; - - case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K: - ModThenAcquireRawAdcSamples125k(c->ext1,c->ext2,c->ext3,c->d.asBytes); - break; - - case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693: - AcquireRawAdcSamplesIso15693(); - break; - - case CMD_BUFF_CLEAR: - BufferClear(); - break; - - case CMD_READER_ISO_15693: - ReaderIso15693(c->ext1); - break; - - case CMD_SIMTAG_ISO_15693: - SimTagIso15693(c->ext1); - break; - - case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443: - AcquireRawAdcSamplesIso14443(c->ext1); - break; - - case CMD_READ_SRI512_TAG: - ReadSRI512Iso14443(c->ext1); - break; - - case CMD_READER_ISO_14443a: - ReaderIso14443a(c->ext1); - break; - - case CMD_SNOOP_ISO_14443: - SnoopIso14443(); - break; - - case CMD_SNOOP_ISO_14443a: - SnoopIso14443a(); - break; - - case CMD_SIMULATE_TAG_HF_LISTEN: - SimulateTagHfListen(); - break; - - case CMD_SIMULATE_TAG_ISO_14443: - SimulateIso14443Tag(); - break; - - case CMD_SIMULATE_TAG_ISO_14443a: - SimulateIso14443aTag(c->ext1, c->ext2); // ## Simulate iso14443a tag - pass tag type & UID - break; - - case CMD_MEASURE_ANTENNA_TUNING: - MeasureAntennaTuning(); - break; - - case CMD_LISTEN_READER_FIELD: - ListenReaderField(c->ext1); - break; - - case CMD_HID_DEMOD_FSK: - CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag - break; - - case CMD_HID_SIM_TAG: - CmdHIDsimTAG(c->ext1, c->ext2, 1); // Simulate HID tag by ID - break; - - case CMD_FPGA_MAJOR_MODE_OFF: // ## FPGA Control - FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); - SpinDelay(200); - LED_D_OFF(); // LED D indicates field ON or OFF - break; - - case CMD_READ_TI_TYPE: - ReadTItag(); - break; - - case CMD_WRITE_TI_TYPE: - WriteTItag(c->ext1,c->ext2,c->ext3); - break; - - case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K: { - UsbCommand n; - if(c->cmd == CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K) { - n.cmd = CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K; - } else { - n.cmd = CMD_DOWNLOADED_RAW_BITS_TI_TYPE; - } - n.ext1 = c->ext1; - memcpy(n.d.asDwords, BigBuf+c->ext1, 12*sizeof(DWORD)); - UsbSendPacket((BYTE *)&n, sizeof(n)); - break; - } - case CMD_DOWNLOADED_SIM_SAMPLES_125K: { - BYTE *b = (BYTE *)BigBuf; - memcpy(b+c->ext1, c->d.asBytes, 48); - break; - } - case CMD_SIMULATE_TAG_125K: - LED_A_ON(); - SimulateTagLowFrequency(c->ext1, 1); - LED_A_OFF(); - break; - case CMD_READ_MEM: - ReadMem(c->ext1); - break; - case CMD_SET_LF_DIVISOR: - FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->ext1); - break; - case CMD_VERSION: - SendVersion(); - break; - case CMD_LF_SIMULATE_BIDIR: - SimulateTagLowFrequencyBidir(c->ext1, c->ext2); - break; -#ifdef WITH_LCD - case CMD_LCD_RESET: - LCDReset(); - break; - case CMD_LCD: - LCDSend(c->ext1); - break; -#endif - case CMD_SETUP_WRITE: - case CMD_FINISH_WRITE: - case CMD_HARDWARE_RESET: - USB_D_PLUS_PULLUP_OFF(); - SpinDelay(1000); - SpinDelay(1000); - RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET; - for(;;) { - // We're going to reset, and the bootrom will take control. - } - break; - case CMD_START_FLASH: - if(common_area.flags.bootrom_present) { - common_area.command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE; - } - USB_D_PLUS_PULLUP_OFF(); - RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET; - for(;;); - break; - - case CMD_DEVICE_INFO: { - UsbCommand c; - c.cmd = CMD_DEVICE_INFO; - c.ext1 = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS; - if(common_area.flags.bootrom_present) c.ext1 |= DEVICE_INFO_FLAG_BOOTROM_PRESENT; - UsbSendPacket((BYTE*)&c, sizeof(c)); - } - break; - default: - DbpString("unknown command"); - break; - } -} - -void __attribute__((noreturn)) AppMain(void) -{ - SpinDelay(100); - - if(common_area.magic != COMMON_AREA_MAGIC || common_area.version != 1) { - /* Initialize common area */ - memset(&common_area, 0, sizeof(common_area)); - common_area.magic = COMMON_AREA_MAGIC; - common_area.version = 1; - } - common_area.flags.osimage_present = 1; - - LED_D_OFF(); - LED_C_OFF(); - LED_B_OFF(); - LED_A_OFF(); - - UsbStart(); - - // The FPGA gets its clock from us from PCK0 output, so set that up. - PIO_PERIPHERAL_B_SEL = (1 << GPIO_PCK0); - PIO_DISABLE = (1 << GPIO_PCK0); - PMC_SYS_CLK_ENABLE = PMC_SYS_CLK_PROGRAMMABLE_CLK_0; - // PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz - PMC_PROGRAMMABLE_CLK_0 = PMC_CLK_SELECTION_PLL_CLOCK | - PMC_CLK_PRESCALE_DIV_4; - PIO_OUTPUT_ENABLE = (1 << GPIO_PCK0); - - // Reset SPI - SPI_CONTROL = SPI_CONTROL_RESET; - // Reset SSC - SSC_CONTROL = SSC_CONTROL_RESET; - - // Load the FPGA image, which we have stored in our flash. - FpgaDownloadAndGo(); - -#ifdef WITH_LCD - - LCDInit(); - - // test text on different colored backgrounds - LCDString(" The quick brown fox ", (char *)&FONT6x8,1,1+8*0,WHITE ,BLACK ); - LCDString(" jumped over the ", (char *)&FONT6x8,1,1+8*1,BLACK ,WHITE ); - LCDString(" lazy dog. ", (char *)&FONT6x8,1,1+8*2,YELLOW ,RED ); - LCDString(" AaBbCcDdEeFfGgHhIiJj ", (char *)&FONT6x8,1,1+8*3,RED ,GREEN ); - LCDString(" KkLlMmNnOoPpQqRrSsTt ", (char *)&FONT6x8,1,1+8*4,MAGENTA,BLUE ); - LCDString("UuVvWwXxYyZz0123456789", (char *)&FONT6x8,1,1+8*5,BLUE ,YELLOW); - LCDString("`-=[]_;',./~!@#$%^&*()", (char *)&FONT6x8,1,1+8*6,BLACK ,CYAN ); - LCDString(" _+{}|:\\\"<>? ",(char *)&FONT6x8,1,1+8*7,BLUE ,MAGENTA); - - // color bands - LCDFill(0, 1+8* 8, 132, 8, BLACK); - LCDFill(0, 1+8* 9, 132, 8, WHITE); - LCDFill(0, 1+8*10, 132, 8, RED); - LCDFill(0, 1+8*11, 132, 8, GREEN); - LCDFill(0, 1+8*12, 132, 8, BLUE); - LCDFill(0, 1+8*13, 132, 8, YELLOW); - LCDFill(0, 1+8*14, 132, 8, CYAN); - LCDFill(0, 1+8*15, 132, 8, MAGENTA); - -#endif - - for(;;) { - UsbPoll(FALSE); - WDT_HIT(); - - if (BUTTON_HELD(1000) > 0) - SamyRun(); - } -} +//----------------------------------------------------------------------------- +// The main application code. This is the first thing called after start.c +// executes. +// Jonathan Westhues, Mar 2006 +// Edits by Gerhard de Koning Gans, Sep 2007 (##) +//----------------------------------------------------------------------------- + +#include +#include +#include "apps.h" +#ifdef WITH_LCD +#include "fonts.h" +#include "LCD.h" +#endif + +//============================================================================= +// A buffer where we can queue things up to be sent through the FPGA, for +// any purpose (fake tag, as reader, whatever). We go MSB first, since that +// is the order in which they go out on the wire. +//============================================================================= + +BYTE ToSend[256]; +int ToSendMax; +static int ToSendBit; +struct common_area common_area __attribute__((section(".commonarea"))); + +void BufferClear(void) +{ + memset(BigBuf,0,sizeof(BigBuf)); + DbpString("Buffer cleared"); +} + +void ToSendReset(void) +{ + ToSendMax = -1; + ToSendBit = 8; +} + +void ToSendStuffBit(int b) +{ + if(ToSendBit >= 8) { + ToSendMax++; + ToSend[ToSendMax] = 0; + ToSendBit = 0; + } + + if(b) { + ToSend[ToSendMax] |= (1 << (7 - ToSendBit)); + } + + ToSendBit++; + + if(ToSendBit >= sizeof(ToSend)) { + ToSendBit = 0; + DbpString("ToSendStuffBit overflowed!"); + } +} + +//============================================================================= +// Debug print functions, to go out over USB, to the usual PC-side client. +//============================================================================= + +void DbpString(char *str) +{ + /* this holds up stuff unless we're connected to usb */ + if (!UsbConnected()) + return; + + UsbCommand c; + c.cmd = CMD_DEBUG_PRINT_STRING; + c.ext1 = strlen(str); + memcpy(c.d.asBytes, str, c.ext1); + + UsbSendPacket((BYTE *)&c, sizeof(c)); + // TODO fix USB so stupid things like this aren't req'd + SpinDelay(50); +} + +void DbpIntegers(int x1, int x2, int x3) +{ + /* this holds up stuff unless we're connected to usb */ + if (!UsbConnected()) + return; + + UsbCommand c; + c.cmd = CMD_DEBUG_PRINT_INTEGERS; + c.ext1 = x1; + c.ext2 = x2; + c.ext3 = x3; + + UsbSendPacket((BYTE *)&c, sizeof(c)); + // XXX + SpinDelay(50); +} + +//----------------------------------------------------------------------------- +// Read an ADC channel and block till it completes, then return the result +// in ADC units (0 to 1023). Also a routine to average 32 samples and +// return that. +//----------------------------------------------------------------------------- +static int ReadAdc(int ch) +{ + DWORD d; + + AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; + AT91C_BASE_ADC->ADC_MR = + ADC_MODE_PRESCALE(32) | + ADC_MODE_STARTUP_TIME(16) | + ADC_MODE_SAMPLE_HOLD_TIME(8); + AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch); + + AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; + while(!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch))) + ; + d = AT91C_BASE_ADC->ADC_CDR[ch]; + + return d; +} + +static int AvgAdc(int ch) +{ + int i; + int a = 0; + + for(i = 0; i < 32; i++) { + a += ReadAdc(ch); + } + + return (a + 15) >> 5; +} + +void MeasureAntennaTuning(void) +{ + BYTE *dest = (BYTE *)BigBuf; + int i, ptr = 0, adcval = 0, peak = 0, peakv = 0, peakf = 0;; + int vLf125 = 0, vLf134 = 0, vHf = 0; // in mV + + UsbCommand c; + + DbpString("Measuring antenna characteristics, please wait."); + memset(BigBuf,0,sizeof(BigBuf)); + +/* + * Sweeps the useful LF range of the proxmark from + * 46.8kHz (divisor=255) to 600kHz (divisor=19) and + * read the voltage in the antenna, the result left + * in the buffer is a graph which should clearly show + * the resonating frequency of your LF antenna + * ( hopefully around 95 if it is tuned to 125kHz!) + */ + FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER); + for (i=255; i>19; i--) { + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i); + SpinDelay(20); + // Vref = 3.3V, and a 10000:240 voltage divider on the input + // can measure voltages up to 137500 mV + adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10); + if (i==95) vLf125 = adcval; // voltage at 125Khz + if (i==89) vLf134 = adcval; // voltage at 134Khz + + dest[i] = adcval>>8; // scale int to fit in byte for graphing purposes + if(dest[i] > peak) { + peakv = adcval; + peak = dest[i]; + peakf = i; + ptr = i; + } + } + + // Let the FPGA drive the high-frequency antenna around 13.56 MHz. + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR); + SpinDelay(20); + // Vref = 3300mV, and an 10:1 voltage divider on the input + // can measure voltages up to 33000 mV + vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10; + + c.cmd = CMD_MEASURED_ANTENNA_TUNING; + c.ext1 = (vLf125 << 0) | (vLf134 << 16); + c.ext2 = vHf; + c.ext3 = peakf | (peakv << 16); + UsbSendPacket((BYTE *)&c, sizeof(c)); +} + +void SimulateTagHfListen(void) +{ + BYTE *dest = (BYTE *)BigBuf; + int n = sizeof(BigBuf); + BYTE v = 0; + int i; + int p = 0; + + // We're using this mode just so that I can test it out; the simulated + // tag mode would work just as well and be simpler. + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); + + // We need to listen to the high-frequency, peak-detected path. + SetAdcMuxFor(GPIO_MUXSEL_HIPKD); + + FpgaSetupSsc(); + + i = 0; + for(;;) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0xff; + } + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + BYTE r = (BYTE)AT91C_BASE_SSC->SSC_RHR; + + v <<= 1; + if(r & 1) { + v |= 1; + } + p++; + + if(p >= 8) { + dest[i] = v; + v = 0; + p = 0; + i++; + + if(i >= n) { + break; + } + } + } + } + DbpString("simulate tag (now type bitsamples)"); +} + +void ReadMem(int addr) +{ + const DWORD *data = ((DWORD *)addr); + int i; + + DbpString("Reading memory at address"); + DbpIntegers(0, 0, addr); + for (i = 0; i < 8; i+= 2) + DbpIntegers(0, data[i], data[i+1]); +} + +/* osimage version information is linked in */ +extern struct version_information version_information; +/* bootrom version information is pointed to from _bootphase1_version_pointer */ +extern char *_bootphase1_version_pointer, _flash_start, _flash_end; +void SendVersion(void) +{ + char temp[48]; /* Limited data payload in USB packets */ + DbpString("Prox/RFID mark3 RFID instrument"); + + /* Try to find the bootrom version information. Expect to find a pointer at + * symbol _bootphase1_version_pointer, perform slight sanity checks on the + * pointer, then use it. + */ + char *bootrom_version = *(char**)&_bootphase1_version_pointer; + if( bootrom_version < &_flash_start || bootrom_version >= &_flash_end ) { + DbpString("bootrom version information appears invalid"); + } else { + FormatVersionInformation(temp, sizeof(temp), "bootrom: ", bootrom_version); + DbpString(temp); + } + + FormatVersionInformation(temp, sizeof(temp), "os: ", &version_information); + DbpString(temp); + + FpgaGatherVersion(temp, sizeof(temp)); + DbpString(temp); +} + +// samy's sniff and repeat routine +void SamyRun() +{ + DbpString("Stand-alone mode! No PC necessary."); + + // 3 possible options? no just 2 for now +#define OPTS 2 + + int high[OPTS], low[OPTS]; + + // Oooh pretty -- notify user we're in elite samy mode now + LED(LED_RED, 200); + LED(LED_ORANGE, 200); + LED(LED_GREEN, 200); + LED(LED_ORANGE, 200); + LED(LED_RED, 200); + LED(LED_ORANGE, 200); + LED(LED_GREEN, 200); + LED(LED_ORANGE, 200); + LED(LED_RED, 200); + + int selected = 0; + int playing = 0; + + // Turn on selected LED + LED(selected + 1, 0); + + for (;;) + { + UsbPoll(FALSE); + WDT_HIT(); + + // Was our button held down or pressed? + int button_pressed = BUTTON_HELD(1000); + SpinDelay(300); + + // Button was held for a second, begin recording + if (button_pressed > 0) + { + LEDsoff(); + LED(selected + 1, 0); + LED(LED_RED2, 0); + + // record + DbpString("Starting recording"); + + // wait for button to be released + while(BUTTON_PRESS()) + WDT_HIT(); + + /* need this delay to prevent catching some weird data */ + SpinDelay(500); + + CmdHIDdemodFSK(1, &high[selected], &low[selected], 0); + DbpString("Recorded"); + DbpIntegers(selected, high[selected], low[selected]); + + LEDsoff(); + LED(selected + 1, 0); + // Finished recording + + // If we were previously playing, set playing off + // so next button push begins playing what we recorded + playing = 0; + } + + // Change where to record (or begin playing) + else if (button_pressed) + { + // Next option if we were previously playing + if (playing) + selected = (selected + 1) % OPTS; + playing = !playing; + + LEDsoff(); + LED(selected + 1, 0); + + // Begin transmitting + if (playing) + { + LED(LED_GREEN, 0); + DbpString("Playing"); + // wait for button to be released + while(BUTTON_PRESS()) + WDT_HIT(); + DbpIntegers(selected, high[selected], low[selected]); + CmdHIDsimTAG(high[selected], low[selected], 0); + DbpString("Done playing"); + if (BUTTON_HELD(1000) > 0) + { + DbpString("Exiting"); + LEDsoff(); + return; + } + + /* We pressed a button so ignore it here with a delay */ + SpinDelay(300); + + // when done, we're done playing, move to next option + selected = (selected + 1) % OPTS; + playing = !playing; + LEDsoff(); + LED(selected + 1, 0); + } + else + while(BUTTON_PRESS()) + WDT_HIT(); + } + } +} + + +/* +OBJECTIVE +Listen and detect an external reader. Determine the best location +for the antenna. + +INSTRUCTIONS: +Inside the ListenReaderField() function, there is two mode. +By default, when you call the function, you will enter mode 1. +If you press the PM3 button one time, you will enter mode 2. +If you press the PM3 button a second time, you will exit the function. + +DESCRIPTION OF MODE 1: +This mode just listens for an external reader field and lights up green +for HF and/or red for LF. This is the original mode of the detectreader +function. + +DESCRIPTION OF MODE 2: +This mode will visually represent, using the LEDs, the actual strength of the +current compared to the maximum current detected. Basically, once you know +what kind of external reader is present, it will help you spot the best location to place +your antenna. You will probably not get some good results if there is a LF and a HF reader +at the same place! :-) + +LIGHT SCHEME USED: +*/ +static const char LIGHT_SCHEME[] = { + 0x0, /* ---- | No field detected */ + 0x1, /* X--- | 14% of maximum current detected */ + 0x2, /* -X-- | 29% of maximum current detected */ + 0x4, /* --X- | 43% of maximum current detected */ + 0x8, /* ---X | 57% of maximum current detected */ + 0xC, /* --XX | 71% of maximum current detected */ + 0xE, /* -XXX | 86% of maximum current detected */ + 0xF, /* XXXX | 100% of maximum current detected */ +}; +static const int LIGHT_LEN = sizeof(LIGHT_SCHEME)/sizeof(LIGHT_SCHEME[0]); + +void ListenReaderField(int limit) +{ + int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max; + int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max; + int mode=1, display_val, display_max, i; + +#define LF_ONLY 1 +#define HF_ONLY 2 + + LEDsoff(); + + lf_av=lf_max=ReadAdc(ADC_CHAN_LF); + + if(limit != HF_ONLY) { + DbpString("LF 125/134 Baseline:"); + DbpIntegers(lf_av,0,0); + lf_baseline= lf_av; + } + + hf_av=hf_max=ReadAdc(ADC_CHAN_HF); + + if (limit != LF_ONLY) { + DbpString("HF 13.56 Baseline:"); + DbpIntegers(hf_av,0,0); + hf_baseline= hf_av; + } + + for(;;) { + if (BUTTON_PRESS()) { + SpinDelay(500); + switch (mode) { + case 1: + mode=2; + DbpString("Signal Strength Mode"); + break; + case 2: + default: + DbpString("Stopped"); + LEDsoff(); + return; + break; + } + } + WDT_HIT(); + + if (limit != HF_ONLY) { + if(mode==1) { + if (abs(lf_av - lf_baseline) > 10) LED_D_ON(); + else LED_D_OFF(); + } + + ++lf_count; + lf_av_new= ReadAdc(ADC_CHAN_LF); + // see if there's a significant change + if(abs(lf_av - lf_av_new) > 10) { + DbpString("LF 125/134 Field Change:"); + DbpIntegers(lf_av,lf_av_new,lf_count); + lf_av= lf_av_new; + if (lf_av > lf_max) + lf_max = lf_av; + lf_count= 0; + } + } + + if (limit != LF_ONLY) { + if (mode == 1){ + if (abs(hf_av - hf_baseline) > 10) LED_B_ON(); + else LED_B_OFF(); + } + + ++hf_count; + hf_av_new= ReadAdc(ADC_CHAN_HF); + // see if there's a significant change + if(abs(hf_av - hf_av_new) > 10) { + DbpString("HF 13.56 Field Change:"); + DbpIntegers(hf_av,hf_av_new,hf_count); + hf_av= hf_av_new; + if (hf_av > hf_max) + hf_max = hf_av; + hf_count= 0; + } + } + + if(mode == 2) { + if (limit == LF_ONLY) { + display_val = lf_av; + display_max = lf_max; + } else if (limit == HF_ONLY) { + display_val = hf_av; + display_max = hf_max; + } else { /* Pick one at random */ + if( (hf_max - hf_baseline) > (lf_max - lf_baseline) ) { + display_val = hf_av; + display_max = hf_max; + } else { + display_val = lf_av; + display_max = lf_max; + } + } + for (i=0; i= ((display_max/LIGHT_LEN)*i) && display_val <= ((display_max/LIGHT_LEN)*(i+1))) { + if (LIGHT_SCHEME[i] & 0x1) LED_C_ON(); else LED_C_OFF(); + if (LIGHT_SCHEME[i] & 0x2) LED_A_ON(); else LED_A_OFF(); + if (LIGHT_SCHEME[i] & 0x4) LED_B_ON(); else LED_B_OFF(); + if (LIGHT_SCHEME[i] & 0x8) LED_D_ON(); else LED_D_OFF(); + break; + } + } + } + } +} + +void UsbPacketReceived(BYTE *packet, int len) +{ + UsbCommand *c = (UsbCommand *)packet; + + switch(c->cmd) { + case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K: + AcquireRawAdcSamples125k(c->ext1); + break; + + case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K: + ModThenAcquireRawAdcSamples125k(c->ext1,c->ext2,c->ext3,c->d.asBytes); + break; + + case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693: + AcquireRawAdcSamplesIso15693(); + break; + + case CMD_BUFF_CLEAR: + BufferClear(); + break; + + case CMD_READER_ISO_15693: + ReaderIso15693(c->ext1); + break; + + case CMD_SIMTAG_ISO_15693: + SimTagIso15693(c->ext1); + break; + + case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443: + AcquireRawAdcSamplesIso14443(c->ext1); + break; + + case CMD_READ_SRI512_TAG: + ReadSRI512Iso14443(c->ext1); + break; + + case CMD_READER_ISO_14443a: + ReaderIso14443a(c->ext1); + break; + + case CMD_SNOOP_ISO_14443: + SnoopIso14443(); + break; + + case CMD_SNOOP_ISO_14443a: + SnoopIso14443a(); + break; + + case CMD_SIMULATE_TAG_HF_LISTEN: + SimulateTagHfListen(); + break; + + case CMD_SIMULATE_TAG_ISO_14443: + SimulateIso14443Tag(); + break; + + case CMD_SIMULATE_TAG_ISO_14443a: + SimulateIso14443aTag(c->ext1, c->ext2); // ## Simulate iso14443a tag - pass tag type & UID + break; + + case CMD_MEASURE_ANTENNA_TUNING: + MeasureAntennaTuning(); + break; + + case CMD_LISTEN_READER_FIELD: + ListenReaderField(c->ext1); + break; + + case CMD_HID_DEMOD_FSK: + CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag + break; + + case CMD_HID_SIM_TAG: + CmdHIDsimTAG(c->ext1, c->ext2, 1); // Simulate HID tag by ID + break; + + case CMD_FPGA_MAJOR_MODE_OFF: // ## FPGA Control + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); + SpinDelay(200); + LED_D_OFF(); // LED D indicates field ON or OFF + break; + + case CMD_READ_TI_TYPE: + ReadTItag(); + break; + + case CMD_WRITE_TI_TYPE: + WriteTItag(c->ext1,c->ext2,c->ext3); + break; + + case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K: { + UsbCommand n; + if(c->cmd == CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K) { + n.cmd = CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K; + } else { + n.cmd = CMD_DOWNLOADED_RAW_BITS_TI_TYPE; + } + n.ext1 = c->ext1; + memcpy(n.d.asDwords, BigBuf+c->ext1, 12*sizeof(DWORD)); + UsbSendPacket((BYTE *)&n, sizeof(n)); + break; + } + case CMD_DOWNLOADED_SIM_SAMPLES_125K: { + BYTE *b = (BYTE *)BigBuf; + memcpy(b+c->ext1, c->d.asBytes, 48); + break; + } + case CMD_SIMULATE_TAG_125K: + LED_A_ON(); + SimulateTagLowFrequency(c->ext1, 1); + LED_A_OFF(); + break; + case CMD_READ_MEM: + ReadMem(c->ext1); + break; + case CMD_SET_LF_DIVISOR: + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->ext1); + break; + case CMD_VERSION: + SendVersion(); + break; + case CMD_LF_SIMULATE_BIDIR: + SimulateTagLowFrequencyBidir(c->ext1, c->ext2); + break; +#ifdef WITH_LCD + case CMD_LCD_RESET: + LCDReset(); + break; + case CMD_LCD: + LCDSend(c->ext1); + break; +#endif + case CMD_SETUP_WRITE: + case CMD_FINISH_WRITE: + case CMD_HARDWARE_RESET: + USB_D_PLUS_PULLUP_OFF(); + SpinDelay(1000); + SpinDelay(1000); + AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST; + for(;;) { + // We're going to reset, and the bootrom will take control. + } + break; + case CMD_START_FLASH: + if(common_area.flags.bootrom_present) { + common_area.command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE; + } + USB_D_PLUS_PULLUP_OFF(); + AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST; + for(;;); + break; + + case CMD_DEVICE_INFO: { + UsbCommand c; + c.cmd = CMD_DEVICE_INFO; + c.ext1 = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS; + if(common_area.flags.bootrom_present) c.ext1 |= DEVICE_INFO_FLAG_BOOTROM_PRESENT; + UsbSendPacket((BYTE*)&c, sizeof(c)); + } + break; + default: + DbpString("unknown command"); + break; + } +} + +void __attribute__((noreturn)) AppMain(void) +{ + SpinDelay(100); + + if(common_area.magic != COMMON_AREA_MAGIC || common_area.version != 1) { + /* Initialize common area */ + memset(&common_area, 0, sizeof(common_area)); + common_area.magic = COMMON_AREA_MAGIC; + common_area.version = 1; + } + common_area.flags.osimage_present = 1; + + LED_D_OFF(); + LED_C_OFF(); + LED_B_OFF(); + LED_A_OFF(); + + UsbStart(); + + // The FPGA gets its clock from us from PCK0 output, so set that up. + AT91C_BASE_PIOA->PIO_BSR = GPIO_PCK0; + AT91C_BASE_PIOA->PIO_PDR = GPIO_PCK0; + AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK0; + // PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz + AT91C_BASE_PMC->PMC_PCKR[0] = AT91C_PMC_CSS_PLL_CLK | + AT91C_PMC_PRES_CLK_4; + AT91C_BASE_PIOA->PIO_OER = GPIO_PCK0; + + // Reset SPI + AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; + // Reset SSC + AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST; + + // Load the FPGA image, which we have stored in our flash. + FpgaDownloadAndGo(); + +#ifdef WITH_LCD + + LCDInit(); + + // test text on different colored backgrounds + LCDString(" The quick brown fox ", (char *)&FONT6x8,1,1+8*0,WHITE ,BLACK ); + LCDString(" jumped over the ", (char *)&FONT6x8,1,1+8*1,BLACK ,WHITE ); + LCDString(" lazy dog. ", (char *)&FONT6x8,1,1+8*2,YELLOW ,RED ); + LCDString(" AaBbCcDdEeFfGgHhIiJj ", (char *)&FONT6x8,1,1+8*3,RED ,GREEN ); + LCDString(" KkLlMmNnOoPpQqRrSsTt ", (char *)&FONT6x8,1,1+8*4,MAGENTA,BLUE ); + LCDString("UuVvWwXxYyZz0123456789", (char *)&FONT6x8,1,1+8*5,BLUE ,YELLOW); + LCDString("`-=[]_;',./~!@#$%^&*()", (char *)&FONT6x8,1,1+8*6,BLACK ,CYAN ); + LCDString(" _+{}|:\\\"<>? ",(char *)&FONT6x8,1,1+8*7,BLUE ,MAGENTA); + + // color bands + LCDFill(0, 1+8* 8, 132, 8, BLACK); + LCDFill(0, 1+8* 9, 132, 8, WHITE); + LCDFill(0, 1+8*10, 132, 8, RED); + LCDFill(0, 1+8*11, 132, 8, GREEN); + LCDFill(0, 1+8*12, 132, 8, BLUE); + LCDFill(0, 1+8*13, 132, 8, YELLOW); + LCDFill(0, 1+8*14, 132, 8, CYAN); + LCDFill(0, 1+8*15, 132, 8, MAGENTA); + +#endif + + for(;;) { + UsbPoll(FALSE); + WDT_HIT(); + + if (BUTTON_HELD(1000) > 0) + SamyRun(); + } +} diff --git a/armsrc/apps.h b/armsrc/apps.h index 1cb971bd..bf45407f 100644 --- a/armsrc/apps.h +++ b/armsrc/apps.h @@ -34,33 +34,33 @@ void FpgaGatherVersion(char *dst, int len); void FpgaSetupSsc(void); void SetupSpi(int mode); void FpgaSetupSscDma(BYTE *buf, int len); -void SetAdcMuxFor(int whichGpio); +void SetAdcMuxFor(DWORD whichGpio); // Definitions for the FPGA commands. -#define FPGA_CMD_SET_CONFREG (1<<12) -#define FPGA_CMD_SET_DIVISOR (2<<12) +#define FPGA_CMD_SET_CONFREG (1<<12) +#define FPGA_CMD_SET_DIVISOR (2<<12) // Definitions for the FPGA configuration word. -#define FPGA_MAJOR_MODE_LF_READER (0<<5) +#define FPGA_MAJOR_MODE_LF_READER (0<<5) #define FPGA_MAJOR_MODE_LF_SIMULATOR (1<<5) #define FPGA_MAJOR_MODE_HF_READER_TX (2<<5) -#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (3<<5) +#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (3<<5) #define FPGA_MAJOR_MODE_HF_SIMULATOR (4<<5) #define FPGA_MAJOR_MODE_HF_ISO14443A (5<<5) #define FPGA_MAJOR_MODE_LF_PASSTHRU (6<<5) -#define FPGA_MAJOR_MODE_OFF (7<<5) +#define FPGA_MAJOR_MODE_OFF (7<<5) // Options for the HF reader, tx to tag #define FPGA_HF_READER_TX_SHALLOW_MOD (1<<0) // Options for the HF reader, correlating against rx from tag -#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0) +#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0) #define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1) // Options for the HF simulated tag, how to modulate -#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) -#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) +#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) +#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) // Options for ISO14443A -#define FPGA_HF_ISO14443A_SNIFFER (0<<0) -#define FPGA_HF_ISO14443A_TAGSIM_LISTEN (1<<0) +#define FPGA_HF_ISO14443A_SNIFFER (0<<0) +#define FPGA_HF_ISO14443A_TAGSIM_LISTEN (1<<0) #define FPGA_HF_ISO14443A_TAGSIM_MOD (2<<0) -#define FPGA_HF_ISO14443A_READER_LISTEN (3<<0) +#define FPGA_HF_ISO14443A_READER_LISTEN (3<<0) #define FPGA_HF_ISO14443A_READER_MOD (4<<0) /// lfops.h diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c index af2f02ab..04db41b3 100644 --- a/armsrc/fpgaloader.c +++ b/armsrc/fpgaloader.c @@ -21,27 +21,29 @@ void SetupSpi(int mode) // PA14 -> SPI_SPCK Serial Clock // Disable PIO control of the following pins, allows use by the SPI peripheral - PIO_DISABLE = (1 << GPIO_NCS0) | - (1 << GPIO_NCS2) | - (1 << GPIO_MISO) | - (1 << GPIO_MOSI) | - (1 << GPIO_SPCK); + AT91C_BASE_PIOA->PIO_PDR = + GPIO_NCS0 | + GPIO_NCS2 | + GPIO_MISO | + GPIO_MOSI | + GPIO_SPCK; - PIO_PERIPHERAL_A_SEL = (1 << GPIO_NCS0) | - (1 << GPIO_MISO) | - (1 << GPIO_MOSI) | - (1 << GPIO_SPCK); + AT91C_BASE_PIOA->PIO_ASR = + GPIO_NCS0 | + GPIO_MISO | + GPIO_MOSI | + GPIO_SPCK; - PIO_PERIPHERAL_B_SEL = (1 << GPIO_NCS2); + AT91C_BASE_PIOA->PIO_BSR = GPIO_NCS2; //enable the SPI Peripheral clock - PMC_PERIPHERAL_CLK_ENABLE = (1<PMC_PCER = (1<SPI_CR = AT91C_SPI_SPIEN; switch (mode) { case SPI_FPGA_MODE: - SPI_MODE = + AT91C_BASE_SPI->SPI_MR = ( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods) (14 << 16) | // Peripheral Chip Select (selects FPGA SPI_NCS0 or PA11) ( 0 << 7) | // Local Loopback Disabled @@ -49,7 +51,7 @@ void SetupSpi(int mode) ( 0 << 2) | // Chip selects connected directly to peripheral ( 0 << 1) | // Fixed Peripheral Select ( 1 << 0); // Master Mode - SPI_FOR_CHIPSEL_0 = + AT91C_BASE_SPI->SPI_CSR[0] = ( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods) ( 1 << 16) | // Delay Before SPCK (1 MCK period) ( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud @@ -59,7 +61,7 @@ void SetupSpi(int mode) ( 0 << 0); // Clock Polarity inactive state is logic 0 break; case SPI_LCD_MODE: - SPI_MODE = + AT91C_BASE_SPI->SPI_MR = ( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods) (11 << 16) | // Peripheral Chip Select (selects LCD SPI_NCS2 or PA10) ( 0 << 7) | // Local Loopback Disabled @@ -67,7 +69,7 @@ void SetupSpi(int mode) ( 0 << 2) | // Chip selects connected directly to peripheral ( 0 << 1) | // Fixed Peripheral Select ( 1 << 0); // Master Mode - SPI_FOR_CHIPSEL_2 = + AT91C_BASE_SPI->SPI_CSR[2] = ( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods) ( 1 << 16) | // Delay Before SPCK (1 MCK period) ( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud @@ -77,7 +79,7 @@ void SetupSpi(int mode) ( 0 << 0); // Clock Polarity inactive state is logic 0 break; default: // Disable SPI - SPI_CONTROL = SPI_CONTROL_DISABLE; + AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS; break; } } @@ -89,35 +91,36 @@ void SetupSpi(int mode) void FpgaSetupSsc(void) { // First configure the GPIOs, and get ourselves a clock. - PIO_PERIPHERAL_A_SEL = (1 << GPIO_SSC_FRAME) | - (1 << GPIO_SSC_DIN) | - (1 << GPIO_SSC_DOUT) | - (1 << GPIO_SSC_CLK); - PIO_DISABLE = (1 << GPIO_SSC_DOUT); + AT91C_BASE_PIOA->PIO_ASR = + GPIO_SSC_FRAME | + GPIO_SSC_DIN | + GPIO_SSC_DOUT | + GPIO_SSC_CLK; + AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT; - PMC_PERIPHERAL_CLK_ENABLE = (1 << PERIPH_SSC); + AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC); // Now set up the SSC proper, starting from a known state. - SSC_CONTROL = SSC_CONTROL_RESET; + AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST; // RX clock comes from TX clock, RX starts when TX starts, data changes // on RX clock rising edge, sampled on falling edge - SSC_RECEIVE_CLOCK_MODE = SSC_CLOCK_MODE_SELECT(1) | SSC_CLOCK_MODE_START(1); + AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(1) | SSC_CLOCK_MODE_START(1); // 8 bits per transfer, no loopback, MSB first, 1 transfer per sync // pulse, no output sync, start on positive-going edge of sync - SSC_RECEIVE_FRAME_MODE = SSC_FRAME_MODE_BITS_IN_WORD(8) | - SSC_FRAME_MODE_MSB_FIRST | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0); + AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | + AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0); // clock comes from TK pin, no clock output, outputs change on falling // edge of TK, start on rising edge of TF - SSC_TRANSMIT_CLOCK_MODE = SSC_CLOCK_MODE_SELECT(2) | + AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) | SSC_CLOCK_MODE_START(5); // tx framing is the same as the rx framing - SSC_TRANSMIT_FRAME_MODE = SSC_RECEIVE_FRAME_MODE; + AT91C_BASE_SSC->SSC_TFMR = AT91C_BASE_SSC->SSC_RFMR; - SSC_CONTROL = SSC_CONTROL_RX_ENABLE | SSC_CONTROL_TX_ENABLE; + AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN; } //----------------------------------------------------------------------------- @@ -128,11 +131,11 @@ void FpgaSetupSsc(void) //----------------------------------------------------------------------------- void FpgaSetupSscDma(BYTE *buf, int len) { - PDC_RX_POINTER(SSC_BASE) = (DWORD)buf; - PDC_RX_COUNTER(SSC_BASE) = len; - PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD)buf; - PDC_RX_NEXT_COUNTER(SSC_BASE) = len; - PDC_CONTROL(SSC_BASE) = PDC_RX_ENABLE; + AT91C_BASE_PDC_SSC->PDC_RPR = (DWORD)buf; + AT91C_BASE_PDC_SSC->PDC_RCR = len; + AT91C_BASE_PDC_SSC->PDC_RNPR = (DWORD)buf; + AT91C_BASE_PDC_SSC->PDC_RNCR = len; + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN; } static void DownloadFPGA_byte(unsigned char w) @@ -154,8 +157,8 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers { int i=0; - PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON); - PIO_ENABLE = (1 << GPIO_FPGA_ON); + AT91C_BASE_PIOA->PIO_OER = GPIO_FPGA_ON; + AT91C_BASE_PIOA->PIO_PER = GPIO_FPGA_ON; HIGH(GPIO_FPGA_ON); // ensure everything is powered on SpinDelay(50); @@ -163,20 +166,27 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers LED_D_ON(); // These pins are inputs - PIO_OUTPUT_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE); + AT91C_BASE_PIOA->PIO_ODR = + GPIO_FPGA_NINIT | + GPIO_FPGA_DONE; // PIO controls the following pins - PIO_ENABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE); + AT91C_BASE_PIOA->PIO_PER = + GPIO_FPGA_NINIT | + GPIO_FPGA_DONE; // Enable pull-ups - PIO_NO_PULL_UP_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE); + AT91C_BASE_PIOA->PIO_PPUER = + GPIO_FPGA_NINIT | + GPIO_FPGA_DONE; // setup initial logic state HIGH(GPIO_FPGA_NPROGRAM); LOW(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_DIN); // These pins are outputs - PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM) | - (1 << GPIO_FPGA_CCLK) | - (1 << GPIO_FPGA_DIN); + AT91C_BASE_PIOA->PIO_OER = + GPIO_FPGA_NPROGRAM | + GPIO_FPGA_CCLK | + GPIO_FPGA_DIN; // enter FPGA configuration mode LOW(GPIO_FPGA_NPROGRAM); @@ -185,7 +195,7 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers i=100000; // wait for FPGA ready to accept data signal - while ((i) && ( !(PIO_PIN_DATA_STATUS & (1<PIO_PDSR & GPIO_FPGA_NINIT ) ) ) { i--; } @@ -215,7 +225,7 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers // continue to clock FPGA until ready signal goes high i=100000; - while ( (i--) && ( !(PIO_PIN_DATA_STATUS & (1<PIO_PDSR & GPIO_FPGA_DONE ) ) ) { HIGH(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK); } @@ -235,7 +245,7 @@ static int bitparse_initialized; * 00 09 0f f0 0f f0 0f f0 0f f0 00 00 01 * After that the format is 1 byte section type (ASCII character), 2 byte length * (big endian), bytes content. Except for section 'e' which has 4 bytes - * length. + * length. */ static const char _bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01}; static int bitparse_init(void * start_address, void *end_address) @@ -303,11 +313,11 @@ int bitparse_find_section(char section_name, char **section_start, unsigned int extern char _binary_fpga_bit_start, _binary_fpga_bit_end; void FpgaDownloadAndGo(void) { - /* Check for the new flash image format: Should have the .bit file at &_binary_fpga_bit_start + /* Check for the new flash image format: Should have the .bit file at &_binary_fpga_bit_start */ if(bitparse_init(&_binary_fpga_bit_start, &_binary_fpga_bit_end)) { /* Successfully initialized the .bit parser. Find the 'e' section and - * send its contents to the FPGA. + * send its contents to the FPGA. */ char *bitstream_start; unsigned int bitstream_length; @@ -323,7 +333,7 @@ void FpgaDownloadAndGo(void) * = 10,524 DWORDs, stored as DWORDS e.g. little-endian in memory, but each DWORD * is still to be transmitted in MSBit first order. Set the invert flag to indicate * that the DownloadFPGA function should invert every 4 byte sequence when doing - * the bytewise download. + * the bytewise download. */ if( *(DWORD*)0x102000 == 0xFFFFFFFF && *(DWORD*)0x102004 == 0xAA995566 ) DownloadFPGA((char*)0x102000, 10524*4, 1); @@ -368,8 +378,8 @@ void FpgaGatherVersion(char *dst, int len) void FpgaSendCommand(WORD cmd, WORD v) { SetupSpi(SPI_FPGA_MODE); - while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete - SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | cmd | v; // send the data + while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); // wait for the transfer to complete + AT91C_BASE_SPI->SPI_TDR = AT91C_SPI_LASTXFER | cmd | v; // send the data } //----------------------------------------------------------------------------- // Write the FPGA setup word (that determines what mode the logic is in, read @@ -386,17 +396,19 @@ void FpgaWriteConfWord(BYTE v) // closable, but should only close one at a time. Not an FPGA thing, but // the samples from the ADC always flow through the FPGA. //----------------------------------------------------------------------------- -void SetAdcMuxFor(int whichGpio) +void SetAdcMuxFor(DWORD whichGpio) { - PIO_OUTPUT_ENABLE = (1 << GPIO_MUXSEL_HIPKD) | - (1 << GPIO_MUXSEL_LOPKD) | - (1 << GPIO_MUXSEL_LORAW) | - (1 << GPIO_MUXSEL_HIRAW); - - PIO_ENABLE = (1 << GPIO_MUXSEL_HIPKD) | - (1 << GPIO_MUXSEL_LOPKD) | - (1 << GPIO_MUXSEL_LORAW) | - (1 << GPIO_MUXSEL_HIRAW); + AT91C_BASE_PIOA->PIO_OER = + GPIO_MUXSEL_HIPKD | + GPIO_MUXSEL_LOPKD | + GPIO_MUXSEL_LORAW | + GPIO_MUXSEL_HIRAW; + + AT91C_BASE_PIOA->PIO_PER = + GPIO_MUXSEL_HIPKD | + GPIO_MUXSEL_LOPKD | + GPIO_MUXSEL_LORAW | + GPIO_MUXSEL_HIRAW; LOW(GPIO_MUXSEL_HIPKD); LOW(GPIO_MUXSEL_HIRAW); diff --git a/armsrc/iso14443.c b/armsrc/iso14443.c index 311254d9..fab7336b 100644 --- a/armsrc/iso14443.c +++ b/armsrc/iso14443.c @@ -295,11 +295,11 @@ static BOOL GetIso14443CommandFromReader(BYTE *received, int *len, int maxLen) if(BUTTON_PRESS()) return FALSE; - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x00; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x00; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - BYTE b = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + BYTE b = (BYTE)AT91C_BASE_SSC->SSC_RHR; mask = 0x80; for(i = 0; i < 8; i++, mask >>= 1) { @@ -392,24 +392,24 @@ void SimulateIso14443Tag(void) LED_D_OFF(); FpgaWriteConfWord( FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); - SSC_TRANSMIT_HOLDING = 0xff; + AT91C_BASE_SSC->SSC_THR = 0xff; FpgaSetupSsc(); // Transmit the response. i = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { BYTE b = resp[i]; - SSC_TRANSMIT_HOLDING = b; + AT91C_BASE_SSC->SSC_THR = b; i++; if(i > respLen) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile BYTE b = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile BYTE b = (BYTE)AT91C_BASE_SSC->SSC_RHR; (void)b; } } @@ -454,7 +454,7 @@ static struct { * * Returns: true if we received a EOF * false if we are still waiting for some more - * + * */ static BOOL Handle14443SamplesDemod(int ci, int cq) { @@ -612,7 +612,7 @@ static BOOL Handle14443SamplesDemod(int ci, int cq) * Demodulate the samples we received from the tag * weTx: set to 'TRUE' if we behave like a reader * set to 'FALSE' if we behave like a snooper - * quiet: set to 'TRUE' to disable debug output + * quiet: set to 'TRUE' to disable debug output */ static void GetSamplesFor14443Demod(BOOL weTx, int n, BOOL quiet) { @@ -654,10 +654,10 @@ static void GetSamplesFor14443Demod(BOOL weTx, int n, BOOL quiet) (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP)); for(;;) { - int behindBy = lastRxCounter - PDC_RX_COUNTER(SSC_BASE); + int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; if(behindBy > max) max = behindBy; - while(((lastRxCounter-PDC_RX_COUNTER(SSC_BASE)) & (DMA_BUFFER_SIZE-1)) + while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1)) > 2) { ci = upTo[0]; @@ -665,8 +665,8 @@ static void GetSamplesFor14443Demod(BOOL weTx, int n, BOOL quiet) upTo += 2; if(upTo - dmaBuf > DMA_BUFFER_SIZE) { upTo -= DMA_BUFFER_SIZE; - PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD)upTo; - PDC_RX_NEXT_COUNTER(SSC_BASE) = DMA_BUFFER_SIZE; + AT91C_BASE_PDC_SSC->PDC_RNPR = (DWORD)upTo; + AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; } lastRxCounter -= 2; if(lastRxCounter <= 0) { @@ -687,7 +687,7 @@ static void GetSamplesFor14443Demod(BOOL weTx, int n, BOOL quiet) break; } } - PDC_CONTROL(SSC_BASE) = PDC_RX_DISABLE; + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; if (!quiet) DbpIntegers(max, gotFrame, Demod.len); } @@ -707,12 +707,12 @@ static void GetSamplesFor14443Demod(BOOL weTx, int n, BOOL quiet) c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { SBYTE b; - b = (SBYTE)SSC_RECEIVE_HOLDING; + b = (SBYTE)AT91C_BASE_SSC->SSC_RHR; dest[c++] = (BYTE)b; @@ -732,8 +732,8 @@ static void TransmitFor14443(void) FpgaSetupSsc(); - while(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0xff; + while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0xff; } // Signal field is ON with the appropriate Red LED @@ -744,12 +744,12 @@ static void TransmitFor14443(void) FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); for(c = 0; c < 10;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0xff; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0xff; c++; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -757,15 +757,15 @@ static void TransmitFor14443(void) c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = ToSend[c]; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = ToSend[c]; c++; if(c >= ToSendMax) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -831,8 +831,8 @@ void CodeIso14443bAsReader(const BYTE *cmd, int len) //----------------------------------------------------------------------------- // Read an ISO 14443 tag. We send it some set of commands, and record the -// responses. -// The command name is misleading, it actually decodes the reponse in HEX +// responses. +// The command name is misleading, it actually decodes the reponse in HEX // into the output buffer (read the result using hexsamples, not hisamples) //----------------------------------------------------------------------------- void AcquireRawAdcSamplesIso14443(DWORD parameter) @@ -861,19 +861,19 @@ void AcquireRawAdcSamplesIso14443(DWORD parameter) GetSamplesFor14443Demod(TRUE, 2000, FALSE); // LED_A_OFF(); } - + //----------------------------------------------------------------------------- // Read a SRI512 ISO 14443 tag. -// -// SRI512 tags are just simple memory tags, here we're looking at making a dump -// of the contents of the memory. No anticollision algorithm is done, we assume -// we have a single tag in the field. -// +// +// SRI512 tags are just simple memory tags, here we're looking at making a dump +// of the contents of the memory. No anticollision algorithm is done, we assume +// we have a single tag in the field. +// // I tried to be systematic and check every answer of the tag, every CRC, etc... //----------------------------------------------------------------------------- void ReadSRI512Iso14443(DWORD parameter) { - BYTE i = 0x00; + BYTE i = 0x00; // Make sure that we start from off, since the tags are stateful; // confusing things will happen if we don't reset them between reads. @@ -890,7 +890,7 @@ void ReadSRI512Iso14443(DWORD parameter) FpgaWriteConfWord( FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); SpinDelay(200); - + // First command: wake up the tag using the INITIATE command BYTE cmd1[] = { 0x06, 0x00, 0x97, 0x5b}; CodeIso14443bAsReader(cmd1, sizeof(cmd1)); @@ -898,102 +898,102 @@ void ReadSRI512Iso14443(DWORD parameter) // LED_A_ON(); GetSamplesFor14443Demod(TRUE, 2000,TRUE); // LED_A_OFF(); - - if (Demod.len == 0) { - DbpString("No response from tag"); - return; - } else { - DbpString("Randomly generated UID from tag (+ 2 byte CRC):"); - DbpIntegers(Demod.output[0], Demod.output[1],Demod.output[2]); - } - // There is a response, SELECT the uid - DbpString("Now SELECT tag:"); - cmd1[0] = 0x0E; // 0x0E is SELECT - cmd1[1] = Demod.output[0]; + + if (Demod.len == 0) { + DbpString("No response from tag"); + return; + } else { + DbpString("Randomly generated UID from tag (+ 2 byte CRC):"); + DbpIntegers(Demod.output[0], Demod.output[1],Demod.output[2]); + } + // There is a response, SELECT the uid + DbpString("Now SELECT tag:"); + cmd1[0] = 0x0E; // 0x0E is SELECT + cmd1[1] = Demod.output[0]; ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); CodeIso14443bAsReader(cmd1, sizeof(cmd1)); TransmitFor14443(); // LED_A_ON(); GetSamplesFor14443Demod(TRUE, 2000,TRUE); // LED_A_OFF(); - if (Demod.len != 3) { - DbpString("Expected 3 bytes from tag, got:"); - DbpIntegers(Demod.len,0x0,0x0); - return; - } - // Check the CRC of the answer: + if (Demod.len != 3) { + DbpString("Expected 3 bytes from tag, got:"); + DbpIntegers(Demod.len,0x0,0x0); + return; + } + // Check the CRC of the answer: ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { - DbpString("CRC Error reading select response."); - return; - } - // Check response from the tag: should be the same UID as the command we just sent: - if (cmd1[1] != Demod.output[0]) { - DbpString("Bad response to SELECT from Tag, aborting:"); - DbpIntegers(cmd1[1],Demod.output[0],0x0); - return; - } - // Tag is now selected, - // First get the tag's UID: - cmd1[0] = 0x0B; - ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); + DbpString("CRC Error reading select response."); + return; + } + // Check response from the tag: should be the same UID as the command we just sent: + if (cmd1[1] != Demod.output[0]) { + DbpString("Bad response to SELECT from Tag, aborting:"); + DbpIntegers(cmd1[1],Demod.output[0],0x0); + return; + } + // Tag is now selected, + // First get the tag's UID: + cmd1[0] = 0x0B; + ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); CodeIso14443bAsReader(cmd1, 3); // Only first three bytes for this one TransmitFor14443(); // LED_A_ON(); GetSamplesFor14443Demod(TRUE, 2000,TRUE); // LED_A_OFF(); - if (Demod.len != 10) { - DbpString("Expected 10 bytes from tag, got:"); - DbpIntegers(Demod.len,0x0,0x0); - return; - } - // The check the CRC of the answer (use cmd1 as temporary variable): + if (Demod.len != 10) { + DbpString("Expected 10 bytes from tag, got:"); + DbpIntegers(Demod.len,0x0,0x0); + return; + } + // The check the CRC of the answer (use cmd1 as temporary variable): ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]); if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) { - DbpString("CRC Error reading block! - Below: expected, got"); - DbpIntegers( (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9],0); - // Do not return;, let's go on... (we should retry, maybe ?) - } - DbpString("Tag UID (64 bits):"); - DbpIntegers((Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], 0); - - // Now loop to read all 16 blocks, address from 0 to 15 - DbpString("Tag memory dump, block 0 to 15"); - cmd1[0] = 0x08; - i = 0x00; - for (;;) { - if (i == 0x10) { - DbpString("System area block (0xff):"); - i = 0xff; - } - cmd1[1] = i; + DbpString("CRC Error reading block! - Below: expected, got"); + DbpIntegers( (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9],0); + // Do not return;, let's go on... (we should retry, maybe ?) + } + DbpString("Tag UID (64 bits):"); + DbpIntegers((Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], 0); + + // Now loop to read all 16 blocks, address from 0 to 15 + DbpString("Tag memory dump, block 0 to 15"); + cmd1[0] = 0x08; + i = 0x00; + for (;;) { + if (i == 0x10) { + DbpString("System area block (0xff):"); + i = 0xff; + } + cmd1[1] = i; ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); CodeIso14443bAsReader(cmd1, sizeof(cmd1)); TransmitFor14443(); // LED_A_ON(); GetSamplesFor14443Demod(TRUE, 2000,TRUE); -// LED_A_OFF(); - if (Demod.len != 6) { // Check if we got an answer from the tag - DbpString("Expected 6 bytes from tag, got less..."); - return; - } - // The check the CRC of the answer (use cmd1 as temporary variable): +// LED_A_OFF(); + if (Demod.len != 6) { // Check if we got an answer from the tag + DbpString("Expected 6 bytes from tag, got less..."); + return; + } + // The check the CRC of the answer (use cmd1 as temporary variable): ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) { - DbpString("CRC Error reading block! - Below: expected, got"); - DbpIntegers( (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5],0); - // Do not return;, let's go on... (we should retry, maybe ?) - } - // Now print out the memory location: - DbpString("Address , Contents, CRC"); - DbpIntegers(i, (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], (Demod.output[4]<<8)+Demod.output[5]); - if (i == 0xff) { - break; - } - i++; - } + DbpString("CRC Error reading block! - Below: expected, got"); + DbpIntegers( (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5],0); + // Do not return;, let's go on... (we should retry, maybe ?) + } + // Now print out the memory location: + DbpString("Address , Contents, CRC"); + DbpIntegers(i, (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], (Demod.output[4]<<8)+Demod.output[5]); + if (i == 0xff) { + break; + } + i++; + } } - + //============================================================================= // Finally, the `sniffer' combines elements from both the reader and @@ -1010,7 +1010,7 @@ void ReadSRI512Iso14443(DWORD parameter) * 0-1023 : Demodulated samples receive (1024 bytes) * 1024-1535 : Last Received command, 512 bytes (reader->tag) * 1536-2047 : Last Received command, 512 bytes(tag->reader) - * 2048-2304 : DMA Buffer, 256 bytes (samples) + * 2048-2304 : DMA Buffer, 256 bytes (samples) */ void SnoopIso14443(void) { @@ -1069,7 +1069,7 @@ void SnoopIso14443(void) FpgaSetupSscDma((BYTE *)dmaBuf, DMA_BUFFER_SIZE); // And now we loop, receiving samples. for(;;) { - int behindBy = (lastRxCounter - PDC_RX_COUNTER(SSC_BASE)) & + int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1); if(behindBy > maxBehindBy) { maxBehindBy = behindBy; @@ -1088,8 +1088,8 @@ void SnoopIso14443(void) if(upTo - dmaBuf > DMA_BUFFER_SIZE) { upTo -= DMA_BUFFER_SIZE; lastRxCounter += DMA_BUFFER_SIZE; - PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD) upTo; - PDC_RX_NEXT_COUNTER(SSC_BASE) = DMA_BUFFER_SIZE; + AT91C_BASE_PDC_SSC->PDC_RNPR = (DWORD) upTo; + AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; } samples += 2; @@ -1169,5 +1169,5 @@ void SnoopIso14443(void) done: LED_D_OFF(); - PDC_CONTROL(SSC_BASE) = PDC_RX_DISABLE; + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; } diff --git a/armsrc/iso14443a.c b/armsrc/iso14443a.c index 1571be0a..dbada076 100644 --- a/armsrc/iso14443a.c +++ b/armsrc/iso14443a.c @@ -583,7 +583,7 @@ void SnoopIso14443a(void) // And now we loop, receiving samples. for(;;) { WDT_HIT(); - int behindBy = (lastRxCounter - PDC_RX_COUNTER(SSC_BASE)) & + int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1); if(behindBy > maxBehindBy) { maxBehindBy = behindBy; @@ -600,8 +600,8 @@ void SnoopIso14443a(void) if(upTo - dmaBuf > DMA_BUFFER_SIZE) { upTo -= DMA_BUFFER_SIZE; lastRxCounter += DMA_BUFFER_SIZE; - PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD)upTo; - PDC_RX_NEXT_COUNTER(SSC_BASE) = DMA_BUFFER_SIZE; + AT91C_BASE_PDC_SSC->PDC_RNPR = (DWORD)upTo; + AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; } samples += 4; @@ -672,7 +672,7 @@ void SnoopIso14443a(void) DbpIntegers(Uart.byteCntMax, traceLen, (int)Uart.output[0]); done: - PDC_CONTROL(SSC_BASE) = PDC_RX_DISABLE; + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; DbpIntegers(maxBehindBy, Uart.state, Uart.byteCnt); DbpIntegers(Uart.byteCntMax, traceLen, (int)Uart.output[0]); LED_A_OFF(); @@ -857,11 +857,11 @@ static BOOL GetIso14443aCommandFromReader(BYTE *received, int *len, int maxLen) if(BUTTON_PRESS()) return FALSE; - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x00; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x00; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - BYTE b = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + BYTE b = (BYTE)AT91C_BASE_SSC->SSC_RHR; if(MillerDecoding((b & 0xf0) >> 4)) { *len = Uart.byteCnt; return TRUE; @@ -1128,7 +1128,7 @@ ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); // Modulate Manchester FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); - SSC_TRANSMIT_HOLDING = 0x00; + AT91C_BASE_SSC->SSC_THR = 0x00; FpgaSetupSsc(); // ### Transmit the response ### @@ -1136,11 +1136,11 @@ ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); b = 0x00; fdt_indicator = FALSE; for(;;) { - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile BYTE b = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile BYTE b = (BYTE)AT91C_BASE_SSC->SSC_RHR; (void)b; } - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { if(i > respLen) { b = 0x00; u++; @@ -1148,7 +1148,7 @@ ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); b = resp[i]; i++; } - SSC_TRANSMIT_HOLDING = b; + AT91C_BASE_SSC->SSC_THR = b; if(u > 4) { break; @@ -1177,12 +1177,12 @@ static void TransmitFor14443a(const BYTE *cmd, int len, int *samples, int *wait) if(*wait < 10) { *wait = 10; } for(c = 0; c < *wait;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x00; // For exact timing! + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing! c++; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -1190,15 +1190,15 @@ static void TransmitFor14443a(const BYTE *cmd, int len, int *samples, int *wait) c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = cmd[c]; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = cmd[c]; c++; if(c >= len) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -1454,13 +1454,13 @@ static BOOL GetIso14443aAnswerFromTag(BYTE *receivedResponse, int maxLen, int *s for(;;) { WDT_HIT(); - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x00; // To make use of exact timing of next command from reader!! + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!! (*elapsed)++; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { if(c < 512) { c++; } else { return FALSE; } - b = (BYTE)SSC_RECEIVE_HOLDING; + b = (BYTE)AT91C_BASE_SSC->SSC_RHR; if(ManchesterDecoding((b & 0xf0) >> 4)) { *samples = ((c - 1) << 3) + 4; return TRUE; diff --git a/armsrc/iso15693.c b/armsrc/iso15693.c index a80e6c6a..723d297d 100644 --- a/armsrc/iso15693.c +++ b/armsrc/iso15693.c @@ -478,12 +478,12 @@ static void TransmitTo15693Tag(const BYTE *cmd, int len, int *samples, int *wait if(*wait < 10) { *wait = 10; } // for(c = 0; c < *wait;) { -// if(SSC_STATUS & (SSC_STATUS_TX_READY)) { -// SSC_TRANSMIT_HOLDING = 0x00; // For exact timing! +// if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { +// AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing! // c++; // } -// if(SSC_STATUS & (SSC_STATUS_RX_READY)) { -// volatile DWORD r = SSC_RECEIVE_HOLDING; +// if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { +// volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; // (void)r; // } // WDT_HIT(); @@ -491,15 +491,15 @@ static void TransmitTo15693Tag(const BYTE *cmd, int len, int *samples, int *wait c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = cmd[c]; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = cmd[c]; c++; if(c >= len) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -520,15 +520,15 @@ static void TransmitTo15693Reader(const BYTE *cmd, int len, int *samples, int *w c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = cmd[c]; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = cmd[c]; c++; if(c >= len) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -550,12 +550,12 @@ static int GetIso15693AnswerFromTag(BYTE *receivedResponse, int maxLen, int *sam c = 0; getNext = FALSE; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { SBYTE b; - b = (SBYTE)SSC_RECEIVE_HOLDING; + b = (SBYTE)AT91C_BASE_SSC->SSC_RHR; // The samples are correlations against I and Q versions of the // tone that the tag AM-modulates, so every other sample is I, @@ -697,12 +697,12 @@ static int GetIso15693AnswerFromSniff(BYTE *receivedResponse, int maxLen, int *s c = 0; getNext = FALSE; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { SBYTE b; - b = (SBYTE)SSC_RECEIVE_HOLDING; + b = (SBYTE)AT91C_BASE_SSC->SSC_RHR; // The samples are correlations against I and Q versions of the // tone that the tag AM-modulates, so every other sample is I, @@ -855,15 +855,15 @@ void AcquireRawAdcSamplesIso15693(void) c = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = ToSend[c]; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = ToSend[c]; c++; if(c == ToSendMax+3) { break; } } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - volatile DWORD r = SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + volatile DWORD r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -874,12 +874,12 @@ void AcquireRawAdcSamplesIso15693(void) c = 0; getNext = FALSE; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { SBYTE b; - b = (SBYTE)SSC_RECEIVE_HOLDING; + b = (SBYTE)AT91C_BASE_SSC->SSC_RHR; // The samples are correlations against I and Q versions of the // tone that the tag AM-modulates, so every other sample is I, diff --git a/armsrc/lfops.c b/armsrc/lfops.c index 8ad25ce0..c2d908df 100644 --- a/armsrc/lfops.c +++ b/armsrc/lfops.c @@ -42,12 +42,12 @@ void DoAcquisition125k(BOOL at134khz) memset(dest,0,n); i = 0; for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; LED_D_ON(); } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - dest[i] = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR; i++; LED_D_OFF(); if(i >= n) { @@ -274,17 +274,17 @@ void WriteTIbyte(BYTE b) { if (b&(1<PIO_PDR = GPIO_SSC_DIN; + AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN; // steal this pin from the SSP and use it to control the modulation - PIO_ENABLE = (1<PIO_PER = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; - SSC_CONTROL = SSC_CONTROL_RESET; - SSC_CONTROL = SSC_CONTROL_RX_ENABLE | SSC_CONTROL_TX_ENABLE; + AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST; + AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN; - // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long - // 48/2 = 24 MHz clock must be divided by 12 - SSC_CLOCK_DIVISOR = 12; + // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long + // 48/2 = 24 MHz clock must be divided by 12 + AT91C_BASE_SSC->SSC_CMR = 12; - SSC_RECEIVE_CLOCK_MODE = SSC_CLOCK_MODE_SELECT(0); - SSC_RECEIVE_FRAME_MODE = SSC_FRAME_MODE_BITS_IN_WORD(32) | SSC_FRAME_MODE_MSB_FIRST; - SSC_TRANSMIT_CLOCK_MODE = 0; - SSC_TRANSMIT_FRAME_MODE = 0; + AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(0); + AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF; + AT91C_BASE_SSC->SSC_TCMR = 0; + AT91C_BASE_SSC->SSC_TFMR = 0; LED_D_ON(); // modulate antenna - PIO_OUTPUT_DATA_SET = (1<= TIBUFLEN) break; - } - WDT_HIT(); + if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { + BigBuf[i] = AT91C_BASE_SSC->SSC_RHR; // store 32 bit values in buffer + i++; if(i >= TIBUFLEN) break; + } + WDT_HIT(); } // return stolen pin to SSP - PIO_DISABLE = (1<PIO_PDR = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT; char *dest = (char *)BigBuf; n = TIBUFLEN*32; @@ -394,8 +394,8 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc) LED_A_ON(); // steal this pin from the SSP and use it to control the modulation - PIO_ENABLE = (1<PIO_PER = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; // writing algorithm: // a high bit consists of a field off for 1ms and field on for 1ms @@ -408,7 +408,7 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc) // finish with 15ms programming time // modulate antenna - PIO_OUTPUT_DATA_SET = (1<>8 )&0xff ); // crc hi WriteTIbyte(0x00); // write frame lo WriteTIbyte(0x03); // write frame hi - PIO_OUTPUT_DATA_SET = (1<PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK; - PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT); - PIO_OUTPUT_DISABLE = (1 << GPIO_SSC_CLK); + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK; #define SHORT_COIL() LOW(GPIO_SSC_DOUT) -#define OPEN_COIL() HIGH(GPIO_SSC_DOUT) +#define OPEN_COIL() HIGH(GPIO_SSC_DOUT) i = 0; for(;;) { - while(!(PIO_PIN_DATA_STATUS & (1<PIO_PDSR & GPIO_SSC_CLK)) { if(BUTTON_PRESS()) { DbpString("Stopped"); return; @@ -473,7 +473,7 @@ void SimulateTagLowFrequency(int period, int ledcontrol) if (ledcontrol) LED_D_OFF(); - while(PIO_PIN_DATA_STATUS & (1<PIO_PDSR & GPIO_SSC_CLK) { if(BUTTON_PRESS()) { DbpString("Stopped"); return; @@ -529,7 +529,7 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0) hitag2_init(); /* Set up simulator mode, frequency divisor which will drive the FPGA - * and analog mux selection. + * and analog mux selection. */ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR); FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor); @@ -539,15 +539,19 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0) /* Set up Timer 1: * Capture mode, timer source MCK/2 (TIMER_CLOCK1), TIOA is external trigger, * external trigger rising edge, load RA on rising edge of TIOA, load RB on rising - * edge of TIOA. Assign PA15 to TIOA1 (peripheral B) + * edge of TIOA. Assign PA15 to TIOA1 (peripheral B) */ - PMC_PERIPHERAL_CLK_ENABLE = (1 << PERIPH_TC1); - PIO_PERIPHERAL_B_SEL = (1 << GPIO_SSC_FRAME); - TC1_CCR = TC_CCR_CLKDIS; - TC1_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_ETRGEDG_RISING | TC_CMR_ABETRG | - TC_CMR_LDRA_RISING | TC_CMR_LDRB_RISING; - TC1_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG; + AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); + AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; + AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; + AT91C_BASE_TC1->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | + AT91C_TC_ETRGEDG_RISING | + AT91C_TC_ABETRG | + AT91C_TC_LDRA_RISING | + AT91C_TC_LDRB_RISING; + AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | + AT91C_TC_SWTRG; /* calculate the new value for the carrier period in terms of TC1 values */ t0 = t0/2; @@ -555,8 +559,8 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0) int overflow = 0; while(!BUTTON_PRESS()) { WDT_HIT(); - if(TC1_SR & TC_SR_LDRAS) { - int ra = TC1_RA; + if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { + int ra = AT91C_BASE_TC1->TC_RA; if((ra > t0*HITAG_T_EOF) | overflow) ra = t0*HITAG_T_EOF+1; #if DEBUG_RA_VALUES if(ra > 255 || overflow) ra = 255; @@ -583,14 +587,14 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0) overflow = 0; LED_D_ON(); } else { - if(TC1_CV > t0*HITAG_T_EOF) { + if(AT91C_BASE_TC1->TC_CV > t0*HITAG_T_EOF) { /* Minor nuisance: In Capture mode, the timer can not be * stopped by a Compare C. There's no way to stop the clock * in software, so we'll just have to note the fact that an * overflow happened and the next loaded timer value might * have wrapped. Also, this marks the end of frame, and the * still running counter can be used to determine the correct - * time for the start of the reply. + * time for the start of the reply. */ overflow = 1; @@ -619,37 +623,37 @@ static void hitag_send_bit(int t0, int bit) { /* Manchester: Loaded, then unloaded */ LED_A_ON(); SHORT_COIL(); - while(TC1_CV < t0*15); + while(AT91C_BASE_TC1->TC_CV < t0*15); OPEN_COIL(); - while(TC1_CV < t0*31); + while(AT91C_BASE_TC1->TC_CV < t0*31); LED_A_OFF(); } else if(bit == 0) { /* Manchester: Unloaded, then loaded */ LED_B_ON(); OPEN_COIL(); - while(TC1_CV < t0*15); + while(AT91C_BASE_TC1->TC_CV < t0*15); SHORT_COIL(); - while(TC1_CV < t0*31); + while(AT91C_BASE_TC1->TC_CV < t0*31); LED_B_OFF(); } - TC1_CCR = TC_CCR_SWTRG; /* Reset clock for the next bit */ + AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; /* Reset clock for the next bit */ } static void hitag_send_frame(int t0, int frame_len, const char const * frame, int fdt) { OPEN_COIL(); - PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT); + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; /* Wait for HITAG_T_WRESP carrier periods after the last reader bit, * not that since the clock counts since the rising edge, but T_wresp is * with respect to the falling edge, we need to wait actually (T_wresp - T_g) - * periods. The gap time T_g varies (4..10). + * periods. The gap time T_g varies (4..10). */ - while(TC1_CV < t0*(fdt-8)); + while(AT91C_BASE_TC1->TC_CV < t0*(fdt-8)); - int saved_cmr = TC1_CMR; - TC1_CMR &= ~TC_CMR_ETRGEDG; /* Disable external trigger for the clock */ - TC1_CCR = TC_CCR_SWTRG; /* Reset the clock and use it for response timing */ + int saved_cmr = AT91C_BASE_TC1->TC_CMR; + AT91C_BASE_TC1->TC_CMR &= ~AT91C_TC_ETRGEDG; /* Disable external trigger for the clock */ + AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; /* Reset the clock and use it for response timing */ int i; for(i=0; i<5; i++) @@ -660,7 +664,7 @@ static void hitag_send_frame(int t0, int frame_len, const char const * frame, in } OPEN_COIL(); - TC1_CMR = saved_cmr; + AT91C_BASE_TC1->TC_CMR = saved_cmr; } /* Callback structure to cleanly separate tag emulation code from the radio layer. */ @@ -813,13 +817,13 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol) m = sizeof(BigBuf); memset(dest,128,m); for(;;) { - if(SSC_STATUS & (SSC_STATUS_TX_READY)) { - SSC_TRANSMIT_HOLDING = 0x43; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + AT91C_BASE_SSC->SSC_THR = 0x43; if (ledcontrol) LED_D_ON(); } - if(SSC_STATUS & (SSC_STATUS_RX_READY)) { - dest[i] = (BYTE)SSC_RECEIVE_HOLDING; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR; // we don't care about actual value, only if it's more or less than a // threshold essentially we capture zero crossings for later analysis if(dest[i] < 127) dest[i] = 0; else dest[i] = 1; diff --git a/armsrc/util.c b/armsrc/util.c index 650ba22b..3cad25f4 100644 --- a/armsrc/util.c +++ b/armsrc/util.c @@ -115,18 +115,18 @@ int BUTTON_CLICKED(int ms) return BUTTON_NO_CLICK; // Borrow a PWM unit for my real-time clock - PWM_ENABLE = PWM_CHANNEL(0); + AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0); // 48 MHz / 1024 gives 46.875 kHz - PWM_CH_MODE(0) = PWM_CH_MODE_PRESCALER(10); - PWM_CH_DUTY_CYCLE(0) = 0; - PWM_CH_PERIOD(0) = 0xffff; + AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10); + AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0; + AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff; - WORD start = (WORD)PWM_CH_COUNTER(0); + WORD start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; int letoff = 0; for(;;) { - WORD now = (WORD)PWM_CH_COUNTER(0); + WORD now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; // We haven't let off the button yet if (!letoff) @@ -137,7 +137,7 @@ int BUTTON_CLICKED(int ms) letoff = 1; // reset our timer for 500ms - start = (WORD)PWM_CH_COUNTER(0); + start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; ticks = (48000 * (500)) >> 10; } @@ -178,17 +178,17 @@ int BUTTON_HELD(int ms) return BUTTON_NO_CLICK; // Borrow a PWM unit for my real-time clock - PWM_ENABLE = PWM_CHANNEL(0); + AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0); // 48 MHz / 1024 gives 46.875 kHz - PWM_CH_MODE(0) = PWM_CH_MODE_PRESCALER(10); - PWM_CH_DUTY_CYCLE(0) = 0; - PWM_CH_PERIOD(0) = 0xffff; + AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10); + AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0; + AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff; - WORD start = (WORD)PWM_CH_COUNTER(0); + WORD start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; for(;;) { - WORD now = (WORD)PWM_CH_COUNTER(0); + WORD now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; // As soon as our button let go, we didn't hold long enough if (!BUTTON_PRESS()) @@ -213,16 +213,16 @@ void SpinDelayUs(int us) int ticks = (48*us) >> 10; // Borrow a PWM unit for my real-time clock - PWM_ENABLE = PWM_CHANNEL(0); + AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0); // 48 MHz / 1024 gives 46.875 kHz - PWM_CH_MODE(0) = PWM_CH_MODE_PRESCALER(10); - PWM_CH_DUTY_CYCLE(0) = 0; - PWM_CH_PERIOD(0) = 0xffff; + AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10); + AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0; + AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff; - WORD start = (WORD)PWM_CH_COUNTER(0); + WORD start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; for(;;) { - WORD now = (WORD)PWM_CH_COUNTER(0); + WORD now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR; if (now == (WORD)(start + ticks)) return; @@ -239,7 +239,7 @@ void SpinDelay(int ms) /* Similar to FpgaGatherVersion this formats stored version information * into a string representation. It takes a pointer to the struct version_information, * verifies the magic properties, then stores a formatted string, prefixed by - * prefix in dst. + * prefix in dst. */ void FormatVersionInformation(char *dst, int len, const char *prefix, void *version_information) { diff --git a/bootrom/bootrom.c b/bootrom/bootrom.c index c8c695cc..7b29ad97 100644 --- a/bootrom/bootrom.c +++ b/bootrom/bootrom.c @@ -1,7 +1,7 @@ #include struct common_area common_area __attribute__((section(".commonarea"))); -unsigned int start_addr, end_addr, bootrom_unlocked; +unsigned int start_addr, end_addr, bootrom_unlocked; extern char _bootrom_start, _bootrom_end, _flash_start, _flash_end; static void ConfigClocks(void) @@ -10,53 +10,57 @@ static void ConfigClocks(void) // slow clock runs at 32Khz typical regardless of crystal // enable system clock and USB clock - PMC_SYS_CLK_ENABLE = PMC_SYS_CLK_PROCESSOR_CLK | PMC_SYS_CLK_UDP_CLK; + AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK | AT91C_PMC_UDP; // enable the clock to the following peripherals - PMC_PERIPHERAL_CLK_ENABLE = - (1<PMC_PCER = + (1<PMC_MOR = + PMC_MAIN_OSC_ENABLE | + PMC_MAIN_OSC_STARTUP_DELAY(0x50); // wait for main oscillator to stabilize - while ( !(PMC_INTERRUPT_STATUS & PMC_MAIN_OSCILLATOR_STABILIZED) ) + while ( !(AT91C_BASE_PMC->PMC_SR & PMC_MAIN_OSC_STABILIZED) ) ; // minimum PLL clock frequency is 80 MHz in range 00 (96 here so okay) // frequency is crystal * multiplier / divisor = 16Mhz * 12 / 2 = 96Mhz - PMC_PLL = PMC_PLL_DIVISOR(2) | PMC_PLL_COUNT_BEFORE_LOCK(0x50) | - PMC_PLL_FREQUENCY_RANGE(0) | PMC_PLL_MULTIPLIER(12) | - PMC_PLL_USB_DIVISOR(1); + AT91C_BASE_PMC->PMC_PLLR = + PMC_PLL_DIVISOR(2) | + PMC_PLL_COUNT_BEFORE_LOCK(0x50) | + PMC_PLL_FREQUENCY_RANGE(0) | + PMC_PLL_MULTIPLIER(12) | + PMC_PLL_USB_DIVISOR(1); // wait for PLL to lock - while ( !(PMC_INTERRUPT_STATUS & PMC_MAIN_OSCILLATOR_PLL_LOCK) ) + while ( !(AT91C_BASE_PMC->PMC_SR & PMC_MAIN_OSC_PLL_LOCK) ) ; // we want a master clock (MCK) to be PLL clock / 2 = 96Mhz / 2 = 48Mhz // as per datasheet, this register must be programmed in two operations // when changing to PLL, program the prescaler first then the source - PMC_MASTER_CLK = PMC_CLK_PRESCALE_DIV_2; + AT91C_BASE_PMC->PMC_MCKR = PMC_CLK_PRESCALE_DIV_2; // wait for main clock ready signal - while ( !(PMC_INTERRUPT_STATUS & PMC_MAIN_OSCILLATOR_MCK_READY) ) + while ( !(AT91C_BASE_PMC->PMC_SR & PMC_MAIN_OSC_MCK_READY) ) ; // set the source to PLL - PMC_MASTER_CLK = PMC_CLK_SELECTION_PLL_CLOCK | PMC_CLK_PRESCALE_DIV_2; + AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | PMC_CLK_PRESCALE_DIV_2; // wait for main clock ready signal - while ( !(PMC_INTERRUPT_STATUS & PMC_MAIN_OSCILLATOR_MCK_READY) ) + while ( !(AT91C_BASE_PMC->PMC_SR & PMC_MAIN_OSC_MCK_READY) ) ; } @@ -79,7 +83,7 @@ void UsbPacketReceived(BYTE *packet, int len) case CMD_DEVICE_INFO: dont_ack = 1; c->cmd = CMD_DEVICE_INFO; - c->ext1 = DEVICE_INFO_FLAG_BOOTROM_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_BOOTROM | + c->ext1 = DEVICE_INFO_FLAG_BOOTROM_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_BOOTROM | DEVICE_INFO_FLAG_UNDERSTANDS_START_FLASH; if(common_area.flags.osimage_present) c->ext1 |= DEVICE_INFO_FLAG_OSIMAGE_PRESENT; UsbSendPacket(packet, len); @@ -87,7 +91,7 @@ void UsbPacketReceived(BYTE *packet, int len) case CMD_SETUP_WRITE: /* The temporary write buffer of the embedded flash controller is mapped to the - * whole memory region, only the last 8 bits are decoded. + * whole memory region, only the last 8 bits are decoded. */ p = (volatile DWORD *)&_flash_start; for(i = 0; i < 12; i++) { @@ -102,26 +106,26 @@ void UsbPacketReceived(BYTE *packet, int len) } /* Check that the address that we are supposed to write to is within our allowed region */ - if( ((c->ext1+FLASH_PAGE_SIZE_BYTES-1) >= end_addr) || (c->ext1 < start_addr) ) { + if( ((c->ext1+AT91C_IFLASH_PAGE_SIZE-1) >= end_addr) || (c->ext1 < start_addr) ) { /* Disallow write */ dont_ack = 1; c->cmd = CMD_NACK; UsbSendPacket(packet, len); } else { /* Translate address to flash page and do flash, update here for the 512k part */ - MC_FLASH_COMMAND = MC_FLASH_COMMAND_KEY | - MC_FLASH_COMMAND_PAGEN((c->ext1-(int)&_flash_start)/FLASH_PAGE_SIZE_BYTES) | - FCMD_WRITE_PAGE; + AT91C_BASE_EFC0->EFC_FCR = MC_FLASH_COMMAND_KEY | + MC_FLASH_COMMAND_PAGEN((c->ext1-(int)&_flash_start)/AT91C_IFLASH_PAGE_SIZE) | + AT91C_MC_FCMD_START_PROG; } - while(!(MC_FLASH_STATUS & MC_FLASH_STATUS_READY)) + while(!(AT91C_BASE_EFC0->EFC_FSR & MC_FLASH_STATUS_READY)) ; break; case CMD_HARDWARE_RESET: USB_D_PLUS_PULLUP_OFF(); - RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET; + AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST; break; - + case CMD_START_FLASH: if(c->ext3 == START_FLASH_MAGIC) bootrom_unlocked = 1; else bootrom_unlocked = 0; @@ -132,9 +136,9 @@ void UsbPacketReceived(BYTE *packet, int len) int allow_end = (int)&_flash_end; int cmd_start = c->ext1; int cmd_end = c->ext2; - + /* Only allow command if the bootrom is unlocked, or the parameters are outside of the protected - * bootrom area. In any case they must be within the flash area. + * bootrom area. In any case they must be within the flash area. */ if( (bootrom_unlocked || ((cmd_start >= prot_end) || (cmd_end < prot_start))) && (cmd_start >= allow_start) && (cmd_end <= allow_end) ) { @@ -148,7 +152,7 @@ void UsbPacketReceived(BYTE *packet, int len) } } break; - + default: Fatal(); break; @@ -165,18 +169,18 @@ static void flash_mode(int externally_entered) start_addr = 0; end_addr = 0; bootrom_unlocked = 0; - + UsbStart(); for(;;) { WDT_HIT(); - + UsbPoll(TRUE); - + if(!externally_entered && !BUTTON_PRESS()) { /* Perform a reset to leave flash mode */ USB_D_PLUS_PULLUP_OFF(); LED_B_ON(); - RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET; + AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST; for(;;); } if(externally_entered && BUTTON_PRESS()) { @@ -195,65 +199,71 @@ void BootROM(void) // Kill all the pullups, especially the one on USB D+; leave them for // the unused pins, though. - PIO_NO_PULL_UP_ENABLE = (1 << GPIO_USB_PU) | - (1 << GPIO_LED_A) | - (1 << GPIO_LED_B) | - (1 << GPIO_LED_C) | - (1 << GPIO_LED_D) | - (1 << GPIO_FPGA_DIN) | - (1 << GPIO_FPGA_DOUT) | - (1 << GPIO_FPGA_CCLK) | - (1 << GPIO_FPGA_NINIT) | - (1 << GPIO_FPGA_NPROGRAM) | - (1 << GPIO_FPGA_DONE) | - (1 << GPIO_MUXSEL_HIPKD) | - (1 << GPIO_MUXSEL_HIRAW) | - (1 << GPIO_MUXSEL_LOPKD) | - (1 << GPIO_MUXSEL_LORAW) | - (1 << GPIO_RELAY) | - (1 << GPIO_NVDD_ON); - // (and add GPIO_FPGA_ON) + AT91C_BASE_PIOA->PIO_PPUDR = + GPIO_USB_PU | + GPIO_LED_A | + GPIO_LED_B | + GPIO_LED_C | + GPIO_LED_D | + GPIO_FPGA_DIN | + GPIO_FPGA_DOUT | + GPIO_FPGA_CCLK | + GPIO_FPGA_NINIT | + GPIO_FPGA_NPROGRAM | + GPIO_FPGA_DONE | + GPIO_MUXSEL_HIPKD | + GPIO_MUXSEL_HIRAW | + GPIO_MUXSEL_LOPKD | + GPIO_MUXSEL_LORAW | + GPIO_RELAY | + GPIO_NVDD_ON; + // (and add GPIO_FPGA_ON) // These pins are outputs - PIO_OUTPUT_ENABLE = (1 << GPIO_LED_A) | - (1 << GPIO_LED_B) | - (1 << GPIO_LED_C) | - (1 << GPIO_LED_D) | - (1 << GPIO_RELAY) | - (1 << GPIO_NVDD_ON); + AT91C_BASE_PIOA->PIO_OER = + GPIO_LED_A | + GPIO_LED_B | + GPIO_LED_C | + GPIO_LED_D | + GPIO_RELAY | + GPIO_NVDD_ON; // PIO controls the following pins - PIO_ENABLE = (1 << GPIO_USB_PU) | - (1 << GPIO_LED_A) | - (1 << GPIO_LED_B) | - (1 << GPIO_LED_C) | - (1 << GPIO_LED_D); + AT91C_BASE_PIOA->PIO_PER = + GPIO_USB_PU | + GPIO_LED_A | + GPIO_LED_B | + GPIO_LED_C | + GPIO_LED_D; USB_D_PLUS_PULLUP_OFF(); LED_D_OFF(); LED_C_ON(); LED_B_OFF(); LED_A_OFF(); - + // if 512K FLASH part - TODO make some defines :) - if ((DBGU_CIDR | 0xf00) == 0xa00) { - MC_FLASH_MODE0 = MC_FLASH_MODE_FLASH_WAIT_STATES(1) | - MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48); - MC_FLASH_MODE1 = MC_FLASH_MODE_FLASH_WAIT_STATES(1) | - MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48); + if ((AT91C_BASE_DBGU->DBGU_CIDR | 0xf00) == 0xa00) { + AT91C_BASE_EFC0->EFC_FMR = + MC_FLASH_MODE_FLASH_WAIT_STATES(1) | + MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48); + AT91C_BASE_EFC1->EFC_FMR = + MC_FLASH_MODE_FLASH_WAIT_STATES(1) | + MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48); } else { - MC_FLASH_MODE0 = MC_FLASH_MODE_FLASH_WAIT_STATES(0) | - MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48); + AT91C_BASE_EFC0->EFC_FMR = + MC_FLASH_MODE_FLASH_WAIT_STATES(0) | + MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48); } - + // Initialize all system clocks ConfigClocks(); - + LED_A_ON(); - + int common_area_present = 0; - switch(RSTC_STATUS & RST_STATUS_TYPE_MASK) { - case RST_STATUS_TYPE_WATCHDOG: - case RST_STATUS_TYPE_SOFTWARE: - case RST_STATUS_TYPE_USER: + switch(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_RSTTYP) { + case AT91C_RSTC_RSTTYP_WATCHDOG: + case AT91C_RSTC_RSTTYP_SOFTWARE: + case AT91C_RSTC_RSTTYP_USER: /* In these cases the common_area in RAM should be ok, retain it if it's there */ if(common_area.magic == COMMON_AREA_MAGIC && common_area.version == 1) { common_area_present = 1; @@ -262,7 +272,7 @@ void BootROM(void) default: /* Otherwise, initialize it from scratch */ break; } - + if(!common_area_present){ /* Common area not ok, initialize it */ int i; for(i=0; iUDP_FDR[0] = *data; data++; } - if(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED) { - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_TX_PACKET_ACKED; - while(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED) + if(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP) { + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_TXCOMP; + while(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP) ; } - UDP_ENDPOINT_CSR(0) |= UDP_CSR_TX_PACKET; + AT91C_BASE_UDP->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY; do { - if(UDP_ENDPOINT_CSR(0) & UDP_CSR_RX_PACKET_RECEIVED_BANK_0) { + if(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_RX_DATA_BK0) { // This means that the host is trying to write to us, so // abandon our write to them. - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_RX_PACKET_RECEIVED_BANK_0; + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_RX_DATA_BK0; return; } - } while(!(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED)); + } while(!(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP)); } while(len > 0); - if(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED) { - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_TX_PACKET_ACKED; - while(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED) + if(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP) { + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_TXCOMP; + while(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP) ; } } static void UsbSendZeroLength(void) { - UDP_ENDPOINT_CSR(0) |= UDP_CSR_TX_PACKET; + AT91C_BASE_UDP->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY; - while(!(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED)) + while(!(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP)) ; - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_TX_PACKET_ACKED; + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_TXCOMP; - while(UDP_ENDPOINT_CSR(0) & UDP_CSR_TX_PACKET_ACKED) + while(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_TXCOMP) ; } static void UsbSendStall(void) { - UDP_ENDPOINT_CSR(0) |= UDP_CSR_FORCE_STALL; + AT91C_BASE_UDP->UDP_CSR[0] |= AT91C_UDP_FORCESTALL; - while(!(UDP_ENDPOINT_CSR(0) & UDP_CSR_STALL_SENT)) + while(!(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_STALLSENT)) ; - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_STALL_SENT; + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_STALLSENT; - while(UDP_ENDPOINT_CSR(0) & UDP_CSR_STALL_SENT) + while(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_STALLSENT) ; } @@ -278,17 +278,17 @@ static void HandleRxdSetupData(void) UsbSetupData usd; for(i = 0; i < sizeof(usd); i++) { - ((BYTE *)&usd)[i] = UDP_ENDPOINT_FIFO(0); + ((BYTE *)&usd)[i] = AT91C_BASE_UDP->UDP_FDR[0]; } if(usd.bmRequestType & 0x80) { - UDP_ENDPOINT_CSR(0) |= UDP_CSR_CONTROL_DATA_DIR; - while(!(UDP_ENDPOINT_CSR(0) & UDP_CSR_CONTROL_DATA_DIR)) + AT91C_BASE_UDP->UDP_CSR[0] |= AT91C_UDP_DIR; + while(!(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_DIR)) ; } - UDP_ENDPOINT_CSR(0) &= ~UDP_CSR_RX_HAVE_READ_SETUP_DATA; - while(UDP_ENDPOINT_CSR(0) & UDP_CSR_RX_HAVE_READ_SETUP_DATA) + AT91C_BASE_UDP->UDP_CSR[0] &= ~AT91C_UDP_RXSETUP; + while(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_RXSETUP) ; switch(usd.bRequest) { @@ -312,11 +312,11 @@ static void HandleRxdSetupData(void) case USB_REQUEST_SET_ADDRESS: UsbSendZeroLength(); - UDP_FUNCTION_ADDR = UDP_FUNCTION_ADDR_ENABLED | usd.wValue ; + AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN | usd.wValue ; if(usd.wValue != 0) { - UDP_GLOBAL_STATE = UDP_GLOBAL_STATE_ADDRESSED; + AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN; } else { - UDP_GLOBAL_STATE = 0; + AT91C_BASE_UDP->UDP_GLBSTATE = 0; } break; @@ -334,15 +334,15 @@ static void HandleRxdSetupData(void) case USB_REQUEST_SET_CONFIGURATION: CurrentConfiguration = usd.wValue; if(CurrentConfiguration) { - UDP_GLOBAL_STATE = UDP_GLOBAL_STATE_CONFIGURED; - UDP_ENDPOINT_CSR(1) = UDP_CSR_ENABLE_EP | - UDP_CSR_EPTYPE_INTERRUPT_OUT; - UDP_ENDPOINT_CSR(2) = UDP_CSR_ENABLE_EP | - UDP_CSR_EPTYPE_INTERRUPT_IN; + AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_CONFG; + AT91C_BASE_UDP->UDP_CSR[1] = AT91C_UDP_EPEDS | + AT91C_UDP_EPTYPE_INT_OUT; + AT91C_BASE_UDP->UDP_CSR[2] = AT91C_UDP_EPEDS | + AT91C_UDP_EPTYPE_INT_IN; } else { - UDP_GLOBAL_STATE = UDP_GLOBAL_STATE_ADDRESSED; - UDP_ENDPOINT_CSR(1) = 0; - UDP_ENDPOINT_CSR(2) = 0; + AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN; + AT91C_BASE_UDP->UDP_CSR[1] = 0; + AT91C_BASE_UDP->UDP_CSR[2] = 0; } UsbSendZeroLength(); break; @@ -376,15 +376,15 @@ void UsbSendPacket(BYTE *packet, int len) thisTime = min(len, 8); for(i = 0; i < thisTime; i++) { - UDP_ENDPOINT_FIFO(2) = packet[i]; + AT91C_BASE_UDP->UDP_FDR[2] = packet[i]; } - UDP_ENDPOINT_CSR(2) |= UDP_CSR_TX_PACKET; + AT91C_BASE_UDP->UDP_CSR[2] |= AT91C_UDP_TXPKTRDY; - while(!(UDP_ENDPOINT_CSR(2) & UDP_CSR_TX_PACKET_ACKED)) + while(!(AT91C_BASE_UDP->UDP_CSR[2] & AT91C_UDP_TXCOMP)) ; - UDP_ENDPOINT_CSR(2) &= ~UDP_CSR_TX_PACKET_ACKED; + AT91C_BASE_UDP->UDP_CSR[2] &= ~AT91C_UDP_TXCOMP; - while(UDP_ENDPOINT_CSR(2) & UDP_CSR_TX_PACKET_ACKED) + while(AT91C_BASE_UDP->UDP_CSR[2] & AT91C_UDP_TXCOMP) ; len -= thisTime; @@ -396,16 +396,16 @@ static void HandleRxdData(void) { int i, len; - if(UDP_ENDPOINT_CSR(1) & UDP_CSR_RX_PACKET_RECEIVED_BANK_0) { - len = UDP_CSR_BYTES_RECEIVED(UDP_ENDPOINT_CSR(1)); + if(AT91C_BASE_UDP->UDP_CSR[1] & AT91C_UDP_RX_DATA_BK0) { + len = UDP_CSR_BYTES_RECEIVED(AT91C_BASE_UDP->UDP_CSR[1]); for(i = 0; i < len; i++) { - UsbBuffer[UsbSoFarCount] = UDP_ENDPOINT_FIFO(1); + UsbBuffer[UsbSoFarCount] = AT91C_BASE_UDP->UDP_FDR[1]; UsbSoFarCount++; } - UDP_ENDPOINT_CSR(1) &= ~UDP_CSR_RX_PACKET_RECEIVED_BANK_0; - while(UDP_ENDPOINT_CSR(1) & UDP_CSR_RX_PACKET_RECEIVED_BANK_0) + AT91C_BASE_UDP->UDP_CSR[1] &= ~AT91C_UDP_RX_DATA_BK0; + while(AT91C_BASE_UDP->UDP_CSR[1] & AT91C_UDP_RX_DATA_BK0) ; if(UsbSoFarCount >= 64) { @@ -414,16 +414,16 @@ static void HandleRxdData(void) } } - if(UDP_ENDPOINT_CSR(1) & UDP_CSR_RX_PACKET_RECEIVED_BANK_1) { - len = UDP_CSR_BYTES_RECEIVED(UDP_ENDPOINT_CSR(1)); + if(AT91C_BASE_UDP->UDP_CSR[1] & AT91C_UDP_RX_DATA_BK1) { + len = UDP_CSR_BYTES_RECEIVED(AT91C_BASE_UDP->UDP_CSR[1]); for(i = 0; i < len; i++) { - UsbBuffer[UsbSoFarCount] = UDP_ENDPOINT_FIFO(1); + UsbBuffer[UsbSoFarCount] = AT91C_BASE_UDP->UDP_FDR[1]; UsbSoFarCount++; } - UDP_ENDPOINT_CSR(1) &= ~UDP_CSR_RX_PACKET_RECEIVED_BANK_1; - while(UDP_ENDPOINT_CSR(1) & UDP_CSR_RX_PACKET_RECEIVED_BANK_1) + AT91C_BASE_UDP->UDP_CSR[1] &= ~AT91C_UDP_RX_DATA_BK1; + while(AT91C_BASE_UDP->UDP_CSR[1] & AT91C_UDP_RX_DATA_BK1) ; if(UsbSoFarCount >= 64) { @@ -446,14 +446,14 @@ void UsbStart(void) USB_D_PLUS_PULLUP_ON(); - if(UDP_INTERRUPT_STATUS & UDP_INTERRUPT_END_OF_BUS_RESET) { - UDP_INTERRUPT_CLEAR = UDP_INTERRUPT_END_OF_BUS_RESET; + if(AT91C_BASE_UDP->UDP_ISR & AT91C_UDP_ENDBUSRES) { + AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_ENDBUSRES; } } BOOL UsbConnected() { - if (UDP_GLOBAL_STATE & UDP_GLOBAL_STATE_CONFIGURED) + if (AT91C_BASE_UDP->UDP_GLBSTATE & AT91C_UDP_CONFG) return TRUE; else return FALSE; @@ -463,30 +463,30 @@ BOOL UsbPoll(BOOL blinkLeds) { BOOL ret = FALSE; - if(UDP_INTERRUPT_STATUS & UDP_INTERRUPT_END_OF_BUS_RESET) { - UDP_INTERRUPT_CLEAR = UDP_INTERRUPT_END_OF_BUS_RESET; + if(AT91C_BASE_UDP->UDP_ISR & AT91C_UDP_ENDBUSRES) { + AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_ENDBUSRES; // following a reset we should be ready to receive a setup packet - UDP_RESET_ENDPOINT = 0xf; - UDP_RESET_ENDPOINT = 0; + AT91C_BASE_UDP->UDP_RSTEP = 0xf; + AT91C_BASE_UDP->UDP_RSTEP = 0; - UDP_FUNCTION_ADDR = UDP_FUNCTION_ADDR_ENABLED; + AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN; - UDP_ENDPOINT_CSR(0) = UDP_CSR_EPTYPE_CONTROL | UDP_CSR_ENABLE_EP; + AT91C_BASE_UDP->UDP_CSR[0] = AT91C_UDP_EPTYPE_CTRL | AT91C_UDP_EPEDS; CurrentConfiguration = 0; ret = TRUE; } - if(UDP_INTERRUPT_STATUS & UDP_INTERRUPT_ENDPOINT(0)) { - if(UDP_ENDPOINT_CSR(0) & UDP_CSR_RX_HAVE_READ_SETUP_DATA) { + if(AT91C_BASE_UDP->UDP_ISR & UDP_INTERRUPT_ENDPOINT(0)) { + if(AT91C_BASE_UDP->UDP_CSR[0] & AT91C_UDP_RXSETUP) { HandleRxdSetupData(); ret = TRUE; } } - if(UDP_INTERRUPT_STATUS & UDP_INTERRUPT_ENDPOINT(1)) { + if(AT91C_BASE_UDP->UDP_ISR & UDP_INTERRUPT_ENDPOINT(1)) { HandleRxdData(); ret = TRUE; } diff --git a/include/at91sam7s128.h b/include/at91sam7s128.h deleted file mode 100644 index 708201c8..00000000 --- a/include/at91sam7s128.h +++ /dev/null @@ -1,220 +0,0 @@ -#include - -#ifndef __AT91SAM7S128_H -#define __AT91SAM7S128_H - -/*************************************************************** - * Start of translation between PM3 defines and AT91 defines - * TODO these should be replaced throughout the code at some stage - ***************************************************************/ -#define PERIPH_PIOA AT91C_ID_PIOA -#define PERIPH_ADC AT91C_ID_ADC -#define PERIPH_SPI AT91C_ID_SPI -#define PERIPH_SSC AT91C_ID_SSC -#define PERIPH_PWMC AT91C_ID_PWMC -#define PERIPH_UDP AT91C_ID_UDP -#define PERIPH_TC1 AT91C_ID_TC1 - -#define SSC_BASE AT91C_BASE_SSC - -#define WDT_CONTROL AT91C_BASE_WDTC->WDTC_WDCR - -#define PWM_ENABLE AT91C_BASE_PWMC->PWMC_ENA - -// TODO WARNING these PWM defines MUST be replaced in the code ASAP before -// someone starts using a value of x other than that selected below -#define PWM_CH_PERIOD(x) AT91C_BASE_PWMC_CH0->PWMC_CPRDR -#define PWM_CH_COUNTER(x) AT91C_BASE_PWMC_CH0->PWMC_CCNTR -#define PWM_CH_MODE(x) AT91C_BASE_PWMC_CH0->PWMC_CMR -#define PWM_CH_DUTY_CYCLE(x) AT91C_BASE_PWMC_CH0->PWMC_CDTYR - -#define PDC_RX_POINTER(x) AT91C_BASE_PDC_SSC->PDC_RPR -#define PDC_RX_COUNTER(x) AT91C_BASE_PDC_SSC->PDC_RCR -#define PDC_RX_NEXT_POINTER(x) AT91C_BASE_PDC_SSC->PDC_RNPR -#define PDC_RX_NEXT_COUNTER(x) AT91C_BASE_PDC_SSC->PDC_RNCR -#define PDC_CONTROL(x) AT91C_BASE_PDC_SSC->PDC_PTCR -// End WARNING - -#define DBGU_CIDR AT91C_BASE_DBGU->DBGU_CIDR - -#define RSTC_CONTROL AT91C_BASE_RSTC->RSTC_RCR -#define RSTC_STATUS AT91C_BASE_RSTC->RSTC_RSR - -#define MC_FLASH_COMMAND AT91C_BASE_EFC0->EFC_FCR -#define MC_FLASH_MODE0 AT91C_BASE_EFC0->EFC_FMR -#define MC_FLASH_MODE1 AT91C_BASE_EFC1->EFC_FMR -#define MC_FLASH_STATUS AT91C_BASE_EFC0->EFC_FSR - -#define ADC_CONTROL AT91C_BASE_ADC->ADC_CR -#define ADC_MODE AT91C_BASE_ADC->ADC_MR -#define ADC_CHANNEL_ENABLE AT91C_BASE_ADC->ADC_CHER -#define ADC_STATUS AT91C_BASE_ADC->ADC_SR -#define ADC_CHANNEL_DATA(x) AT91C_BASE_ADC->ADC_CDR[x] - -#define PIO_ENABLE AT91C_BASE_PIOA->PIO_PER -#define PIO_DISABLE AT91C_BASE_PIOA->PIO_PDR -#define PIO_OUTPUT_ENABLE AT91C_BASE_PIOA->PIO_OER -#define PIO_OUTPUT_DISABLE AT91C_BASE_PIOA->PIO_ODR -#define PIO_OUTPUT_DATA_SET AT91C_BASE_PIOA->PIO_SODR -#define PIO_OUTPUT_DATA_CLEAR AT91C_BASE_PIOA->PIO_CODR -#define PIO_PIN_DATA_STATUS AT91C_BASE_PIOA->PIO_PDSR -#define PIO_NO_PULL_UP_ENABLE AT91C_BASE_PIOA->PIO_PPUDR -#define PIO_NO_PULL_UP_DISABLE AT91C_BASE_PIOA->PIO_PPUER -#define PIO_PERIPHERAL_B_SEL AT91C_BASE_PIOA->PIO_BSR -#define PIO_PERIPHERAL_A_SEL AT91C_BASE_PIOA->PIO_ASR - -#define PMC_SYS_CLK_ENABLE AT91C_BASE_PMC->PMC_SCER -#define PMC_PERIPHERAL_CLK_ENABLE AT91C_BASE_PMC->PMC_PCER -#define PMC_MAIN_OSCILLATOR AT91C_BASE_PMC->PMC_MOR -#define PMC_PLL AT91C_BASE_PMC->PMC_PLLR -#define PMC_MASTER_CLK AT91C_BASE_PMC->PMC_MCKR -#define PMC_PROGRAMMABLE_CLK_0 AT91C_BASE_PMC->PMC_PCKR[0] -#define PMC_INTERRUPT_STATUS AT91C_BASE_PMC->PMC_SR - -#define SSC_CONTROL AT91C_BASE_SSC->SSC_CR -#define SSC_CLOCK_DIVISOR AT91C_BASE_SSC->SSC_CMR -#define SSC_RECEIVE_CLOCK_MODE AT91C_BASE_SSC->SSC_RCMR -#define SSC_RECEIVE_FRAME_MODE AT91C_BASE_SSC->SSC_RFMR -#define SSC_TRANSMIT_CLOCK_MODE AT91C_BASE_SSC->SSC_TCMR -#define SSC_TRANSMIT_FRAME_MODE AT91C_BASE_SSC->SSC_TFMR -#define SSC_RECEIVE_HOLDING AT91C_BASE_SSC->SSC_RHR -#define SSC_TRANSMIT_HOLDING AT91C_BASE_SSC->SSC_THR -#define SSC_STATUS AT91C_BASE_SSC->SSC_SR - -#define SPI_CONTROL AT91C_BASE_SPI->SPI_CR -#define SPI_MODE AT91C_BASE_SPI->SPI_MR -#define SPI_TX_DATA AT91C_BASE_SPI->SPI_TDR -#define SPI_STATUS AT91C_BASE_SPI->SPI_SR -#define SPI_FOR_CHIPSEL_0 AT91C_BASE_SPI->SPI_CSR[0] -#define SPI_FOR_CHIPSEL_1 AT91C_BASE_SPI->SPI_CSR[1] -#define SPI_FOR_CHIPSEL_2 AT91C_BASE_SPI->SPI_CSR[2] -#define SPI_FOR_CHIPSEL_3 AT91C_BASE_SPI->SPI_CSR[3] - -#define TC1_CCR AT91C_BASE_TC1->TC_CCR -#define TC1_CMR AT91C_BASE_TC1->TC_CMR -#define TC1_CV AT91C_BASE_TC1->TC_CV -#define TC1_RA AT91C_BASE_TC1->TC_RA -#define TC1_SR AT91C_BASE_TC1->TC_SR - -#define PDC_RX_ENABLE AT91C_PDC_RXTEN -#define PDC_RX_DISABLE AT91C_PDC_RXTDIS - -#define TC_CMR_ETRGEDG_RISING AT91C_TC_ETRGEDG_RISING -#define TC_CMR_ABETRG AT91C_TC_ABETRG -#define TC_CMR_LDRA_RISING AT91C_TC_LDRA_RISING -#define TC_CMR_LDRB_RISING AT91C_TC_LDRB_RISING -#define TC_CCR_CLKEN AT91C_TC_CLKEN -#define TC_CCR_SWTRG AT91C_TC_SWTRG -#define TC_SR_LDRAS AT91C_TC_LDRAS -#define TC_CMR_ETRGEDG AT91C_TC_ETRGEDG -#define TC_CCR_CLKDIS AT91C_TC_CLKDIS - -#define ADC_CONTROL_RESET AT91C_ADC_SWRST -#define ADC_CONTROL_START AT91C_ADC_START - -#define SPI_CONTROL_ENABLE AT91C_SPI_SPIEN -#define SPI_CONTROL_LAST_TRANSFER AT91C_SPI_LASTXFER -#define SPI_CONTROL_RESET AT91C_SPI_SWRST -#define SPI_CONTROL_DISABLE AT91C_SPI_SPIDIS -#define SPI_STATUS_TX_EMPTY AT91C_SPI_TXEMPTY - -#define SSC_CONTROL_RX_ENABLE AT91C_SSC_RXEN -#define SSC_CONTROL_TX_ENABLE AT91C_SSC_TXEN -#define SSC_FRAME_MODE_MSB_FIRST AT91C_SSC_MSBF -#define SSC_CONTROL_RESET AT91C_SSC_SWRST -#define SSC_STATUS_TX_READY AT91C_SSC_TXRDY -#define SSC_STATUS_RX_READY AT91C_SSC_RXRDY - -#define FCMD_WRITE_PAGE AT91C_MC_FCMD_START_PROG -#define FLASH_PAGE_SIZE_BYTES AT91C_IFLASH_PAGE_SIZE - -#define RST_CONTROL_PROCESSOR_RESET AT91C_RSTC_PROCRST -#define RST_STATUS_TYPE_MASK AT91C_RSTC_RSTTYP -#define RST_STATUS_TYPE_WATCHDOG AT91C_RSTC_RSTTYP_WATCHDOG -#define RST_STATUS_TYPE_SOFTWARE AT91C_RSTC_RSTTYP_SOFTWARE -#define RST_STATUS_TYPE_USER AT91C_RSTC_RSTTYP_USER - -#define PMC_SYS_CLK_PROCESSOR_CLK AT91C_PMC_PCK -#define PMC_SYS_CLK_UDP_CLK AT91C_PMC_UDP -#define PMC_CLK_SELECTION_PLL_CLOCK AT91C_PMC_CSS_PLL_CLK -#define PMC_CLK_PRESCALE_DIV_4 AT91C_PMC_PRES_CLK_4 -#define PMC_SYS_CLK_PROGRAMMABLE_CLK_0 AT91C_PMC_PCK0 - -#define UDP_INTERRUPT_STATUS AT91C_BASE_UDP->UDP_ISR -#define UDP_INTERRUPT_CLEAR AT91C_BASE_UDP->UDP_ICR -#define UDP_FUNCTION_ADDR AT91C_BASE_UDP->UDP_FADDR -#define UDP_RESET_ENDPOINT AT91C_BASE_UDP->UDP_RSTEP -#define UDP_GLOBAL_STATE AT91C_BASE_UDP->UDP_GLBSTATE -#define UDP_ENDPOINT_CSR(x) AT91C_BASE_UDP->UDP_CSR[x] -#define UDP_ENDPOINT_FIFO(x) AT91C_BASE_UDP->UDP_FDR[x] - -#define UDP_CSR_CONTROL_DATA_DIR AT91C_UDP_DIR -#define UDP_CSR_ENABLE_EP AT91C_UDP_EPEDS -#define UDP_CSR_EPTYPE_CONTROL AT91C_UDP_EPTYPE_CTRL -#define UDP_CSR_EPTYPE_INTERRUPT_IN AT91C_UDP_EPTYPE_INT_IN -#define UDP_CSR_EPTYPE_INTERRUPT_OUT AT91C_UDP_EPTYPE_INT_OUT -#define UDP_CSR_FORCE_STALL AT91C_UDP_FORCESTALL -#define UDP_CSR_RX_HAVE_READ_SETUP_DATA AT91C_UDP_RXSETUP -#define UDP_CSR_RX_PACKET_RECEIVED_BANK_0 AT91C_UDP_RX_DATA_BK0 -#define UDP_CSR_RX_PACKET_RECEIVED_BANK_1 AT91C_UDP_RX_DATA_BK1 -#define UDP_CSR_STALL_SENT AT91C_UDP_STALLSENT -#define UDP_CSR_TX_PACKET AT91C_UDP_TXPKTRDY -#define UDP_CSR_TX_PACKET_ACKED AT91C_UDP_TXCOMP - -#define UDP_FUNCTION_ADDR_ENABLED AT91C_UDP_FEN -#define UDP_GLOBAL_STATE_ADDRESSED AT91C_UDP_FADDEN -#define UDP_GLOBAL_STATE_CONFIGURED AT91C_UDP_CONFG -#define UDP_INTERRUPT_END_OF_BUS_RESET AT91C_UDP_ENDBUSRES -/*************************************************************** - * end of translation between PM3 defines and AT91 defines - ***************************************************************/ - -/*************************************************************** - * the defines below this line have no AT91 equivalents and can - * be ideally moved to proxmark3.h - ***************************************************************/ -#define WDT_HIT() WDT_CONTROL = 0xa5000001 - -#define PWM_CH_MODE_PRESCALER(x) ((x)<<0) -#define PWM_CHANNEL(x) (1<<(x)) - -#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0<<0) - -#define ADC_CHAN_LF 4 -#define ADC_CHAN_HF 5 -#define ADC_MODE_PRESCALE(x) ((x)<<8) -#define ADC_MODE_STARTUP_TIME(x) ((x)<<16) -#define ADC_MODE_SAMPLE_HOLD_TIME(x) ((x)<<24) -#define ADC_CHANNEL(x) (1<<(x)) -#define ADC_END_OF_CONVERSION(x) (1<<(x)) - -#define SSC_CLOCK_MODE_START(x) ((x)<<8) -#define SSC_FRAME_MODE_WORDS_PER_TRANSFER(x) ((x)<<8) -#define SSC_CLOCK_MODE_SELECT(x) ((x)<<0) -#define SSC_FRAME_MODE_BITS_IN_WORD(x) (((x)-1)<<0) - -#define MC_FLASH_COMMAND_KEY ((0x5A)<<24) -#define MC_FLASH_STATUS_READY (1<<0) -#define MC_FLASH_MODE_FLASH_WAIT_STATES(x) ((x)<<8) -#define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x) ((x)<<16) -#define MC_FLASH_COMMAND_PAGEN(x) ((x)<<8) - -#define RST_CONTROL_KEY (0xA5<<24) - -#define PMC_MAIN_OSCILLATOR_ENABLE (1<<0) -#define PMC_MAIN_OSCILLATOR_STABILIZED (1<<0) -#define PMC_MAIN_OSCILLATOR_PLL_LOCK (1<<2) -#define PMC_MAIN_OSCILLATOR_MCK_READY (1<<3) - -#define PMC_PLL_DIVISOR(x) (x) -#define PMC_MAIN_OSCILLATOR_STARTUP_DELAY(x) ((x)<<8) -#define PMC_CLK_PRESCALE_DIV_2 (1<<2) -#define PMC_PLL_MULTIPLIER(x) (((x)-1)<<16) -#define PMC_PLL_COUNT_BEFORE_LOCK(x) ((x)<<8) -#define PMC_PLL_FREQUENCY_RANGE(x) ((x)<<14) -#define PMC_PLL_USB_DIVISOR(x) ((x)<<28) - -#define UDP_INTERRUPT_ENDPOINT(x) (1<<(x)) -#define UDP_CSR_BYTES_RECEIVED(x) (((x) >> 16) & 0x7ff) - -#endif diff --git a/include/config_gpio.h b/include/config_gpio.h index 1a189a9e..347e38ea 100644 --- a/include/config_gpio.h +++ b/include/config_gpio.h @@ -1,40 +1,37 @@ #ifndef __CONFIG_GPIO_H #define __CONFIG_GPIO_H -#define GPIO_LED_A 0 -#define GPIO_PA1 1 -#define GPIO_LED_D 2 -#define GPIO_NVDD_ON 3 -#define GPIO_FPGA_NINIT 4 -#define GPIO_PA5 5 -#define GPIO_PCK0 6 -#define GPIO_LRST 7 -#define GPIO_LED_B 8 -#define GPIO_LED_C 9 -#define GPIO_NCS2 10 -#define GPIO_NCS0 11 -#define GPIO_MISO 12 -#define GPIO_MOSI 13 -#define GPIO_SPCK 14 -#define GPIO_SSC_FRAME 15 -#define GPIO_SSC_CLK 16 -#define GPIO_SSC_DOUT 17 -#define GPIO_SSC_DIN 18 -#define GPIO_MUXSEL_HIPKD 19 -#define GPIO_MUXSEL_LOPKD 20 -#define GPIO_MUXSEL_HIRAW 21 -#define GPIO_MUXSEL_LORAW 22 -#define GPIO_BUTTON 23 -#define GPIO_USB_PU 24 -#define GPIO_RELAY 25 -#define GPIO_FPGA_ON 26 -#define GPIO_FPGA_DONE 27 -#define GPIO_FPGA_NPROGRAM 28 -#define GPIO_FPGA_CCLK 29 -#define GPIO_FPGA_DIN 30 -#define GPIO_FPGA_DOUT 31 - -#define ANIN_AMPL_LO 4 -#define ANIN_AMPL_HI 5 +#define GPIO_LED_A AT91C_PIO_PA0 +#define GPIO_PA1 AT91C_PIO_PA1 +#define GPIO_LED_D AT91C_PIO_PA2 +#define GPIO_NVDD_ON AT91C_PIO_PA3 +#define GPIO_FPGA_NINIT AT91C_PIO_PA4 +#define GPIO_PA5 AT91C_PIO_PA5 +#define GPIO_PCK0 AT91C_PA6_PCK0 +#define GPIO_LRST AT91C_PIO_PA7 +#define GPIO_LED_B AT91C_PIO_PA8 +#define GPIO_LED_C AT91C_PIO_PA9 +#define GPIO_NCS2 AT91C_PA10_NPCS2 +#define GPIO_NCS0 AT91C_PA11_NPCS0 +#define GPIO_MISO AT91C_PA12_MISO +#define GPIO_MOSI AT91C_PA13_MOSI +#define GPIO_SPCK AT91C_PA14_SPCK +#define GPIO_SSC_FRAME AT91C_PA15_TF +#define GPIO_SSC_CLK AT91C_PA16_TK +#define GPIO_SSC_DOUT AT91C_PA17_TD +#define GPIO_SSC_DIN AT91C_PA18_RD +#define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19 +#define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20 +#define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21 +#define GPIO_MUXSEL_LORAW AT91C_PIO_PA22 +#define GPIO_BUTTON AT91C_PIO_PA23 +#define GPIO_USB_PU AT91C_PIO_PA24 +#define GPIO_RELAY AT91C_PIO_PA25 +#define GPIO_FPGA_ON AT91C_PIO_PA26 +#define GPIO_FPGA_DONE AT91C_PIO_PA27 +#define GPIO_FPGA_NPROGRAM AT91C_PIO_PA28 +#define GPIO_FPGA_CCLK AT91C_PIO_PA29 +#define GPIO_FPGA_DIN AT91C_PIO_PA30 +#define GPIO_FPGA_DOUT AT91C_PIO_PA31 #endif diff --git a/include/proxmark3.h b/include/proxmark3.h index 31c71642..f1894f99 100644 --- a/include/proxmark3.h +++ b/include/proxmark3.h @@ -7,11 +7,56 @@ #define __PROXMARK3_H // Might as well have the hardware-specific defines everywhere. -#include - +#include #include -#define LOW(x) PIO_OUTPUT_DATA_CLEAR = (1 << (x)) -#define HIGH(x) PIO_OUTPUT_DATA_SET = (1 << (x)) + +#define WDT_HIT() AT91C_BASE_WDTC->WDTC_WDCR = 0xa5000001 + +#define PWM_CH_MODE_PRESCALER(x) ((x)<<0) +#define PWM_CHANNEL(x) (1<<(x)) + +#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0<<0) + +#define ADC_CHAN_LF 4 +#define ADC_CHAN_HF 5 +#define ADC_MODE_PRESCALE(x) ((x)<<8) +#define ADC_MODE_STARTUP_TIME(x) ((x)<<16) +#define ADC_MODE_SAMPLE_HOLD_TIME(x) ((x)<<24) +#define ADC_CHANNEL(x) (1<<(x)) +#define ADC_END_OF_CONVERSION(x) (1<<(x)) + +#define SSC_CLOCK_MODE_START(x) ((x)<<8) +#define SSC_FRAME_MODE_WORDS_PER_TRANSFER(x) ((x)<<8) +#define SSC_CLOCK_MODE_SELECT(x) ((x)<<0) +#define SSC_FRAME_MODE_BITS_IN_WORD(x) (((x)-1)<<0) + +#define MC_FLASH_COMMAND_KEY ((0x5a)<<24) +#define MC_FLASH_STATUS_READY (1<<0) +#define MC_FLASH_MODE_FLASH_WAIT_STATES(x) ((x)<<8) +#define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x) ((x)<<16) +#define MC_FLASH_COMMAND_PAGEN(x) ((x)<<8) + +#define RST_CONTROL_KEY (0xa5<<24) + +#define PMC_MAIN_OSC_ENABLE (1<<0) +#define PMC_MAIN_OSC_STABILIZED (1<<0) +#define PMC_MAIN_OSC_PLL_LOCK (1<<2) +#define PMC_MAIN_OSC_MCK_READY (1<<3) + +#define PMC_MAIN_OSC_STARTUP_DELAY(x) ((x)<<8) +#define PMC_PLL_DIVISOR(x) (x) +#define PMC_CLK_PRESCALE_DIV_2 (1<<2) +#define PMC_PLL_MULTIPLIER(x) (((x)-1)<<16) +#define PMC_PLL_COUNT_BEFORE_LOCK(x) ((x)<<8) +#define PMC_PLL_FREQUENCY_RANGE(x) ((x)<<14) +#define PMC_PLL_USB_DIVISOR(x) ((x)<<28) + +#define UDP_INTERRUPT_ENDPOINT(x) (1<<(x)) +#define UDP_CSR_BYTES_RECEIVED(x) (((x) >> 16) & 0x7ff) +//************************************************************** + +#define LOW(x) AT91C_BASE_PIOA->PIO_CODR = (x) +#define HIGH(x) AT91C_BASE_PIOA->PIO_SODR = (x) #define SPI_FPGA_MODE 0 #define SPI_LCD_MODE 1 @@ -32,22 +77,22 @@ typedef signed short SWORD; #define PACKED __attribute__((__packed__)) #define USB_D_PLUS_PULLUP_ON() { \ - PIO_OUTPUT_DATA_SET = (1<PIO_OER = GPIO_USB_PU; \ } -#define USB_D_PLUS_PULLUP_OFF() PIO_OUTPUT_DISABLE = (1<PIO_ODR = GPIO_USB_PU + +#define LED_A_ON() HIGH(GPIO_LED_A) +#define LED_A_OFF() LOW(GPIO_LED_A) +#define LED_B_ON() HIGH(GPIO_LED_B) +#define LED_B_OFF() LOW(GPIO_LED_B) +#define LED_C_ON() HIGH(GPIO_LED_C) +#define LED_C_OFF() LOW(GPIO_LED_C) +#define LED_D_ON() HIGH(GPIO_LED_D) +#define LED_D_OFF() LOW(GPIO_LED_D) +#define RELAY_ON() HIGH(GPIO_RELAY) +#define RELAY_OFF() LOW(GPIO_RELAY) +#define BUTTON_PRESS() !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_BUTTON) //-------------------------------- // USB declarations @@ -62,7 +107,7 @@ void UsbPacketReceived(BYTE *packet, int len); #define VERSION_INFORMATION_MAGIC 0x56334d50 struct version_information { - int magic; /* Magic sequence to identify this as a correct version information structure. Must be VERSION_INFORMATION_MAGIC */ + int magic; /* Magic sequence to identify this as a correct version information structure. Must be VERSION_INFORMATION_MAGIC */ char versionversion; /* Must be 1 */ char present; /* 1 if the version information could be created at compile time, otherwise 0 and the remaining fields (except for magic) are empty */ char clean; /* 1: Tree was clean, no local changes. 0: Tree was unclean. 2: Couldn't be determined */ -- 2.39.5