]> cvs.zerfleddert.de Git - raggedstone/blame - ethernet/ethernet.ucf
white space; fixme
[raggedstone] / ethernet / ethernet.ucf
CommitLineData
40a1f26c 1NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ;
2NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ;
3NET "PCI_AD<11>" LOC = "F11" | IOSTANDARD = PCI33_3 ;
4NET "PCI_AD<12>" LOC = "E10" | IOSTANDARD = PCI33_3 ;
5NET "PCI_AD<13>" LOC = "A8" | IOSTANDARD = PCI33_3 ;
6NET "PCI_AD<14>" LOC = "B9" | IOSTANDARD = PCI33_3 ;
7NET "PCI_AD<15>" LOC = "B10" | IOSTANDARD = PCI33_3 ;
8NET "PCI_AD<16>" LOC = "F17" | IOSTANDARD = PCI33_3 ;
9NET "PCI_AD<17>" LOC = "F16" | IOSTANDARD = PCI33_3 ;
10NET "PCI_AD<18>" LOC = "A14" | IOSTANDARD = PCI33_3 ;
11NET "PCI_AD<19>" LOC = "B14" | IOSTANDARD = PCI33_3 ;
12NET "PCI_AD<1>" LOC = "B5" | IOSTANDARD = PCI33_3 ;
13NET "PCI_AD<20>" LOC = "B15" | IOSTANDARD = PCI33_3 ;
14NET "PCI_AD<21>" LOC = "A15" | IOSTANDARD = PCI33_3 ;
15NET "PCI_AD<22>" LOC = "F12" | IOSTANDARD = PCI33_3 ;
16NET "PCI_AD<23>" LOC = "F13" | IOSTANDARD = PCI33_3 ;
17NET "PCI_AD<24>" LOC = "D15" | IOSTANDARD = PCI33_3 ;
18NET "PCI_AD<25>" LOC = "E15" | IOSTANDARD = PCI33_3 ;
19NET "PCI_AD<26>" LOC = "D17" | IOSTANDARD = PCI33_3 ;
20NET "PCI_AD<27>" LOC = "C17" | IOSTANDARD = PCI33_3 ;
21NET "PCI_AD<28>" LOC = "B17" | IOSTANDARD = PCI33_3 ;
22NET "PCI_AD<29>" LOC = "E17" | IOSTANDARD = PCI33_3 ;
23NET "PCI_AD<2>" LOC = "E6" | IOSTANDARD = PCI33_3 ;
24NET "PCI_AD<30>" LOC = "A18" | IOSTANDARD = PCI33_3 ;
25NET "PCI_AD<31>" LOC = "B18" | IOSTANDARD = PCI33_3 ;
26NET "PCI_AD<3>" LOC = "D6" | IOSTANDARD = PCI33_3 ;
27NET "PCI_AD<4>" LOC = "C6" | IOSTANDARD = PCI33_3 ;
28NET "PCI_AD<5>" LOC = "B6" | IOSTANDARD = PCI33_3 ;
29NET "PCI_AD<6>" LOC = "D7" | IOSTANDARD = PCI33_3 ;
30NET "PCI_AD<7>" LOC = "E7" | IOSTANDARD = PCI33_3 ;
31NET "PCI_AD<8>" LOC = "B8" | IOSTANDARD = PCI33_3 ;
32NET "PCI_AD<9>" LOC = "F10" | IOSTANDARD = PCI33_3 ;
33NET "PCI_CLOCK" LOC = "A11" | IOSTANDARD = PCI33_3 ;
34NET "PCI_IDSEL" LOC = "D14" | IOSTANDARD = PCI33_3 ;
35NET "PCI_CBEn<0>" LOC = "F9" | IOSTANDARD = PCI33_3 ;
36NET "PCI_CBEn<1>" LOC = "C10" | IOSTANDARD = PCI33_3 ;
37NET "PCI_CBEn<2>" LOC = "D13" | IOSTANDARD = PCI33_3 ;
38NET "PCI_CBEn<3>" LOC = "E13" | IOSTANDARD = PCI33_3 ;
39NET "PCI_FRAMEn" LOC = "C13" | IOSTANDARD = PCI33_3 ;
40NET "PCI_IRDYn" LOC = "A13" | IOSTANDARD = PCI33_3 ;
41NET "PCI_RSTn" LOC = "A19" | IOSTANDARD = PCI33_3 ;
42NET "PCI_DEVSELn" LOC = "E12" | IOSTANDARD = PCI33_3 ;
43NET "PCI_INTAn" LOC = "B19" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
44NET "PCI_PERRn" LOC = "D12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
45NET "PCI_SERRn" LOC = "B12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
46NET "PCI_STOPn" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
47NET "PCI_TRDYn" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
48NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
49NET "PCI_REQn" LOC = "C18" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
50NET "PCI_GNTn" LOC = "D18" | IOSTANDARD = PCI33_3 ;
e00b64cc 51
add53bd9 52NET "MTX_CLK_PAD_I" LOC = "M2" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
e00b64cc 53
54NET "MTXD_PAD_O<0>" LOC = "M5" | IOSTANDARD = LVCMOS33;
55NET "MTXD_PAD_O<1>" LOC = "M6" | IOSTANDARD = LVCMOS33;
56NET "MTXD_PAD_O<2>" LOC = "T2" | IOSTANDARD = LVCMOS33;
57NET "MTXD_PAD_O<3>" LOC = "T1" | IOSTANDARD = LVCMOS33;
58
59NET "MTXEN_PAD_O" LOC = "M1" | IOSTANDARD = LVCMOS33;
60# NET "MTXERR_PAD_O" LOC = "" | IOSTANDARD = LVCMOS33;
61
add53bd9 62NET "MRX_CLK_PAD_I" LOC = "L1" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
e00b64cc 63
64NET "MRXD_PAD_I<0>" LOC = "N3" | IOSTANDARD = LVCMOS33;
65NET "MRXD_PAD_I<1>" LOC = "N4" | IOSTANDARD = LVCMOS33;
66NET "MRXD_PAD_I<2>" LOC = "V4" | IOSTANDARD = LVCMOS33;
67NET "MRXD_PAD_I<3>" LOC = "V3" | IOSTANDARD = LVCMOS33;
68
69NET "MRXDV_PAD_I" LOC = "L2" | IOSTANDARD = LVCMOS33;
70NET "MRXERR_PAD_I" LOC = "N1" | IOSTANDARD = LVCMOS33;
71
72NET "MCOLL_PAD_I" LOC = "N2" | IOSTANDARD = LVCMOS33;
73NET "MCRS_PAD_I" LOC = "U3" | IOSTANDARD = LVCMOS33;
74NET "MD_PAD_IO" LOC = "Y1" | IOSTANDARD = LVCMOS33;
75NET "MDC_PAD_O" LOC = "U2" | IOSTANDARD = LVCMOS33;
4d7b5fdd 76
7a6a1ff7 77NET "PHY_CLOCK" LOC = "L5" | IOSTANDARD = LVCMOS33;
78
4d7b5fdd 79NET "LED_2" LOC = "AB5" | IOSTANDARD = LVTTL | DRIVE = 24 ;
ac5b8271 80
943f2e34 81INST "eth_dcm/DCM_INST" CLK_FEEDBACK = 1X;
82INST "eth_dcm/DCM_INST" CLKDV_DIVIDE = 2.0;
83INST "eth_dcm/DCM_INST" CLKFX_DIVIDE = 29;
84INST "eth_dcm/DCM_INST" CLKFX_MULTIPLY = 22;
85INST "eth_dcm/DCM_INST" CLKIN_DIVIDE_BY_2 = FALSE;
86INST "eth_dcm/DCM_INST" CLKIN_PERIOD = 30.303;
87INST "eth_dcm/DCM_INST" CLKOUT_PHASE_SHIFT = NONE;
88INST "eth_dcm/DCM_INST" DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
89INST "eth_dcm/DCM_INST" DFS_FREQUENCY_MODE = LOW;
90INST "eth_dcm/DCM_INST" DLL_FREQUENCY_MODE = LOW;
91INST "eth_dcm/DCM_INST" DUTY_CYCLE_CORRECTION = TRUE;
92INST "eth_dcm/DCM_INST" FACTORY_JF = 8080;
93INST "eth_dcm/DCM_INST" PHASE_SHIFT = 0;
94INST "eth_dcm/DCM_INST" STARTUP_WAIT = FALSE;
Impressum, Datenschutz