1 NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ;
2 NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ;
3 NET "PCI_AD<11>" LOC = "F11" | IOSTANDARD = PCI33_3 ;
4 NET "PCI_AD<12>" LOC = "E10" | IOSTANDARD = PCI33_3 ;
5 NET "PCI_AD<13>" LOC = "A8" | IOSTANDARD = PCI33_3 ;
6 NET "PCI_AD<14>" LOC = "B9" | IOSTANDARD = PCI33_3 ;
7 NET "PCI_AD<15>" LOC = "B10" | IOSTANDARD = PCI33_3 ;
8 NET "PCI_AD<16>" LOC = "F17" | IOSTANDARD = PCI33_3 ;
9 NET "PCI_AD<17>" LOC = "F16" | IOSTANDARD = PCI33_3 ;
10 NET "PCI_AD<18>" LOC = "A14" | IOSTANDARD = PCI33_3 ;
11 NET "PCI_AD<19>" LOC = "B14" | IOSTANDARD = PCI33_3 ;
12 NET "PCI_AD<1>" LOC = "B5" | IOSTANDARD = PCI33_3 ;
13 NET "PCI_AD<20>" LOC = "B15" | IOSTANDARD = PCI33_3 ;
14 NET "PCI_AD<21>" LOC = "A15" | IOSTANDARD = PCI33_3 ;
15 NET "PCI_AD<22>" LOC = "F12" | IOSTANDARD = PCI33_3 ;
16 NET "PCI_AD<23>" LOC = "F13" | IOSTANDARD = PCI33_3 ;
17 NET "PCI_AD<24>" LOC = "D15" | IOSTANDARD = PCI33_3 ;
18 NET "PCI_AD<25>" LOC = "E15" | IOSTANDARD = PCI33_3 ;
19 NET "PCI_AD<26>" LOC = "D17" | IOSTANDARD = PCI33_3 ;
20 NET "PCI_AD<27>" LOC = "C17" | IOSTANDARD = PCI33_3 ;
21 NET "PCI_AD<28>" LOC = "B17" | IOSTANDARD = PCI33_3 ;
22 NET "PCI_AD<29>" LOC = "E17" | IOSTANDARD = PCI33_3 ;
23 NET "PCI_AD<2>" LOC = "E6" | IOSTANDARD = PCI33_3 ;
24 NET "PCI_AD<30>" LOC = "A18" | IOSTANDARD = PCI33_3 ;
25 NET "PCI_AD<31>" LOC = "B18" | IOSTANDARD = PCI33_3 ;
26 NET "PCI_AD<3>" LOC = "D6" | IOSTANDARD = PCI33_3 ;
27 NET "PCI_AD<4>" LOC = "C6" | IOSTANDARD = PCI33_3 ;
28 NET "PCI_AD<5>" LOC = "B6" | IOSTANDARD = PCI33_3 ;
29 NET "PCI_AD<6>" LOC = "D7" | IOSTANDARD = PCI33_3 ;
30 NET "PCI_AD<7>" LOC = "E7" | IOSTANDARD = PCI33_3 ;
31 NET "PCI_AD<8>" LOC = "B8" | IOSTANDARD = PCI33_3 ;
32 NET "PCI_AD<9>" LOC = "F10" | IOSTANDARD = PCI33_3 ;
33 NET "PCI_CLOCK" LOC = "A11" | IOSTANDARD = PCI33_3 ;
34 NET "PCI_IDSEL" LOC = "D14" | IOSTANDARD = PCI33_3 ;
35 NET "PCI_CBEn<0>" LOC = "F9" | IOSTANDARD = PCI33_3 ;
36 NET "PCI_CBEn<1>" LOC = "C10" | IOSTANDARD = PCI33_3 ;
37 NET "PCI_CBEn<2>" LOC = "D13" | IOSTANDARD = PCI33_3 ;
38 NET "PCI_CBEn<3>" LOC = "E13" | IOSTANDARD = PCI33_3 ;
39 NET "PCI_FRAMEn" LOC = "C13" | IOSTANDARD = PCI33_3 ;
40 NET "PCI_IRDYn" LOC = "A13" | IOSTANDARD = PCI33_3 ;
41 NET "PCI_RSTn" LOC = "A19" | IOSTANDARD = PCI33_3 ;
42 NET "PCI_DEVSELn" LOC = "E12" | IOSTANDARD = PCI33_3 ;
43 NET "PCI_INTAn" LOC = "B19" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
44 NET "PCI_PERRn" LOC = "D12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
45 NET "PCI_SERRn" LOC = "B12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
46 NET "PCI_STOPn" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
47 NET "PCI_TRDYn" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
48 NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
49 NET "PCI_REQn" LOC = "C18" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
50 NET "PCI_GNTn" LOC = "D18" | IOSTANDARD = PCI33_3 ;
52 NET "MTX_CLK_PAD_I" LOC = "M2" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
54 NET "MTXD_PAD_O<0>" LOC = "M5" | IOSTANDARD = LVCMOS33;
55 NET "MTXD_PAD_O<1>" LOC = "M6" | IOSTANDARD = LVCMOS33;
56 NET "MTXD_PAD_O<2>" LOC = "T2" | IOSTANDARD = LVCMOS33;
57 NET "MTXD_PAD_O<3>" LOC = "T1" | IOSTANDARD = LVCMOS33;
59 NET "MTXEN_PAD_O" LOC = "M1" | IOSTANDARD = LVCMOS33;
60 # NET "MTXERR_PAD_O" LOC = "" | IOSTANDARD = LVCMOS33;
62 NET "MRX_CLK_PAD_I" LOC = "L1" | IOSTANDARD = LVCMOS33 | CLOCK_DEDICATED_ROUTE = FALSE;
64 NET "MRXD_PAD_I<0>" LOC = "N3" | IOSTANDARD = LVCMOS33;
65 NET "MRXD_PAD_I<1>" LOC = "N4" | IOSTANDARD = LVCMOS33;
66 NET "MRXD_PAD_I<2>" LOC = "V4" | IOSTANDARD = LVCMOS33;
67 NET "MRXD_PAD_I<3>" LOC = "V3" | IOSTANDARD = LVCMOS33;
69 NET "MRXDV_PAD_I" LOC = "L2" | IOSTANDARD = LVCMOS33;
70 NET "MRXERR_PAD_I" LOC = "N1" | IOSTANDARD = LVCMOS33;
72 NET "MCOLL_PAD_I" LOC = "N2" | IOSTANDARD = LVCMOS33;
73 NET "MCRS_PAD_I" LOC = "U3" | IOSTANDARD = LVCMOS33;
74 NET "MD_PAD_IO" LOC = "Y1" | IOSTANDARD = LVCMOS33;
75 NET "MDC_PAD_O" LOC = "U2" | IOSTANDARD = LVCMOS33;
77 NET "PHY_CLOCK" LOC = "L5" | IOSTANDARD = LVCMOS33;
79 NET "LED_2" LOC = "AB5" | IOSTANDARD = LVTTL | DRIVE = 24 ;
81 INST "eth_dcm/DCM_INST" CLK_FEEDBACK = 1X;
82 INST "eth_dcm/DCM_INST" CLKDV_DIVIDE = 2.0;
83 INST "eth_dcm/DCM_INST" CLKFX_DIVIDE = 29;
84 INST "eth_dcm/DCM_INST" CLKFX_MULTIPLY = 22;
85 INST "eth_dcm/DCM_INST" CLKIN_DIVIDE_BY_2 = FALSE;
86 INST "eth_dcm/DCM_INST" CLKIN_PERIOD = 30.303;
87 INST "eth_dcm/DCM_INST" CLKOUT_PHASE_SHIFT = NONE;
88 INST "eth_dcm/DCM_INST" DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
89 INST "eth_dcm/DCM_INST" DFS_FREQUENCY_MODE = LOW;
90 INST "eth_dcm/DCM_INST" DLL_FREQUENCY_MODE = LOW;
91 INST "eth_dcm/DCM_INST" DUTY_CYCLE_CORRECTION = TRUE;
92 INST "eth_dcm/DCM_INST" FACTORY_JF = 8080;
93 INST "eth_dcm/DCM_INST" PHASE_SHIFT = 0;
94 INST "eth_dcm/DCM_INST" STARTUP_WAIT = FALSE;
projects / raggedstone / blob