PWD := $(shell pwd)

PROJECT := raggedstone

INTSTYLE := silent

SOURCES = $(wildcard sources/*.v source/*.vhd)

all: $(PROJECT).bit final

log:
	time make all &>build.log

xst: $(PROJECT).ngc

ngdbuild: $(PROJECT).ngd

$(PROJECT).ngc: $(SOURCES)
	@# echo synclib > $(PROJECT).lso # hmm. things are different in ise 9.1
	echo work > $(PROJECT).lso
	xst -intstyle $(INTSTYLE) -ifn $(PROJECT).xst -ofn $(PROJECT).syr
	@#cat $(PROJECT).syr

$(PROJECT).ngd: $(PROJECT).ngc
	ngdbuild -intstyle $(INTSTYLE) -dd "$(PWD)/_ngo" -nt timestamp -uc $(PROJECT).ucf  -p xc3s1500-fg456-4 $(PROJECT).ngc $(PROJECT).ngd

$(PROJECT)_map.ngm $(PROJECT).pcf: $(PROJECT).ngd
	map -intstyle $(INTSTYLE) -p xc3s1500-fg456-4 -cm area -pr b -k 4 -c 100 -o $(PROJECT)_map.ncd $(PROJECT).ngd $(PROJECT).pcf

$(PROJECT).ncd: $(PROJECT)_map.ngm $(PROJECT).pcf
	@#par -w -intstyle $(INTSTYLE) -ol std -n 4 -t 1 $(PROJECT)_map.ncd $(PROJECT).dir $(PROJECT).pcf
	par -w -intstyle $(INTSTYLE) -ol std -t 1 $(PROJECT)_map.ncd $(PROJECT).ncd $(PROJECT).pcf

$(PROJECT).twx: $(PROJECT).ncd
	trce -intstyle $(INTSTYLE) -e 3 -l 3 -s 4 -xml $(PROJECT) $(PROJECT).ncd -o $(PROJECT).twr $(PROJECT).pcf
	@#cat $(PROJECT).twr

$(PROJECT).bit: $(PROJECT).ncd
	bitgen -intstyle $(INTSTYLE) -f $(PROJECT).ut $(PROJECT).ncd
	@# cp $(PROJECT).bit ../jcarr_last.bit
	@#cat $(PROJECT).drc
	@#cat $(PROJECT).bgn

mcs:
	promgen -intstyle $(INTSTYLE) -w -p mcs -u 0 $(PROJECT) -o pci1 pci2 -x xcf02s xcf04s

final:
	-@grep -A 8 -B 1 ^Selected\ Device $(PROJECT).syr
	-@grep -A 8 -B 1 ^Timing\ Summary $(PROJECT).syr
	-@grep -A 21 -B 1 ^Design\ Summary $(PROJECT)_map.map

burn:
	xc3sprog $(PROJECT).bit

load:
	impact -batch xc3s1500.batch

flash: mcs
	impact -batch xcf.batch

clean:
	@rm -rf *.bit *.bgn *.mcs *.prm *.bld *.drc *.mcs *.ncd *.ngc *.ngd \
		*.ngr *.pad *.par *.pcf *.prm *.syr *.twr *.twx *.xpi *.lso *.prm *.mcs _impact* \
		$(PROJECT)_map.* $(PROJECT)_pad.* \
		_ngo xst  \
		build.log \
		$(PROJECT).unroutes *.xml