]> cvs.zerfleddert.de Git - raggedstone/blobdiff - dhwk/source/par_ser_con.vhd
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[raggedstone] / dhwk / source / par_ser_con.vhd
index 2f183d9c07f66355cc3012abd54b03179e63e94c..92a01c0b023ac93f6f094d208002ba551a2cf9ce 100644 (file)
@@ -1,4 +1,4 @@
--- $Id: par_ser_con.vhd,v 1.3 2007-03-11 12:24:35 sithglan Exp $
+-- $Id: par_ser_con.vhd,v 1.4 2007-03-11 13:23:11 sithglan Exp $
 
 library ieee;
 use ieee.std_logic_1164.all;
 
 library ieee;
 use ieee.std_logic_1164.all;
@@ -43,7 +43,7 @@ begin
 
         process(PCI_CLOCK)
         begin
 
         process(PCI_CLOCK)
         begin
-                if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+                if (rising_edge(PCI_CLOCK)) then
                         if ("0000" < COUNT) then
                                 COUNT <= COUNT - 1;
                         end if;
                         if ("0000" < COUNT) then
                                 COUNT <= COUNT - 1;
                         end if;
@@ -115,7 +115,7 @@ begin
 
         process(PCI_CLOCK)
         begin
 
         process(PCI_CLOCK)
         begin
-                if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+                if (rising_edge(PCI_CLOCK)) then
                         SYNC <= SPC_RDY_IN;
                 end if;
         end process;
                         SYNC <= SPC_RDY_IN;
                 end if;
         end process;
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