add cable help

[raggedstone] / dhwk / source / pci / connecting_fsm.vhd

diff --git a/dhwk/source/pci/connecting_fsm.vhd b/dhwk/source/pci/connecting_fsm.vhd
index eb444eaf02654dfb666421c4117aaba6502ff18a..421132f3f6cb3647523a066f85558ef65eac93bc 100644 (file)
--- a/dhwk/source/pci/connecting_fsm.vhd
+++ b/dhwk/source/pci/connecting_fsm.vhd
@@ -66,7 +66,7 @@ begin
 
         process (PCI_CLOCK)
         begin
-                if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+                if (rising_edge(PCI_CLOCK)) then
                         if SIG_LOAD = '1' then
                                 REG <= S_FIFO_Q_OUT;
 
@@ -82,7 +82,7 @@ begin
 
 process (PCI_CLOCK)
 begin
-        if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+        if (rising_edge(PCI_CLOCK)) then
 
                 if RESET = '1' then
                         STATES <= S0;