mask them out manually

[raggedstone] / dhwk / dhwk.prj

diff --git a/dhwk/dhwk.prj b/dhwk/dhwk.prj
index 9e1460e6c77c3d2648bf59a7942ca1d1b1de79eb..113fec6997e53a7fddcccee7a6ebbf67c745d5a6 100644 (file)
--- a/dhwk/dhwk.prj
+++ b/dhwk/dhwk.prj
@@ -1,41 +1,42 @@
-vhdl work "source/verg_8.vhd"
-vhdl work "source/synplify.vhd"
-vhdl work "source/parity_out.vhd"
-vhdl work "source/config_wr_0.vhd"
-vhdl work "source/config_rd_0.vhd"
-vhdl work "source/config_mux_0.vhd"
-vhdl work "source/config_3Ch.vhd"
-vhdl work "source/config_10h.vhd"
-vhdl work "source/config_08h.vhd"
-vhdl work "source/config_04h.vhd"
-vhdl work "source/config_00h.vhd"
-vhdl work "source/Verg_4.vhd"
-vhdl work "source/Verg_2.vhd"
-vhdl work "source/REG.vhd"
-vhdl work "source/Parity_4.vhd"
-vhdl work "source/Io_reg.vhd"
-vhdl work "source/Io_mux.vhd"
-vhdl work "source/CONT_FSM.vhd"
-vhdl work "source/COMM_FSM.vhd"
-vhdl work "source/COMM_DEC.vhd"
-vhdl work "source/Addr_regi.vhd"
-vhdl work "source/vergleich.vhd"
-vhdl work "source/steuerung.vhd"
-vhdl work "source/reg_io.vhd"
-vhdl work "source/parity.vhd"
-vhdl work "source/io_mux_reg.vhd"
-vhdl work "source/config_space_header.vhd"
-vhdl work "source/IO_RW_SEL.vhd"
-vhdl work "source/DATA_MUX.vhd"
-vhdl work "source/user_io.vhd"
-vhdl work "source/pci_interface.vhd"
-vhdl work "source/fifo_io_control.vhd"
-vhdl work "source/connecting_fsm.vhd"
-vhdl work "source/SER_PAR_CON.vhd"
-vhdl work "source/PAR_SER_CON.vhd"
-vhdl work "source/FLAG_BUS.vhd"
-vhdl work "source/pci_top.vhd"
-vhdl work "source/fifo_control.vhd"
-vhdl work "source/MESS_1_TB.vhd"
-vhdl work "source/INTERRUPT.vhd"
-vhdl work "source/top.vhd"
+vhdl work "source/par_ser_con.vhd"
+vhdl work "source/ser_par_con.vhd"
+vhdl work "source/pci/address_register.vhd"
+vhdl work "source/pci/comm_dec.vhd"
+vhdl work "source/pci/comm_fsm.vhd"
+vhdl work "source/pci/config_00h.vhd"
+vhdl work "source/pci/config_04h.vhd"
+vhdl work "source/pci/config_08h.vhd"
+vhdl work "source/pci/config_10h.vhd"
+vhdl work "source/pci/config_3Ch.vhd"
+vhdl work "source/pci/config_mux_0.vhd"
+vhdl work "source/pci/config_rd_0.vhd"
+vhdl work "source/pci/config_space_header.vhd"
+vhdl work "source/pci/config_wr_0.vhd"
+vhdl work "source/pci/connecting_fsm.vhd"
+vhdl work "source/pci/cont_fsm.vhd"
+vhdl work "source/pci/data_mux.vhd"
+vhdl work "source/pci/fifo_control.vhd"
+vhdl work "source/pci/fifo_io_control.vhd"
+vhdl work "source/pci/flag_bus.vhd"
+vhdl work "source/pci/interrupt.vhd"
+vhdl work "source/pci/io_mux.vhd"
+vhdl work "source/pci/io_mux_reg.vhd"
+vhdl work "source/pci/io_reg.vhd"
+vhdl work "source/pci/io_rw_sel.vhd"
+vhdl work "source/pci/mess_tb.vhd"
+vhdl work "source/pci/parity.vhd"
+vhdl work "source/pci/parity_4.vhd"
+vhdl work "source/pci/parity_out.vhd"
+vhdl work "source/pci/pci_interface.vhd"
+vhdl work "source/pci/pci_top.vhd"
+vhdl work "source/pci/reg.vhd"
+vhdl work "source/pci/reg_io.vhd"
+vhdl work "source/pci/steuerung.vhd"
+vhdl work "source/pci/synplify.vhd"
+vhdl work "source/pci/top.vhd"
+vhdl work "source/pci/user_io.vhd"
+vhdl work "source/pci/ven_rev_id.vhd"
+vhdl work "source/pci/verg_2.vhd"
+vhdl work "source/pci/verg_4.vhd"
+vhdl work "source/pci/verg_8.vhd"
+vhdl work "source/pci/vergleich.vhd"