USE ieee.numeric_std.ALL;\r
\r
\r
-entity TOP is\r
+entity dhwk is\r
Port ( KONST_1 : In std_logic;\r
PCI_CBEn : In std_logic_vector (3 downto 0);\r
PCI_CLOCK : In std_logic;\r
TB_IDSEL : Out std_logic;\r
TB_nDEVSEL : Out std_logic;\r
TB_nINTA : Out std_logic );\r
-end TOP;\r
+end dhwk;\r
\r
-architecture SCHEMATIC of TOP is\r
+architecture SCHEMATIC of dhwk is\r
\r
SIGNAL gnd : std_logic := '0';\r
SIGNAL vcc : std_logic := '1';\r