use IEEE.std_logic_1164.all;
entity CONFIG_MUX_0 is
- port
- (
- READ_SEL :in std_logic_vector( 2 downto 0);
- CONF_DATA_00H :in std_logic_vector(31 downto 0);
- CONF_DATA_04H :in std_logic_vector(31 downto 0);
- CONF_DATA_08H :in std_logic_vector(31 downto 0);
- CONF_DATA_10H :in std_logic_vector(31 downto 0);
- CONF_DATA_3CH :in std_logic_vector(31 downto 0);
---CONF_DATA_40H :in std_logic_vector(31 downto 0);
- CONF_DATA :out std_logic_vector(31 downto 0)
- );
+ port
+ (
+ READ_SEL :in std_logic_vector( 2 downto 0);
+ CONF_DATA_00H :in std_logic_vector(31 downto 0);
+ CONF_DATA_04H :in std_logic_vector(31 downto 0);
+ CONF_DATA_08H :in std_logic_vector(31 downto 0);
+ CONF_DATA_10H :in std_logic_vector(31 downto 0);
+ CONF_DATA_3CH :in std_logic_vector(31 downto 0);
+ --CONF_DATA_40H :in std_logic_vector(31 downto 0);
+ CONF_DATA :out std_logic_vector(31 downto 0)
+ );
end entity CONFIG_MUX_0;
architecture CONFIG_MUX_0_DESIGN of CONFIG_MUX_0 is
- signal MUX :std_logic_vector (31 downto 0);
+ signal MUX :std_logic_vector (31 downto 0);
begin
---*******************************************************************
---******************* PCI Read Config-MUX **************************
---*******************************************************************
+ --*******************************************************************
+ --******************* PCI Read Config-MUX **************************
+ --*******************************************************************
- MUX <= CONF_DATA_00H when READ_SEL <= "000" else
- CONF_DATA_04H when READ_SEL <= "001" else
- CONF_DATA_08H when READ_SEL <= "010" else
- CONF_DATA_10H when READ_SEL <= "011" else
- CONF_DATA_3CH when READ_SEL <= "100" else
--- CONF_DATA_40H when READ_SEL <= "101" else
- X"00000000" ;
-
- CONF_DATA <= MUX ;
+ MUX <= CONF_DATA_00H when READ_SEL <= "000" else
+ CONF_DATA_04H when READ_SEL <= "001" else
+ CONF_DATA_08H when READ_SEL <= "010" else
+ CONF_DATA_10H when READ_SEL <= "011" else
+ CONF_DATA_3CH when READ_SEL <= "100" else
+ -- CONF_DATA_40H when READ_SEL <= "101" else
+ X"00000000";
+ CONF_DATA <= MUX;
end architecture CONFIG_MUX_0_DESIGN;