Update to EDK 9.2

[raggedstone] / ethernet / ethernet.ucf

diff --git a/ethernet/ethernet.ucf b/ethernet/ethernet.ucf
index e64c929e97a23f7647c4a57be3ee111e3638f93e..395303ebb7af8da4c26f0d4b577be46e978ca34a 100644 (file)
--- a/ethernet/ethernet.ucf
+++ b/ethernet/ethernet.ucf
@@ -78,17 +78,17 @@ NET "PHY_CLOCK"   LOC = "L5" | IOSTANDARD = LVCMOS33;
 
 NET "LED_2"  LOC = "AB5"  | IOSTANDARD = LVTTL | DRIVE = 24 ;
 
-INST DCM_INST CLK_FEEDBACK = 1X;
-INST DCM_INST CLKDV_DIVIDE = 2.0;
-INST DCM_INST CLKFX_DIVIDE = 29;
-INST DCM_INST CLKFX_MULTIPLY = 22;
-INST DCM_INST CLKIN_DIVIDE_BY_2 = FALSE;
-INST DCM_INST CLKIN_PERIOD = 30.303;
-INST DCM_INST CLKOUT_PHASE_SHIFT = NONE;
-INST DCM_INST DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
-INST DCM_INST DFS_FREQUENCY_MODE = LOW;
-INST DCM_INST DLL_FREQUENCY_MODE = LOW;
-INST DCM_INST DUTY_CYCLE_CORRECTION = TRUE;
-INST DCM_INST FACTORY_JF = 8080;
-INST DCM_INST PHASE_SHIFT = 0;
-INST DCM_INST STARTUP_WAIT = FALSE;
+INST "eth_dcm/DCM_INST" CLK_FEEDBACK = 1X;
+INST "eth_dcm/DCM_INST" CLKDV_DIVIDE = 2.0;
+INST "eth_dcm/DCM_INST" CLKFX_DIVIDE = 29;
+INST "eth_dcm/DCM_INST" CLKFX_MULTIPLY = 22;
+INST "eth_dcm/DCM_INST" CLKIN_DIVIDE_BY_2 = FALSE;
+INST "eth_dcm/DCM_INST" CLKIN_PERIOD = 30.303;
+INST "eth_dcm/DCM_INST" CLKOUT_PHASE_SHIFT = NONE;
+INST "eth_dcm/DCM_INST" DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
+INST "eth_dcm/DCM_INST" DFS_FREQUENCY_MODE = LOW;
+INST "eth_dcm/DCM_INST" DLL_FREQUENCY_MODE = LOW;
+INST "eth_dcm/DCM_INST" DUTY_CYCLE_CORRECTION = TRUE;
+INST "eth_dcm/DCM_INST" FACTORY_JF = 8080;
+INST "eth_dcm/DCM_INST" PHASE_SHIFT = 0;
+INST "eth_dcm/DCM_INST" STARTUP_WAIT = FALSE;