architecture SCHEMATIC of CONFIG_SPACE_HEADER is
- constant CONF_DEVICE_ID :std_logic_vector(31 downto 16) := X"AFFE";
- --other comm. device
- constant CONF_CLASS_CODE :std_logic_vector (31 downto 8) := X"078000";
-
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
CONF_DATA_10H : Out std_logic_vector (31 downto 0) );
end component;
+ component CONFIG_08H
+ Port ( REVISION_ID : In std_logic_vector (7 downto 0);
+ CONF_DATA_08H : Out std_logic_vector (31 downto 0) );
+ end component;
+
+ component CONFIG_00H
+ Port ( VENDOR_ID : In std_logic_vector (15 downto 0);
+ CONF_DATA_00H : Out std_logic_vector (31 downto 0) );
+ end component;
+
component CONFIG_04H
Port ( AD_REG : In std_logic_vector (31 downto 0);
CBE_REGn : In std_logic_vector (3 downto 0);
end component;
begin
- CONF_DATA_00H <= CONF_DEVICE_ID & VENDOR_ID;
- CONF_DATA_08H <= CONF_CLASS_CODE & REVISION_ID;
CONF_DATA_04H <= CONF_DATA_04H_DUMMY;
CONF_DATA_10H <= CONF_DATA_10H_DUMMY;
CONF_WR_10H=>CONF_WR_10H, PCI_CLOCK=>PCI_CLOCK,
PCI_RSTn=>PCI_RSTn,
CONF_DATA_10H(31 downto 0)=>CONF_DATA_10H_DUMMY(31 downto 0) );
+ I4 : CONFIG_08H
+ Port Map ( REVISION_ID(7 downto 0)=>REVISION_ID(7 downto 0),
+ CONF_DATA_08H(31 downto 0)=>CONF_DATA_08H(31 downto 0) );
+ I3 : CONFIG_00H
+ Port Map ( VENDOR_ID(15 downto 0)=>VENDOR_ID(15 downto 0),
+ CONF_DATA_00H(31 downto 0)=>CONF_DATA_00H(31 downto 0) );
I2 : CONFIG_04H
Port Map ( AD_REG(31 downto 0)=>AD_REG(31 downto 0),
CBE_REGn(3 downto 0)=>CBE_REGn(3 downto 0),