verilog work "source/sync.v"
verilog work "source/pcidec.v"
verilog work "source/pcidmux.v"
+verilog work "source/generic_fifo_sc_a.v"
+verilog work "source/generic_dpram.v"
+verilog work "source/wb_fifo.v"
verilog work "source/pciwbsequ.v"
verilog work "source/pcipargen.v"