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[raggedstone] / dhwk / source / pci / config_space_header.vhd

diff --git a/dhwk/source/pci/config_space_header.vhd b/dhwk/source/pci/config_space_header.vhd
index de5798384e95440898d64172cfc16f06f93e8b25..15db761375688bbf78f5f44f9071e2e50aa0d795 100644 (file)
--- a/dhwk/source/pci/config_space_header.vhd
+++ b/dhwk/source/pci/config_space_header.vhd
@@ -27,8 +27,6 @@ end CONFIG_SPACE_HEADER;
 
 architecture SCHEMATIC of CONFIG_SPACE_HEADER is
 
 
 architecture SCHEMATIC of CONFIG_SPACE_HEADER is
 

-        constant CONF_DEVICE_ID :std_logic_vector(31 downto 16) := X"AFFE";
-

         SIGNAL gnd : std_logic := '0';
         SIGNAL vcc : std_logic := '1';
 
         SIGNAL gnd : std_logic := '0';
         SIGNAL vcc : std_logic := '1';
 


@@ -91,6 +89,11 @@ architecture SCHEMATIC of CONFIG_SPACE_HEADER is
                        CONF_DATA_08H : Out std_logic_vector (31 downto 0) );
         end component;
 
                        CONF_DATA_08H : Out std_logic_vector (31 downto 0) );
         end component;
 

+        component CONFIG_00H
+                Port ( VENDOR_ID : In std_logic_vector (15 downto 0);
+                       CONF_DATA_00H : Out std_logic_vector (31 downto 0) );
+        end component;
+

         component CONFIG_04H
                 Port ( AD_REG : In std_logic_vector (31 downto 0);
                        CBE_REGn : In std_logic_vector (3 downto 0);
         component CONFIG_04H
                 Port ( AD_REG : In std_logic_vector (31 downto 0);
                        CBE_REGn : In std_logic_vector (3 downto 0);


@@ -103,7 +106,6 @@ architecture SCHEMATIC of CONFIG_SPACE_HEADER is
         end component;
 
 begin
         end component;
 
 begin

-        CONF_DATA_00H <= CONF_DEVICE_ID & VENDOR_ID;

 
         CONF_DATA_04H <= CONF_DATA_04H_DUMMY;
         CONF_DATA_10H <= CONF_DATA_10H_DUMMY;
 
         CONF_DATA_04H <= CONF_DATA_04H_DUMMY;
         CONF_DATA_10H <= CONF_DATA_10H_DUMMY;


@@ -140,6 +142,9 @@ begin
         I4 : CONFIG_08H
         Port Map ( REVISION_ID(7 downto 0)=>REVISION_ID(7 downto 0),
         CONF_DATA_08H(31 downto 0)=>CONF_DATA_08H(31 downto 0) );
         I4 : CONFIG_08H
         Port Map ( REVISION_ID(7 downto 0)=>REVISION_ID(7 downto 0),
         CONF_DATA_08H(31 downto 0)=>CONF_DATA_08H(31 downto 0) );

+        I3 : CONFIG_00H
+        Port Map ( VENDOR_ID(15 downto 0)=>VENDOR_ID(15 downto 0),
+        CONF_DATA_00H(31 downto 0)=>CONF_DATA_00H(31 downto 0) );

         I2 : CONFIG_04H
         Port Map ( AD_REG(31 downto 0)=>AD_REG(31 downto 0),
         CBE_REGn(3 downto 0)=>CBE_REGn(3 downto 0),
         I2 : CONFIG_04H
         Port Map ( AD_REG(31 downto 0)=>AD_REG(31 downto 0),
         CBE_REGn(3 downto 0)=>CBE_REGn(3 downto 0),