X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/blobdiff_plain/377c02420489dd18db3ce053a075d7eca4ae799b..1d175e4f030e4cee19ec6df3b39bfad3bf64863c:/dhwk/source/PAR_SER_CON.vhd?ds=inline

diff --git a/dhwk/source/PAR_SER_CON.vhd b/dhwk/source/PAR_SER_CON.vhd
index 38300b7..9d78b2b 100644
--- a/dhwk/source/PAR_SER_CON.vhd
+++ b/dhwk/source/PAR_SER_CON.vhd
@@ -1,4 +1,4 @@
--- $Id: PAR_SER_CON.vhd,v 1.1 2007-03-10 11:24:03 sithglan Exp $
+-- $Id: PAR_SER_CON.vhd,v 1.2 2007-03-10 16:08:48 michael Exp $
 
 library ieee;
 use ieee.std_logic_1164.all;
@@ -55,7 +55,7 @@ begin
                         S_FIFO_READn <= '1';
 
                 elsif (PSC_ENABLE = '1') then
-												if (COUNT = "0000") then
+		if (COUNT = "0000") then
                         COUNT <= "0011";
                         case STATE is
                                 when STATE_SEND =>
@@ -105,6 +105,8 @@ begin
 
                                 when others => STATE <= STATE_END;
                         end case;
+		    else
+		    	S_FIFO_READn <= '1';
                     end if; -- COUNT
                 end if; -- RESET ... / PSC_ENABLE ...
         end if; -- PCI_CLOCK ...