From: michael Date: Sat, 10 Mar 2007 12:54:21 +0000 (+0000) Subject: invert interrupt X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/commitdiff_plain/56f1d0d6d7ce34b93faf0fe935bd215897a1c58a invert interrupt --- diff --git a/dhwk/dhwk.ucf b/dhwk/dhwk.ucf index 1d1c550..9a04690 100644 --- a/dhwk/dhwk.ucf +++ b/dhwk/dhwk.ucf @@ -1,33 +1,14 @@ #NET "KONST_1" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_EFn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FFn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_Q_OUT" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_HFn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_EFn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FFn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_Q_OUT" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_HFn" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SERIAL_IN" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SPC_RDY_IN" LOC="" | IOSTANDARD = PCI33_3 ; #NET "TAST_RESn" LOC="" | IOSTANDARD = PCI33_3 ; #NET "TAST_SETn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_D_IN" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_READn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_RESETn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_RTn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "R_FIFO_WRITEn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_D_IN" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_READn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_RESETn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_RTn" LOC="" | IOSTANDARD = PCI33_3 ; -#NET "S_FIFO_WRITEn" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SERIAL_OUT" LOC="" | IOSTANDARD = PCI33_3 ; #NET "SPC_RDY_OUT" LOC="" | IOSTANDARD = PCI33_3 ; #NET "TB_IDSEL" LOC="" | IOSTANDARD = PCI33_3 ; #NET "TB_nDEVSEL" LOC="" | IOSTANDARD = PCI33_3 ; #NET "TB_nINTA" LOC="" | IOSTANDARD = PCI33_3 ; -# Kommentar NET "PCI_AD<0>" LOC = "A5" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<10>" LOC = "E9" | IOSTANDARD = PCI33_3 ; NET "PCI_AD<11>" LOC = "F11" | IOSTANDARD = PCI33_3 ; diff --git a/dhwk/source/INTERRUPT.vhd b/dhwk/source/INTERRUPT.vhd index 96ab264..00048ba 100644 --- a/dhwk/source/INTERRUPT.vhd +++ b/dhwk/source/INTERRUPT.vhd @@ -140,7 +140,7 @@ begin INTAn <= not SIG_PROPAGATE_INT_SECOND; - PCI_INTAn <= '0' when SIG_PROPAGATE_INT_SECOND = '0' else 'Z'; + PCI_INTAn <= '1' when SIG_PROPAGATE_INT_SECOND = '0' else 'Z'; INT_REG <= REG;