From 2c4b2f251e1176f85357fd1f35d46ba9347b0631 Mon Sep 17 00:00:00 2001 From: michael Date: Tue, 20 Mar 2007 23:34:59 +0000 Subject: [PATCH 1/1] clock --- ethernet/source/top.vhd | 2 ++ 1 file changed, 2 insertions(+) diff --git a/ethernet/source/top.vhd b/ethernet/source/top.vhd index d181c52..184e744 100644 --- a/ethernet/source/top.vhd +++ b/ethernet/source/top.vhd @@ -277,6 +277,8 @@ end generate; wb_adr_i <= wbm_adr_o (11 downto 2); +wb_clk_i <= PCI_CLOCK; + Inst_pci_bridge32: pci_bridge32 PORT MAP( wb_clk_i => wb_clk_i , wb_rst_i => '0', -- 2.39.5