From 30273618403fd6512926c89f999f97b4722e1709 Mon Sep 17 00:00:00 2001 From: sithglan Date: Sun, 11 Mar 2007 08:55:29 +0000 Subject: [PATCH 1/1] all files to lowercase, move everything except par/ser and ser/par into pci --- dhwk/dhwk.prj | 79 +++++++++---------- dhwk/source/MESS_1_TB.vhd | 33 -------- .../{PAR_SER_CON.vhd => par_ser_con.vhd} | 2 +- .../source/{COMM_FSM.vhd => pci/comm_fsm.vhd} | 0 dhwk/source/{ => pci}/connecting_fsm.vhd | 0 .../source/{CONT_FSM.vhd => pci/cont_fsm.vhd} | 0 .../source/{DATA_MUX.vhd => pci/data_mux.vhd} | 0 dhwk/source/{ => pci}/fifo_control.vhd | 0 dhwk/source/{ => pci}/fifo_io_control.vhd | 2 +- .../source/{FLAG_BUS.vhd => pci/flag_bus.vhd} | 0 .../{INTERRUPT.vhd => pci/interrupt.vhd} | 0 dhwk/source/{Io_mux.vhd => pci/io_mux.vhd} | 0 dhwk/source/{ => pci}/io_mux_reg.vhd | 0 dhwk/source/{Io_reg.vhd => pci/io_reg.vhd} | 0 .../{IO_RW_SEL.vhd => pci/io_rw_sel.vhd} | 0 dhwk/source/{ => pci}/parity.vhd | 0 .../source/{Parity_4.vhd => pci/parity_4.vhd} | 0 dhwk/source/{ => pci}/parity_out.vhd | 0 dhwk/source/{ => pci}/pci_interface.vhd | 0 dhwk/source/{ => pci}/pci_top.vhd | 0 dhwk/source/{REG.vhd => pci/reg.vhd} | 0 dhwk/source/{ => pci}/reg_io.vhd | 0 dhwk/source/{ => pci}/steuerung.vhd | 0 dhwk/source/{ => pci}/synplify.vhd | 0 dhwk/source/{ => pci}/top.vhd | 0 dhwk/source/{ => pci}/user_io.vhd | 0 dhwk/source/{ => pci}/ven_rev_id.vhd | 0 dhwk/source/{Verg_2.vhd => pci/verg_2.vhd} | 0 dhwk/source/{Verg_4.vhd => pci/verg_4.vhd} | 0 dhwk/source/{ => pci}/verg_8.vhd | 0 dhwk/source/{ => pci}/vergleich.vhd | 0 .../{SER_PAR_CON.vhd => ser_par_con.vhd} | 2 +- 32 files changed, 42 insertions(+), 76 deletions(-) delete mode 100644 dhwk/source/MESS_1_TB.vhd rename dhwk/source/{PAR_SER_CON.vhd => par_ser_con.vhd} (98%) rename dhwk/source/{COMM_FSM.vhd => pci/comm_fsm.vhd} (100%) rename dhwk/source/{ => pci}/connecting_fsm.vhd (100%) rename dhwk/source/{CONT_FSM.vhd => pci/cont_fsm.vhd} (100%) rename dhwk/source/{DATA_MUX.vhd => pci/data_mux.vhd} (100%) rename dhwk/source/{ => pci}/fifo_control.vhd (100%) rename dhwk/source/{ => pci}/fifo_io_control.vhd (98%) rename dhwk/source/{FLAG_BUS.vhd => pci/flag_bus.vhd} (100%) rename dhwk/source/{INTERRUPT.vhd => pci/interrupt.vhd} (100%) rename dhwk/source/{Io_mux.vhd => pci/io_mux.vhd} (100%) rename dhwk/source/{ => pci}/io_mux_reg.vhd (100%) rename dhwk/source/{Io_reg.vhd => pci/io_reg.vhd} (100%) rename dhwk/source/{IO_RW_SEL.vhd => pci/io_rw_sel.vhd} (100%) rename dhwk/source/{ => pci}/parity.vhd (100%) rename dhwk/source/{Parity_4.vhd => pci/parity_4.vhd} (100%) rename dhwk/source/{ => pci}/parity_out.vhd (100%) rename dhwk/source/{ => pci}/pci_interface.vhd (100%) rename dhwk/source/{ => pci}/pci_top.vhd (100%) rename dhwk/source/{REG.vhd => pci/reg.vhd} (100%) rename dhwk/source/{ => pci}/reg_io.vhd (100%) rename dhwk/source/{ => pci}/steuerung.vhd (100%) rename dhwk/source/{ => pci}/synplify.vhd (100%) rename dhwk/source/{ => pci}/top.vhd (100%) rename dhwk/source/{ => pci}/user_io.vhd (100%) rename dhwk/source/{ => pci}/ven_rev_id.vhd (100%) rename dhwk/source/{Verg_2.vhd => pci/verg_2.vhd} (100%) rename dhwk/source/{Verg_4.vhd => pci/verg_4.vhd} (100%) rename dhwk/source/{ => pci}/verg_8.vhd (100%) rename dhwk/source/{ => pci}/vergleich.vhd (100%) rename dhwk/source/{SER_PAR_CON.vhd => ser_par_con.vhd} (99%) diff --git a/dhwk/dhwk.prj b/dhwk/dhwk.prj index 056bf47..0429c18 100644 --- a/dhwk/dhwk.prj +++ b/dhwk/dhwk.prj @@ -1,42 +1,41 @@ -vhdl work "source/verg_8.vhd" -vhdl work "source/synplify.vhd" -vhdl work "source/parity_out.vhd" +vhdl work "source/par_ser_con.vhd" +vhdl work "source/ser_par_con.vhd" +vhdl work "source/pci/address_register.vhd" +vhdl work "source/pci/comm_dec.vhd" +vhdl work "source/pci/comm_fsm.vhd" +vhdl work "source/pci/config_00h.vhd" +vhdl work "source/pci/config_04h.vhd" +vhdl work "source/pci/config_08h.vhd" +vhdl work "source/pci/config_10h.vhd" +vhdl work "source/pci/config_3Ch.vhd" +vhdl work "source/pci/config_mux_0.vhd" +vhdl work "source/pci/config_rd_0.vhd" vhdl work "source/pci/config_space_header.vhd" vhdl work "source/pci/config_wr_0.vhd" -vhdl work "source/pci/config_rd_0.vhd" -vhdl work "source/pci/config_mux_0.vhd" -vhdl work "source/pci/config_3Ch.vhd" -vhdl work "source/pci/config_10h.vhd" -vhdl work "source/pci/config_08h.vhd" -vhdl work "source/pci/config_04h.vhd" -vhdl work "source/pci/config_00h.vhd" -vhdl work "source/Verg_4.vhd" -vhdl work "source/Verg_2.vhd" -vhdl work "source/REG.vhd" -vhdl work "source/Parity_4.vhd" -vhdl work "source/Io_reg.vhd" -vhdl work "source/Io_mux.vhd" -vhdl work "source/CONT_FSM.vhd" -vhdl work "source/COMM_FSM.vhd" -vhdl work "source/pci/comm_dec.vhd" -vhdl work "source/vergleich.vhd" -vhdl work "source/steuerung.vhd" -vhdl work "source/reg_io.vhd" -vhdl work "source/parity.vhd" -vhdl work "source/io_mux_reg.vhd" -vhdl work "source/IO_RW_SEL.vhd" -vhdl work "source/DATA_MUX.vhd" -vhdl work "source/user_io.vhd" -vhdl work "source/pci_interface.vhd" -vhdl work "source/fifo_io_control.vhd" -vhdl work "source/connecting_fsm.vhd" -vhdl work "source/SER_PAR_CON.vhd" -vhdl work "source/PAR_SER_CON.vhd" -vhdl work "source/FLAG_BUS.vhd" -vhdl work "source/pci_top.vhd" -vhdl work "source/fifo_control.vhd" -vhdl work "source/MESS_1_TB.vhd" -vhdl work "source/INTERRUPT.vhd" -vhdl work "source/top.vhd" -vhdl work "source/ven_rev_id.vhd" -vhdl work "source/pci/address_register.vhd" +vhdl work "source/pci/connecting_fsm.vhd" +vhdl work "source/pci/cont_fsm.vhd" +vhdl work "source/pci/data_mux.vhd" +vhdl work "source/pci/fifo_control.vhd" +vhdl work "source/pci/fifo_io_control.vhd" +vhdl work "source/pci/flag_bus.vhd" +vhdl work "source/pci/interrupt.vhd" +vhdl work "source/pci/io_mux.vhd" +vhdl work "source/pci/io_mux_reg.vhd" +vhdl work "source/pci/io_reg.vhd" +vhdl work "source/pci/io_rw_sel.vhd" +vhdl work "source/pci/parity.vhd" +vhdl work "source/pci/parity_4.vhd" +vhdl work "source/pci/parity_out.vhd" +vhdl work "source/pci/pci_interface.vhd" +vhdl work "source/pci/pci_top.vhd" +vhdl work "source/pci/reg.vhd" +vhdl work "source/pci/reg_io.vhd" +vhdl work "source/pci/steuerung.vhd" +vhdl work "source/pci/synplify.vhd" +vhdl work "source/pci/top.vhd" +vhdl work "source/pci/user_io.vhd" +vhdl work "source/pci/ven_rev_id.vhd" +vhdl work "source/pci/verg_2.vhd" +vhdl work "source/pci/verg_4.vhd" +vhdl work "source/pci/verg_8.vhd" +vhdl work "source/pci/vergleich.vhd" diff --git a/dhwk/source/MESS_1_TB.vhd b/dhwk/source/MESS_1_TB.vhd deleted file mode 100644 index ec9b512..0000000 --- a/dhwk/source/MESS_1_TB.vhd +++ /dev/null @@ -1,33 +0,0 @@ --- J.STELZNER --- INFORMATIK-3 LABOR --- 29.08.2006 --- File: MESS_1_TB.VHD - -library IEEE; -use IEEE.std_logic_1164.all; - -entity MESS_1_TB is - port - ( - KONST_1 :in std_logic; - PCI_IDSEL :in std_logic; - DEVSELn :in std_logic; - INTAn :in std_logic; - REG_OUT_XX7 :in std_logic_vector(7 downto 0); - TB_PCI_IDSEL :out std_logic; - TB_DEVSELn :out std_logic; - TB_INTAn :out std_logic - ); -end entity MESS_1_TB; - -architecture MESS_1_TB_DESIGN of MESS_1_TB is - -begin - - TB_PCI_IDSEL <= PCI_IDSEL and KONST_1; - - TB_INTAn <= INTAn and KONST_1; - - TB_DEVSELn <= DEVSELn when REG_OUT_XX7(7) = '0' else (not REG_OUT_XX7(6)); - -end architecture MESS_1_TB_DESIGN; diff --git a/dhwk/source/PAR_SER_CON.vhd b/dhwk/source/par_ser_con.vhd similarity index 98% rename from dhwk/source/PAR_SER_CON.vhd rename to dhwk/source/par_ser_con.vhd index 7f569e2..1c366e2 100644 --- a/dhwk/source/PAR_SER_CON.vhd +++ b/dhwk/source/par_ser_con.vhd @@ -1,4 +1,4 @@ --- $Id: PAR_SER_CON.vhd,v 1.4 2007-03-11 08:44:31 sithglan Exp $ +-- $Id: par_ser_con.vhd,v 1.1 2007-03-11 08:55:29 sithglan Exp $ library ieee; use ieee.std_logic_1164.all; diff --git a/dhwk/source/COMM_FSM.vhd b/dhwk/source/pci/comm_fsm.vhd similarity index 100% rename from dhwk/source/COMM_FSM.vhd rename to dhwk/source/pci/comm_fsm.vhd diff --git a/dhwk/source/connecting_fsm.vhd b/dhwk/source/pci/connecting_fsm.vhd similarity index 100% rename from dhwk/source/connecting_fsm.vhd rename to dhwk/source/pci/connecting_fsm.vhd diff --git a/dhwk/source/CONT_FSM.vhd b/dhwk/source/pci/cont_fsm.vhd similarity index 100% rename from dhwk/source/CONT_FSM.vhd rename to dhwk/source/pci/cont_fsm.vhd diff --git a/dhwk/source/DATA_MUX.vhd b/dhwk/source/pci/data_mux.vhd similarity index 100% rename from dhwk/source/DATA_MUX.vhd rename to dhwk/source/pci/data_mux.vhd diff --git a/dhwk/source/fifo_control.vhd b/dhwk/source/pci/fifo_control.vhd similarity index 100% rename from dhwk/source/fifo_control.vhd rename to dhwk/source/pci/fifo_control.vhd diff --git a/dhwk/source/fifo_io_control.vhd b/dhwk/source/pci/fifo_io_control.vhd similarity index 98% rename from dhwk/source/fifo_io_control.vhd rename to dhwk/source/pci/fifo_io_control.vhd index 04c37f9..f9faba3 100644 --- a/dhwk/source/fifo_io_control.vhd +++ b/dhwk/source/pci/fifo_io_control.vhd @@ -1,4 +1,4 @@ --- $Id: fifo_io_control.vhd,v 1.3 2007-03-11 08:44:31 sithglan Exp $ +-- $Id: fifo_io_control.vhd,v 1.1 2007-03-11 08:55:29 sithglan Exp $ library IEEE; use IEEE.std_logic_1164.all; diff --git a/dhwk/source/FLAG_BUS.vhd b/dhwk/source/pci/flag_bus.vhd similarity index 100% rename from dhwk/source/FLAG_BUS.vhd rename to dhwk/source/pci/flag_bus.vhd diff --git a/dhwk/source/INTERRUPT.vhd b/dhwk/source/pci/interrupt.vhd similarity index 100% rename from dhwk/source/INTERRUPT.vhd rename to dhwk/source/pci/interrupt.vhd diff --git a/dhwk/source/Io_mux.vhd b/dhwk/source/pci/io_mux.vhd similarity index 100% rename from dhwk/source/Io_mux.vhd rename to dhwk/source/pci/io_mux.vhd diff --git a/dhwk/source/io_mux_reg.vhd b/dhwk/source/pci/io_mux_reg.vhd similarity index 100% rename from dhwk/source/io_mux_reg.vhd rename to dhwk/source/pci/io_mux_reg.vhd diff --git a/dhwk/source/Io_reg.vhd b/dhwk/source/pci/io_reg.vhd similarity index 100% rename from dhwk/source/Io_reg.vhd rename to dhwk/source/pci/io_reg.vhd diff --git a/dhwk/source/IO_RW_SEL.vhd b/dhwk/source/pci/io_rw_sel.vhd similarity index 100% rename from dhwk/source/IO_RW_SEL.vhd rename to dhwk/source/pci/io_rw_sel.vhd diff --git a/dhwk/source/parity.vhd b/dhwk/source/pci/parity.vhd similarity index 100% rename from dhwk/source/parity.vhd rename to dhwk/source/pci/parity.vhd diff --git a/dhwk/source/Parity_4.vhd b/dhwk/source/pci/parity_4.vhd similarity index 100% rename from dhwk/source/Parity_4.vhd rename to dhwk/source/pci/parity_4.vhd diff --git a/dhwk/source/parity_out.vhd b/dhwk/source/pci/parity_out.vhd similarity index 100% rename from dhwk/source/parity_out.vhd rename to dhwk/source/pci/parity_out.vhd diff --git a/dhwk/source/pci_interface.vhd b/dhwk/source/pci/pci_interface.vhd similarity index 100% rename from dhwk/source/pci_interface.vhd rename to dhwk/source/pci/pci_interface.vhd diff --git a/dhwk/source/pci_top.vhd b/dhwk/source/pci/pci_top.vhd similarity index 100% rename from dhwk/source/pci_top.vhd rename to dhwk/source/pci/pci_top.vhd diff --git a/dhwk/source/REG.vhd b/dhwk/source/pci/reg.vhd similarity index 100% rename from dhwk/source/REG.vhd rename to dhwk/source/pci/reg.vhd diff --git a/dhwk/source/reg_io.vhd b/dhwk/source/pci/reg_io.vhd similarity index 100% rename from dhwk/source/reg_io.vhd rename to dhwk/source/pci/reg_io.vhd diff --git a/dhwk/source/steuerung.vhd b/dhwk/source/pci/steuerung.vhd similarity index 100% rename from dhwk/source/steuerung.vhd rename to dhwk/source/pci/steuerung.vhd diff --git a/dhwk/source/synplify.vhd b/dhwk/source/pci/synplify.vhd similarity index 100% rename from dhwk/source/synplify.vhd rename to dhwk/source/pci/synplify.vhd diff --git a/dhwk/source/top.vhd b/dhwk/source/pci/top.vhd similarity index 100% rename from dhwk/source/top.vhd rename to dhwk/source/pci/top.vhd diff --git a/dhwk/source/user_io.vhd b/dhwk/source/pci/user_io.vhd similarity index 100% rename from dhwk/source/user_io.vhd rename to dhwk/source/pci/user_io.vhd diff --git a/dhwk/source/ven_rev_id.vhd b/dhwk/source/pci/ven_rev_id.vhd similarity index 100% rename from dhwk/source/ven_rev_id.vhd rename to dhwk/source/pci/ven_rev_id.vhd diff --git a/dhwk/source/Verg_2.vhd b/dhwk/source/pci/verg_2.vhd similarity index 100% rename from dhwk/source/Verg_2.vhd rename to dhwk/source/pci/verg_2.vhd diff --git a/dhwk/source/Verg_4.vhd b/dhwk/source/pci/verg_4.vhd similarity index 100% rename from dhwk/source/Verg_4.vhd rename to dhwk/source/pci/verg_4.vhd diff --git a/dhwk/source/verg_8.vhd b/dhwk/source/pci/verg_8.vhd similarity index 100% rename from dhwk/source/verg_8.vhd rename to dhwk/source/pci/verg_8.vhd diff --git a/dhwk/source/vergleich.vhd b/dhwk/source/pci/vergleich.vhd similarity index 100% rename from dhwk/source/vergleich.vhd rename to dhwk/source/pci/vergleich.vhd diff --git a/dhwk/source/SER_PAR_CON.vhd b/dhwk/source/ser_par_con.vhd similarity index 99% rename from dhwk/source/SER_PAR_CON.vhd rename to dhwk/source/ser_par_con.vhd index 16a9416..7c6978d 100644 --- a/dhwk/source/SER_PAR_CON.vhd +++ b/dhwk/source/ser_par_con.vhd @@ -1,4 +1,4 @@ --- $Id: SER_PAR_CON.vhd,v 1.3 2007-03-11 08:44:31 sithglan Exp $ +-- $Id: ser_par_con.vhd,v 1.1 2007-03-11 08:55:29 sithglan Exp $ library ieee; use ieee.std_logic_1164.all; -- 2.39.5