decode packets

[rsbs2] / bmc / i2c.c

diff --git a/bmc/i2c.c b/bmc/i2c.c
index 214d410158ee3dea10e1fbb4059c24fceb736278..4ada02e6c011ebf1cfd0e33c73563d2861885e05 100644 (file)
--- a/bmc/i2c.c
+++ b/bmc/i2c.c
@@ -2,11 +2,15 @@
 #include <avr/interrupt.h>
 #include <stdio.h>
 #include "i2c.h"
+#include "bmc.h"
 
 #define TWCR_ACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC);  
 #define TWCR_NACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC);
 #define TWCR_RESET TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(0<<TWWC);  
 
+static volatile unsigned char databuf[12];
+static volatile uint8_t pos = 0x00;
+
 void i2c_init()
 {
        TWAR = BMC_ADDR & 0xfe;
@@ -19,11 +23,38 @@ void i2c_init()
 
 ISR (TWI_vect, ISR_BLOCK)
 {
-       printf("Interrupt, Status: 0x%02x, Data: 0x%02x!\n", TW_STATUS, TWDR);
-
        switch (TW_STATUS) {
-               default:
+               case TW_SR_SLA_ACK:
+#ifdef DEBUG
+                       printf("I2C: Slave 0x%02x adressed\n", TWDR);
+#endif
+                       pos = 0x00;
+                       databuf[pos] = TWDR;
+                       pos++;
+                       TWCR_ACK;
+                       break;
+
+               case TW_SR_DATA_ACK:
+#ifdef DEBUG
+                       printf("I2C: Data received: 0x%02x\n", TWDR);
+#endif
+                       databuf[pos] = TWDR;
+                       pos++;
                        TWCR_ACK;
                        break;
+
+               case TW_SR_STOP:
+#ifdef DEBUG
+                       printf("I2C: STOP received\n");
+#endif
+                       decode_bmc_cmd((unsigned char*)databuf, pos);
+                       pos = 0x00;
+                       TWCR_RESET;
+                       break;
+
+               default:
+                       printf("I2C: Unimplemented status 0x%02x\n", TW_STATUS);
+                       TWCR_RESET;
+                       break;
        }
 }