cvs.zerfleddert.de Git - fpga-games/blob - galaxian/src/dac.v

   1 //
   2 // XAPP154 based SigmaDeltaPCM Module
   3 //
   4 // Important !
   5 //
   6 // This program is freeware for non-commercial use.
   7 // An author does no guarantee about this program.
   8 // You can use this under your own risk.
   9 //
  10 // See the xapp154.pdf on Xilinx application note.
  11 //
  12 //
  13
  14 `timescale 100 ps / 10 ps
  15 `define MSBI 7 // Most significant Bit of DAC input
  16 //This is a Delta-Sigma Digital to Analog Converter
  17
  18 module dac(DACout, DACin, Clk, Reset);
  19 output DACout; // This is the average output that feeds low pass filter
  20 reg DACout; // for optimum performance, ensure that this ff is in IOB
  21 input [`MSBI:0] DACin; // DAC input (excess 2**MSBI)
  22 input Clk;
  23 input Reset;
  24 reg [`MSBI+2:0] DeltaAdder; // Output of Delta adder
  25 reg [`MSBI+2:0] SigmaAdder; // Output of Sigma adder
  26 reg [`MSBI+2:0] SigmaLatch; // Latches output of Sigma adder
  27 reg [`MSBI+2:0] DeltaB; // B input of Delta adder
  28
  29 always @(SigmaLatch) DeltaB = {SigmaLatch[`MSBI+2], SigmaLatch[`MSBI+2]} << (`MSBI+1);
  30
  31 always @(DACin or DeltaB) DeltaAdder = DACin + DeltaB;
  32
  33 always @(DeltaAdder or SigmaLatch) SigmaAdder = DeltaAdder + SigmaLatch;
  34
  35 always @(posedge Clk or posedge Reset)
  36 begin
  37         if(Reset)
  38         begin
  39                 SigmaLatch <= #1 1'b1 << (`MSBI+1);
  40                 DACout <= #1 1'b0;
  41         end
  42         else
  43         begin
  44 //              SigmaLatch <== #1 SigmaAdder;
  45                 SigmaLatch <= #1 SigmaAdder;
  46                 DACout <= #1  SigmaLatch[`MSBI+2];
  47         end
  48 end
  49 endmodule
  50