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faster clock for roms
[fpga-games] / galaxian / src / mc_sound_a.v
1 //===============================================================================
2 // FPGA MOONCRESTA SOUND I/F
3 //
4 // Version : 1.00
5 //
6 // Copyright(c) 2004 Katsumi Degawa , All rights reserved
7 //
8 // Important !
9 //
10 // This program is freeware for non-commercial use.
11 // An author does no guarantee about this program.
12 // You can use this under your own risk.
13 //
14 //================================================================================
15
16
17 module mc_sound_a(
18
19 I_CLK_12M,
20 I_CLK_6M,
21 I_H_CNT1,
22 I_BD,
23 I_PITCHn,
24 I_VOL1,
25 I_VOL2,
26
27 O_SDAT,
28 O_DO
29
30 );
31
32 input I_CLK_12M;
33 input I_CLK_6M;
34 input I_H_CNT1;
35 input [7:0]I_BD;
36 input I_PITCHn;
37 input I_VOL1;
38 input I_VOL2;
39
40 output [3:0]O_DO;
41 output [7:0]O_SDAT;
42
43 reg W_PITCHn;
44 reg W_89K_LDn;
45 reg [7:0]W_89K_Q;
46 reg [7:0]W_89K_LDATA;
47 reg [3:0]W_6T_Q;
48
49 always@(posedge I_CLK_12M)
50 begin
51 W_PITCHn <= I_PITCHn;
52 W_89K_LDn <= ~(&W_89K_Q[7:0]);
53 end
54
55 // Parts 9J
56 always@(posedge W_PITCHn) W_89K_LDATA <= I_BD;
57
58 always@(posedge I_H_CNT1)
59 begin
60 if(~W_89K_LDn)
61 W_89K_Q <= W_89K_LDATA;
62 else
63 W_89K_Q <= W_89K_Q + 1;
64 end
65
66 always@(negedge W_89K_LDn) W_6T_Q <= W_6T_Q + 1;
67 assign O_DO = W_6T_Q;
68
69 reg [7:0]W_SDAT0;
70 reg [7:0]W_SDAT2;
71 reg [7:0]W_SDAT3;
72 always@(posedge I_CLK_6M)
73 begin
74 W_SDAT0 <= W_6T_Q[0]==1'b0 ? 8'd0 : 8'd42 ;
75 W_SDAT2 <= W_6T_Q[2]==1'b0 ? 8'd0 : I_VOL1 ? 8'd105 : 8'd57 ;
76 W_SDAT3 <= W_6T_Q[3]==1'b0 ? 8'd0 : I_VOL2 ? 8'd72 : 8'd0 ;
77 end
78
79 assign O_SDAT = W_SDAT0 + W_SDAT2 + W_SDAT3 + 8'd20 ;
80
81
82 endmodule
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