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Commit | Line | Data |
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c5f1f439 | 1 | #define STRONGARM 1 |
77a37381 | 2 | |
3 | #ifndef STRONGARM | |
4 | ||
5 | /* xscale */ | |
6 | ||
7 | #define MEM_START 0xa0000000 | |
c5f1f439 | 8 | |
9 | /* Memory in MByte */ | |
10 | #define MEM_SIZE 64 | |
77a37381 | 11 | |
12 | #define KERNELCOPY 0xa0a00000 | |
13 | //#define KERNELCOPY 0xa0800000 | |
14 | ||
15 | #define INITRD 0xa0d00000 | |
16 | #define INITRD_TAG ATAG_INITRD2 | |
17 | ||
18 | /* Interrupt controller */ | |
19 | #define ICIP 0x40D00000 | |
20 | ||
c5f1f439 | 21 | #define UARTBASE 0x40100000 |
22 | #define UARTDATA 0x00 | |
23 | #define UARTSTATUS 0x14 | |
24 | #define UARTTXRDY 5 | |
25 | #define UARTTXBIT 0 | |
26 | ||
77a37381 | 27 | /* Not used */ |
28 | #define BOOTIMG 0xa0008000 | |
c5f1f439 | 29 | |
77a37381 | 30 | /* MACH_TYPE_H1900 */ |
c5f1f439 | 31 | #define MACH_TYPE_JORNADA720 48 |
77a37381 | 32 | #define MACH_TYPE 48 |
33 | ||
34 | #else | |
35 | ||
36 | /* strongarm */ | |
37 | ||
38 | #define MEM_START 0xc0000000 | |
39 | ||
c5f1f439 | 40 | /* Memory in MByte */ |
41 | #define MEM_SIZE 32 | |
42 | ||
77a37381 | 43 | #define KERNELCOPY 0xc0a00000 |
44 | ||
45 | #define INITRD 0xc0d00000 | |
2f5dc0a0 | 46 | #define INITRD_TAG ATAG_INITRD2 |
77a37381 | 47 | |
48 | /* Interrupt controller */ | |
49 | #define ICIP 0x90050000 | |
50 | ||
c5f1f439 | 51 | #define UARTBASE 0x80030000 |
52 | #define UARTDATA 0x14 | |
53 | #define UARTSTATUS 0x20 | |
54 | #define UARTTXRDY 2 | |
55 | #define UARTTXBIT 0 | |
56 | ||
77a37381 | 57 | /* Not used */ |
58 | #define BOOTIMG 0xc0008000 | |
c5f1f439 | 59 | |
77a37381 | 60 | /* MACH_TYPE_H3600 */ |
61 | //#define MACH_TYPE 22 | |
62 | ||
63 | /* MACH_TYPE_H3800 */ | |
64 | //#define MACH_TYPE 137 | |
c5f1f439 | 65 | |
66 | /* MACH_TYPE_XDA */ | |
67 | #define MACH_TYPE_JORNADA720 48 | |
68 | #define MACH_TYPE 48 | |
77a37381 | 69 | |
70 | #endif | |
71 | ||
72 |