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15c4dc5a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
12 | ||
f38a1528 | 13 | #include "../include/proxmark3.h" |
15c4dc5a | 14 | #include "apps.h" |
f7e3ed82 | 15 | #include "util.h" |
9ab7a6c7 | 16 | #include "string.h" |
f38a1528 | 17 | #include "../common/cmd.h" |
18 | #include "../common/iso14443crc.h" | |
534983d7 | 19 | #include "iso14443a.h" |
20f9a2a1 M |
20 | #include "crapto1.h" |
21 | #include "mifareutil.h" | |
15c4dc5a | 22 | |
534983d7 | 23 | static uint32_t iso14a_timeout; |
d19929cb | 24 | uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET; |
1e262141 | 25 | int rsamples = 0; |
7bc95e2e | 26 | int traceLen = 0; |
1e262141 | 27 | int tracing = TRUE; |
28 | uint8_t trigger = 0; | |
b0127e65 | 29 | // the block number for the ISO14443-4 PCB |
30 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 31 | |
7bc95e2e | 32 | // |
33 | // ISO14443 timing: | |
34 | // | |
35 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
36 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
37 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
38 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
39 | // bool LastCommandWasRequest = FALSE; | |
40 | ||
41 | // | |
42 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
43 | // | |
d714d3ef | 44 | // When the PM acts as reader and is receiving tag data, it takes |
45 | // 3 ticks delay in the AD converter | |
46 | // 16 ticks until the modulation detector completes and sets curbit | |
47 | // 8 ticks until bit_to_arm is assigned from curbit | |
48 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 49 | // 4*16 ticks until we measure the time |
50 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 51 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 52 | |
53 | // When the PM acts as a reader and is sending, it takes | |
54 | // 4*16 ticks until we can write data to the sending hold register | |
55 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
56 | // 8 ticks until the first transfer starts | |
57 | // 8 ticks later the FPGA samples the data | |
58 | // 1 tick to assign mod_sig_coil | |
59 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
60 | ||
61 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 62 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 63 | // 3 ticks for the A/D conversion, |
64 | // 8 ticks on average until the start of the SSC transfer, | |
65 | // 8 ticks until the SSC samples the first data | |
66 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
67 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 68 | // 4*16 ticks until we measure the time |
7bc95e2e | 69 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 70 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 71 | |
72 | // The FPGA will report its internal sending delay in | |
73 | uint16_t FpgaSendQueueDelay; | |
74 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
75 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
76 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
77 | ||
78 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 79 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 80 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
81 | // 8 ticks until the first transfer starts | |
82 | // 8 ticks later the FPGA samples the data | |
83 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
84 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 85 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 86 | |
87 | // When the PM acts as sniffer and is receiving tag data, it takes | |
88 | // 3 ticks A/D conversion | |
d714d3ef | 89 | // 14 ticks to complete the modulation detection |
90 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 91 | // + the delays in transferring data - which is the same for |
92 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 93 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 94 | |
d714d3ef | 95 | // When the PM acts as sniffer and is receiving reader data, it takes |
96 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
97 | // start bit, which marks the start of the communication) | |
7bc95e2e | 98 | // 3 ticks A/D conversion |
d714d3ef | 99 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 100 | // + the delays in transferring data - which is the same for |
101 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 102 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 103 | |
104 | //variables used for timing purposes: | |
105 | //these are in ssp_clk cycles: | |
a501c82b | 106 | static uint32_t NextTransferTime; |
107 | static uint32_t LastTimeProxToAirStart; | |
108 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 109 | |
110 | ||
111 | ||
8f51ddb0 | 112 | // CARD TO READER - manchester |
72934aa3 | 113 | // Sequence D: 11110000 modulation with subcarrier during first half |
114 | // Sequence E: 00001111 modulation with subcarrier during second half | |
115 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 116 | // READER TO CARD - miller |
72934aa3 | 117 | // Sequence X: 00001100 drop after half a period |
118 | // Sequence Y: 00000000 no drop | |
119 | // Sequence Z: 11000000 drop at start | |
120 | #define SEC_D 0xf0 | |
121 | #define SEC_E 0x0f | |
122 | #define SEC_F 0x00 | |
123 | #define SEC_X 0x0c | |
124 | #define SEC_Y 0x00 | |
125 | #define SEC_Z 0xc0 | |
15c4dc5a | 126 | |
1e262141 | 127 | const uint8_t OddByteParity[256] = { |
15c4dc5a | 128 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, |
129 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
130 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
131 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
132 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
133 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
134 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
135 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
136 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
137 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
138 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
139 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
140 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
141 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
142 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
143 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 | |
144 | }; | |
1e262141 | 145 | |
902cb3c0 | 146 | void iso14a_set_trigger(bool enable) { |
534983d7 | 147 | trigger = enable; |
148 | } | |
149 | ||
902cb3c0 | 150 | void iso14a_clear_trace() { |
7bc95e2e | 151 | memset(trace, 0x44, TRACE_SIZE); |
8556b852 M |
152 | traceLen = 0; |
153 | } | |
d19929cb | 154 | |
902cb3c0 | 155 | void iso14a_set_tracing(bool enable) { |
8556b852 M |
156 | tracing = enable; |
157 | } | |
d19929cb | 158 | |
b0127e65 | 159 | void iso14a_set_timeout(uint32_t timeout) { |
160 | iso14a_timeout = timeout; | |
161 | } | |
8556b852 | 162 | |
15c4dc5a | 163 | //----------------------------------------------------------------------------- |
164 | // Generate the parity value for a byte sequence | |
e30c654b | 165 | // |
15c4dc5a | 166 | //----------------------------------------------------------------------------- |
20f9a2a1 M |
167 | byte_t oddparity (const byte_t bt) |
168 | { | |
5f6d6c90 | 169 | return OddByteParity[bt]; |
20f9a2a1 M |
170 | } |
171 | ||
a501c82b | 172 | void GetParity(const uint8_t * pbtCmd, uint16_t iLen, uint8_t *par) |
15c4dc5a | 173 | { |
a501c82b | 174 | uint16_t paritybit_cnt = 0; |
175 | uint16_t paritybyte_cnt = 0; | |
176 | uint8_t parityBits = 0; | |
177 | ||
178 | for (uint16_t i = 0; i < iLen; i++) { | |
179 | // Generate the parity bits | |
180 | parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt)); | |
181 | if (paritybit_cnt == 7) { | |
182 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
183 | parityBits = 0; // and advance to next Parity Byte | |
184 | paritybyte_cnt++; | |
185 | paritybit_cnt = 0; | |
186 | } else { | |
187 | paritybit_cnt++; | |
188 | } | |
5f6d6c90 | 189 | } |
a501c82b | 190 | |
191 | // save remaining parity bits | |
192 | par[paritybyte_cnt] = parityBits; | |
193 | ||
15c4dc5a | 194 | } |
195 | ||
534983d7 | 196 | void AppendCrc14443a(uint8_t* data, int len) |
15c4dc5a | 197 | { |
5f6d6c90 | 198 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 199 | } |
200 | ||
1e262141 | 201 | // The function LogTrace() is also used by the iClass implementation in iClass.c |
a501c82b | 202 | bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) |
15c4dc5a | 203 | { |
fdcd43eb | 204 | if (!tracing) return FALSE; |
a501c82b | 205 | |
206 | uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity | |
207 | uint16_t duration = timestamp_end - timestamp_start; | |
208 | ||
7bc95e2e | 209 | // Return when trace is full |
a501c82b | 210 | if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) { |
7bc95e2e | 211 | tracing = FALSE; // don't trace any more |
212 | return FALSE; | |
213 | } | |
214 | ||
a501c82b | 215 | // Traceformat: |
216 | // 32 bits timestamp (little endian) | |
217 | // 16 bits duration (little endian) | |
218 | // 16 bits data length (little endian, Highest Bit used as readerToTag flag) | |
219 | // y Bytes data | |
220 | // x Bytes parity (one byte per 8 bytes data) | |
221 | ||
222 | // timestamp (start) | |
223 | trace[traceLen++] = ((timestamp_start >> 0) & 0xff); | |
224 | trace[traceLen++] = ((timestamp_start >> 8) & 0xff); | |
225 | trace[traceLen++] = ((timestamp_start >> 16) & 0xff); | |
226 | trace[traceLen++] = ((timestamp_start >> 24) & 0xff); | |
227 | ||
228 | // duration | |
229 | trace[traceLen++] = ((duration >> 0) & 0xff); | |
230 | trace[traceLen++] = ((duration >> 8) & 0xff); | |
231 | ||
232 | // data length | |
233 | trace[traceLen++] = ((iLen >> 0) & 0xff); | |
234 | trace[traceLen++] = ((iLen >> 8) & 0xff); | |
235 | ||
236 | // readerToTag flag | |
17cba269 | 237 | if (!readerToTag) { |
7bc95e2e | 238 | trace[traceLen - 1] |= 0x80; |
a501c82b | 239 | } |
240 | ||
241 | // data bytes | |
7bc95e2e | 242 | if (btBytes != NULL && iLen != 0) { |
243 | memcpy(trace + traceLen, btBytes, iLen); | |
244 | } | |
a501c82b | 245 | traceLen += iLen; |
246 | ||
247 | // parity bytes | |
248 | if (parity != NULL && iLen != 0) { | |
249 | memcpy(trace + traceLen, parity, num_paritybytes); | |
250 | } | |
251 | traceLen += num_paritybytes; | |
252 | ||
7bc95e2e | 253 | return TRUE; |
15c4dc5a | 254 | } |
255 | ||
7bc95e2e | 256 | //============================================================================= |
257 | // ISO 14443 Type A - Miller decoder | |
258 | //============================================================================= | |
259 | // Basics: | |
260 | // This decoder is used when the PM3 acts as a tag. | |
261 | // The reader will generate "pauses" by temporarily switching of the field. | |
262 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
263 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
264 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
265 | // The Miller decoder needs to identify the following sequences: | |
266 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
267 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
268 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
269 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
270 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 271 | //----------------------------------------------------------------------------- |
b62a5a84 | 272 | static tUart Uart; |
15c4dc5a | 273 | |
d7aa3739 | 274 | // Lookup-Table to decide if 4 raw bits are a modulation. |
275 | // We accept two or three consecutive "0" in any position with the rest "1" | |
276 | const bool Mod_Miller_LUT[] = { | |
277 | TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, | |
278 | TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE | |
279 | }; | |
280 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4]) | |
281 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)]) | |
282 | ||
7bc95e2e | 283 | void UartReset() |
15c4dc5a | 284 | { |
7bc95e2e | 285 | Uart.state = STATE_UNSYNCD; |
286 | Uart.bitCount = 0; | |
287 | Uart.len = 0; // number of decoded data bytes | |
a501c82b | 288 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 289 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
a501c82b | 290 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 291 | Uart.twoBits = 0x0000; // buffer for 2 Bits |
292 | Uart.highCnt = 0; | |
293 | Uart.startTime = 0; | |
294 | Uart.endTime = 0; | |
295 | } | |
15c4dc5a | 296 | |
a501c82b | 297 | void UartInit(uint8_t *data, uint8_t *parity) |
298 | { | |
299 | Uart.output = data; | |
300 | Uart.parity = parity; | |
301 | UartReset(); | |
302 | } | |
d714d3ef | 303 | |
7bc95e2e | 304 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
305 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) | |
306 | { | |
15c4dc5a | 307 | |
7bc95e2e | 308 | Uart.twoBits = (Uart.twoBits << 8) | bit; |
309 | ||
a501c82b | 310 | if (Uart.state == STATE_UNSYNCD) { // not yet synced |
311 | ||
7bc95e2e | 312 | if (Uart.highCnt < 7) { // wait for a stable unmodulated signal |
f5ed4d12 | 313 | if (Uart.twoBits == 0xffff) { |
7bc95e2e | 314 | Uart.highCnt++; |
f5ed4d12 | 315 | } else { |
7bc95e2e | 316 | Uart.highCnt = 0; |
f5ed4d12 | 317 | } |
a501c82b | 318 | } else { |
7bc95e2e | 319 | Uart.syncBit = 0xFFFF; // not set |
320 | // look for 00xx1111 (the start bit) | |
321 | if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7; | |
322 | else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6; | |
323 | else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5; | |
324 | else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4; | |
325 | else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3; | |
326 | else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2; | |
327 | else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1; | |
328 | else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0; | |
329 | if (Uart.syncBit != 0xFFFF) { | |
330 | Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); | |
331 | Uart.startTime -= Uart.syncBit; | |
d7aa3739 | 332 | Uart.endTime = Uart.startTime; |
7bc95e2e | 333 | Uart.state = STATE_START_OF_COMMUNICATION; |
15c4dc5a | 334 | } |
7bc95e2e | 335 | } |
15c4dc5a | 336 | |
7bc95e2e | 337 | } else { |
15c4dc5a | 338 | |
d7aa3739 | 339 | if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) { |
340 | if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error | |
341 | UartReset(); | |
342 | Uart.highCnt = 6; | |
343 | } else { // Modulation in first half = Sequence Z = logic "0" | |
7bc95e2e | 344 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
345 | UartReset(); | |
346 | Uart.highCnt = 6; | |
347 | } else { | |
348 | Uart.bitCount++; | |
349 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
350 | Uart.state = STATE_MILLER_Z; | |
351 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
352 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
353 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
354 | Uart.parityBits <<= 1; // make room for the parity bit | |
355 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
356 | Uart.bitCount = 0; | |
357 | Uart.shiftReg = 0; | |
a501c82b | 358 | if((Uart.len & 0x0007) == 0) { // every 8 data bytes |
359 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
360 | Uart.parityBits = 0; | |
361 | } | |
15c4dc5a | 362 | } |
7bc95e2e | 363 | } |
d7aa3739 | 364 | } |
365 | } else { | |
366 | if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" | |
7bc95e2e | 367 | Uart.bitCount++; |
368 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
369 | Uart.state = STATE_MILLER_X; | |
370 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
371 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
372 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
373 | Uart.parityBits <<= 1; // make room for the new parity bit | |
374 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
375 | Uart.bitCount = 0; | |
376 | Uart.shiftReg = 0; | |
a501c82b | 377 | if ((Uart.len & 0x0007) == 0) { // every 8 data bytes |
378 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
379 | Uart.parityBits = 0; | |
380 | } | |
7bc95e2e | 381 | } |
d7aa3739 | 382 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 383 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 384 | Uart.state = STATE_UNSYNCD; |
a501c82b | 385 | Uart.bitCount--; // last "0" was part of EOC sequence |
386 | Uart.shiftReg <<= 1; // drop it | |
387 | if(Uart.bitCount > 0) { // if we decoded some bits | |
388 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
389 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
390 | Uart.parityBits <<= 1; // add a (void) parity bit | |
391 | Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align parity bits | |
392 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
15c4dc5a | 393 | return TRUE; |
a501c82b | 394 | } else if (Uart.len & 0x0007) { // there are some parity bits to store |
395 | Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align remaining parity bits | |
396 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
397 | return TRUE; // we are finished with decoding the raw data sequence | |
398 | } | |
15c4dc5a | 399 | } |
7bc95e2e | 400 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
401 | UartReset(); | |
402 | Uart.highCnt = 6; | |
403 | } else { // a logic "0" | |
404 | Uart.bitCount++; | |
405 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
406 | Uart.state = STATE_MILLER_Y; | |
407 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
408 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
409 | Uart.parityBits <<= 1; // make room for the parity bit | |
410 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
411 | Uart.bitCount = 0; | |
412 | Uart.shiftReg = 0; | |
a501c82b | 413 | if ((Uart.len & 0x0007) == 0) { // every 8 data bytes |
414 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
415 | Uart.parityBits = 0; | |
416 | } | |
15c4dc5a | 417 | } |
418 | } | |
d7aa3739 | 419 | } |
15c4dc5a | 420 | } |
7bc95e2e | 421 | |
a501c82b | 422 | } |
15c4dc5a | 423 | |
7bc95e2e | 424 | return FALSE; // not finished yet, need more data |
15c4dc5a | 425 | } |
426 | ||
7bc95e2e | 427 | |
428 | ||
15c4dc5a | 429 | //============================================================================= |
e691fc45 | 430 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 431 | //============================================================================= |
e691fc45 | 432 | // Basics: |
7bc95e2e | 433 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 434 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
435 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
436 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
437 | // The Manchester decoder needs to identify the following sequences: | |
438 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
439 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
440 | // 8 ticks unmodulated: Sequence F = end of communication | |
441 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 442 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 443 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 444 | static tDemod Demod; |
15c4dc5a | 445 | |
d7aa3739 | 446 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 447 | // We accept three or four "1" in any position |
7bc95e2e | 448 | const bool Mod_Manchester_LUT[] = { |
d7aa3739 | 449 | FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, |
d714d3ef | 450 | FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE |
7bc95e2e | 451 | }; |
452 | ||
453 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
454 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 455 | |
2f2d9fc5 | 456 | |
7bc95e2e | 457 | void DemodReset() |
e691fc45 | 458 | { |
7bc95e2e | 459 | Demod.state = DEMOD_UNSYNCD; |
460 | Demod.len = 0; // number of decoded data bytes | |
a501c82b | 461 | Demod.parityLen = 0; |
7bc95e2e | 462 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
463 | Demod.parityBits = 0; // | |
464 | Demod.collisionPos = 0; // Position of collision bit | |
465 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
466 | Demod.highCnt = 0; | |
467 | Demod.startTime = 0; | |
468 | Demod.endTime = 0; | |
e691fc45 | 469 | } |
15c4dc5a | 470 | |
a501c82b | 471 | void DemodInit(uint8_t *data, uint8_t *parity) |
472 | { | |
473 | Demod.output = data; | |
474 | Demod.parity = parity; | |
475 | DemodReset(); | |
476 | } | |
477 | ||
7bc95e2e | 478 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
479 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) | |
e691fc45 | 480 | { |
7bc95e2e | 481 | |
482 | Demod.twoBits = (Demod.twoBits << 8) | bit; | |
e691fc45 | 483 | |
7bc95e2e | 484 | if (Demod.state == DEMOD_UNSYNCD) { |
485 | ||
486 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
487 | if (Demod.twoBits == 0x0000) { | |
488 | Demod.highCnt++; | |
489 | } else { | |
490 | Demod.highCnt = 0; | |
491 | } | |
492 | } else { | |
493 | Demod.syncBit = 0xFFFF; // not set | |
494 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
495 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
496 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
497 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
498 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
499 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
500 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
501 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 502 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 503 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
504 | Demod.startTime -= Demod.syncBit; | |
505 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 506 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 507 | } |
7bc95e2e | 508 | } |
15c4dc5a | 509 | |
7bc95e2e | 510 | } else { |
15c4dc5a | 511 | |
7bc95e2e | 512 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
513 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 514 | if (!Demod.collisionPos) { |
515 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
516 | } | |
517 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 518 | Demod.bitCount++; |
519 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
520 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 521 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 522 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 523 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
524 | Demod.bitCount = 0; | |
525 | Demod.shiftReg = 0; | |
a501c82b | 526 | if((Demod.len & 0x0007) == 0) { // every 8 data bytes |
527 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
528 | Demod.parityBits = 0; | |
529 | } | |
15c4dc5a | 530 | } |
7bc95e2e | 531 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
532 | } else { // no modulation in first half | |
533 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 534 | Demod.bitCount++; |
7bc95e2e | 535 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 536 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 537 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 538 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 539 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
540 | Demod.bitCount = 0; | |
541 | Demod.shiftReg = 0; | |
a501c82b | 542 | if ((Demod.len & 0x0007) == 0) { // every 8 data bytes |
543 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
544 | Demod.parityBits = 0; | |
545 | } | |
15c4dc5a | 546 | } |
7bc95e2e | 547 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 548 | } else { // no modulation in both halves - End of communication |
a501c82b | 549 | if(Demod.bitCount > 0) { // there are some remaining data bits |
550 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
551 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
552 | Demod.parityBits <<= 1; // add a (void) parity bit | |
553 | Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits | |
554 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
555 | return TRUE; | |
556 | } else if (Demod.len & 0x0007) { // there are some parity bits to store | |
557 | Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits | |
558 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
559 | return TRUE; // we are finished with decoding the raw data sequence | |
d7aa3739 | 560 | } else { // nothing received. Start over |
561 | DemodReset(); | |
e691fc45 | 562 | } |
15c4dc5a | 563 | } |
7bc95e2e | 564 | } |
e691fc45 | 565 | |
566 | } | |
15c4dc5a | 567 | |
e691fc45 | 568 | return FALSE; // not finished yet, need more data |
15c4dc5a | 569 | } |
570 | ||
571 | //============================================================================= | |
572 | // Finally, a `sniffer' for ISO 14443 Type A | |
573 | // Both sides of communication! | |
574 | //============================================================================= | |
575 | ||
576 | //----------------------------------------------------------------------------- | |
577 | // Record the sequence of commands sent by the reader to the tag, with | |
578 | // triggering so that we start recording at the point that the tag is moved | |
579 | // near the reader. | |
580 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
581 | void RAMFUNC SnoopIso14443a(uint8_t param) { |
582 | // param: | |
583 | // bit 0 - trigger from first card answer | |
584 | // bit 1 - trigger from first reader 7-bit request | |
585 | ||
586 | LEDsoff(); | |
587 | // init trace buffer | |
5f6d6c90 | 588 | iso14a_clear_trace(); |
991f13f2 | 589 | iso14a_set_tracing(TRUE); |
5cd9ec01 M |
590 | |
591 | // We won't start recording the frames that we acquire until we trigger; | |
592 | // a good trigger condition to get started is probably when we see a | |
593 | // response from the tag. | |
594 | // triggered == FALSE -- to wait first for card | |
7bc95e2e | 595 | bool triggered = !(param & 0x03); |
596 | ||
5cd9ec01 | 597 | // The command (reader -> tag) that we're receiving. |
15c4dc5a | 598 | // The length of a received command will in most cases be no more than 18 bytes. |
599 | // So 32 should be enough! | |
a501c82b | 600 | uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET; |
601 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; | |
602 | ||
5cd9ec01 | 603 | // The response (tag -> reader) that we're receiving. |
a501c82b | 604 | uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET; |
605 | uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
606 | ||
5cd9ec01 M |
607 | // As we receive stuff, we copy it from receivedCmd or receivedResponse |
608 | // into trace, along with its length and other annotations. | |
609 | //uint8_t *trace = (uint8_t *)BigBuf; | |
610 | ||
611 | // The DMA buffer, used to stream samples from the FPGA | |
7bc95e2e | 612 | uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET; |
613 | uint8_t *data = dmaBuf; | |
614 | uint8_t previous_data = 0; | |
5cd9ec01 M |
615 | int maxDataLen = 0; |
616 | int dataLen = 0; | |
7bc95e2e | 617 | bool TagIsActive = FALSE; |
618 | bool ReaderIsActive = FALSE; | |
619 | ||
620 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
15c4dc5a | 621 | |
5cd9ec01 | 622 | // Set up the demodulator for tag -> reader responses. |
a501c82b | 623 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 624 | |
5cd9ec01 | 625 | // Set up the demodulator for the reader -> tag commands |
a501c82b | 626 | UartInit(receivedCmd, receivedCmdPar); |
15c4dc5a | 627 | |
7bc95e2e | 628 | // Setup and start DMA. |
5cd9ec01 | 629 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); |
7bc95e2e | 630 | |
5cd9ec01 | 631 | // And now we loop, receiving samples. |
7bc95e2e | 632 | for(uint32_t rsamples = 0; TRUE; ) { |
633 | ||
5cd9ec01 M |
634 | if(BUTTON_PRESS()) { |
635 | DbpString("cancelled by button"); | |
7bc95e2e | 636 | break; |
5cd9ec01 | 637 | } |
15c4dc5a | 638 | |
5cd9ec01 M |
639 | LED_A_ON(); |
640 | WDT_HIT(); | |
15c4dc5a | 641 | |
5cd9ec01 M |
642 | int register readBufDataP = data - dmaBuf; |
643 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
644 | if (readBufDataP <= dmaBufDataP){ | |
645 | dataLen = dmaBufDataP - readBufDataP; | |
646 | } else { | |
7bc95e2e | 647 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
648 | } |
649 | // test for length of buffer | |
650 | if(dataLen > maxDataLen) { | |
651 | maxDataLen = dataLen; | |
652 | if(dataLen > 400) { | |
7bc95e2e | 653 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
654 | break; | |
5cd9ec01 M |
655 | } |
656 | } | |
657 | if(dataLen < 1) continue; | |
658 | ||
659 | // primary buffer was stopped( <-- we lost data! | |
660 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
661 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
662 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 663 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
664 | } |
665 | // secondary buffer sets as primary, secondary buffer was stopped | |
666 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
667 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
668 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
669 | } | |
670 | ||
671 | LED_A_OFF(); | |
7bc95e2e | 672 | |
673 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 674 | |
7bc95e2e | 675 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
676 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
677 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
678 | LED_C_ON(); | |
5cd9ec01 | 679 | |
7bc95e2e | 680 | // check - if there is a short 7bit request from reader |
681 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE; | |
5cd9ec01 | 682 | |
7bc95e2e | 683 | if(triggered) { |
a501c82b | 684 | if (!LogTrace(receivedCmd, |
685 | Uart.len, | |
686 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
687 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
688 | Uart.parity, | |
689 | TRUE)) break; | |
7bc95e2e | 690 | } |
691 | /* And ready to receive another command. */ | |
692 | UartReset(); | |
693 | /* And also reset the demod code, which might have been */ | |
694 | /* false-triggered by the commands from the reader. */ | |
695 | DemodReset(); | |
696 | LED_B_OFF(); | |
697 | } | |
698 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 699 | } |
3be2a5ae | 700 | |
7bc95e2e | 701 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
702 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
703 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
704 | LED_B_ON(); | |
5cd9ec01 | 705 | |
a501c82b | 706 | if (!LogTrace(receivedResponse, |
707 | Demod.len, | |
708 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
709 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
710 | Demod.parity, | |
711 | FALSE)) break; | |
5cd9ec01 | 712 | |
7bc95e2e | 713 | if ((!triggered) && (param & 0x01)) triggered = TRUE; |
5cd9ec01 | 714 | |
7bc95e2e | 715 | // And ready to receive another response. |
716 | DemodReset(); | |
717 | LED_C_OFF(); | |
718 | } | |
719 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
720 | } | |
5cd9ec01 M |
721 | } |
722 | ||
7bc95e2e | 723 | previous_data = *data; |
724 | rsamples++; | |
5cd9ec01 | 725 | data++; |
d714d3ef | 726 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
727 | data = dmaBuf; |
728 | } | |
729 | } // main cycle | |
730 | ||
731 | DbpString("COMMAND FINISHED"); | |
15c4dc5a | 732 | |
7bc95e2e | 733 | FpgaDisableSscDma(); |
734 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); | |
735 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]); | |
5cd9ec01 | 736 | LEDsoff(); |
15c4dc5a | 737 | } |
738 | ||
15c4dc5a | 739 | //----------------------------------------------------------------------------- |
740 | // Prepare tag messages | |
741 | //----------------------------------------------------------------------------- | |
a501c82b | 742 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) |
15c4dc5a | 743 | { |
8f51ddb0 | 744 | ToSendReset(); |
15c4dc5a | 745 | |
746 | // Correction bit, might be removed when not needed | |
747 | ToSendStuffBit(0); | |
748 | ToSendStuffBit(0); | |
749 | ToSendStuffBit(0); | |
750 | ToSendStuffBit(0); | |
751 | ToSendStuffBit(1); // 1 | |
752 | ToSendStuffBit(0); | |
753 | ToSendStuffBit(0); | |
754 | ToSendStuffBit(0); | |
8f51ddb0 | 755 | |
15c4dc5a | 756 | // Send startbit |
72934aa3 | 757 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 758 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 759 | |
a501c82b | 760 | for( uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 761 | uint8_t b = cmd[i]; |
15c4dc5a | 762 | |
763 | // Data bits | |
a501c82b | 764 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 765 | if(b & 1) { |
72934aa3 | 766 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 767 | } else { |
72934aa3 | 768 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
769 | } |
770 | b >>= 1; | |
771 | } | |
15c4dc5a | 772 | |
0014cb46 | 773 | // Get the parity bit |
a501c82b | 774 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 775 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 776 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 777 | } else { |
72934aa3 | 778 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 779 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 780 | } |
8f51ddb0 | 781 | } |
15c4dc5a | 782 | |
8f51ddb0 M |
783 | // Send stopbit |
784 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 785 | |
8f51ddb0 M |
786 | // Convert from last byte pos to length |
787 | ToSendMax++; | |
8f51ddb0 M |
788 | } |
789 | ||
a501c82b | 790 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) |
791 | { | |
792 | uint8_t par[MAX_PARITY_SIZE]; | |
793 | ||
794 | GetParity(cmd, len, par); | |
795 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 796 | } |
797 | ||
15c4dc5a | 798 | |
8f51ddb0 M |
799 | static void Code4bitAnswerAsTag(uint8_t cmd) |
800 | { | |
801 | int i; | |
802 | ||
5f6d6c90 | 803 | ToSendReset(); |
8f51ddb0 M |
804 | |
805 | // Correction bit, might be removed when not needed | |
806 | ToSendStuffBit(0); | |
807 | ToSendStuffBit(0); | |
808 | ToSendStuffBit(0); | |
809 | ToSendStuffBit(0); | |
810 | ToSendStuffBit(1); // 1 | |
811 | ToSendStuffBit(0); | |
812 | ToSendStuffBit(0); | |
813 | ToSendStuffBit(0); | |
814 | ||
815 | // Send startbit | |
816 | ToSend[++ToSendMax] = SEC_D; | |
817 | ||
818 | uint8_t b = cmd; | |
819 | for(i = 0; i < 4; i++) { | |
820 | if(b & 1) { | |
821 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 822 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
823 | } else { |
824 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 825 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
826 | } |
827 | b >>= 1; | |
828 | } | |
829 | ||
830 | // Send stopbit | |
831 | ToSend[++ToSendMax] = SEC_F; | |
832 | ||
5f6d6c90 | 833 | // Convert from last byte pos to length |
834 | ToSendMax++; | |
15c4dc5a | 835 | } |
836 | ||
837 | //----------------------------------------------------------------------------- | |
838 | // Wait for commands from reader | |
839 | // Stop when button is pressed | |
840 | // Or return TRUE when command is captured | |
841 | //----------------------------------------------------------------------------- | |
a501c82b | 842 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) |
15c4dc5a | 843 | { |
844 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
845 | // only, since we are receiving, not transmitting). | |
846 | // Signal field is off with the appropriate LED | |
847 | LED_D_OFF(); | |
848 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
849 | ||
850 | // Now run a `software UART' on the stream of incoming samples. | |
a501c82b | 851 | UartInit(received, parity); |
7bc95e2e | 852 | |
853 | // clear RXRDY: | |
854 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 855 | |
856 | for(;;) { | |
857 | WDT_HIT(); | |
858 | ||
859 | if(BUTTON_PRESS()) return FALSE; | |
7bc95e2e | 860 | |
15c4dc5a | 861 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 862 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
863 | if(MillerDecoding(b, 0)) { | |
864 | *len = Uart.len; | |
15c4dc5a | 865 | return TRUE; |
866 | } | |
7bc95e2e | 867 | } |
15c4dc5a | 868 | } |
869 | } | |
28afbd2b | 870 | |
a501c82b | 871 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded); |
7bc95e2e | 872 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded); |
28afbd2b | 873 | int EmSend4bit(uint8_t resp); |
a501c82b | 874 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par); |
875 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded); | |
876 | int EmSendCmd(uint8_t *resp, uint16_t respLen); | |
877 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par); | |
878 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, | |
879 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity); | |
15c4dc5a | 880 | |
ce02f6f9 | 881 | static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); |
882 | ||
883 | typedef struct { | |
884 | uint8_t* response; | |
885 | size_t response_n; | |
886 | uint8_t* modulation; | |
887 | size_t modulation_n; | |
7bc95e2e | 888 | uint32_t ProxToAirDuration; |
ce02f6f9 | 889 | } tag_response_info_t; |
890 | ||
891 | void reset_free_buffer() { | |
892 | free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); | |
893 | } | |
894 | ||
895 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { | |
7bc95e2e | 896 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 897 | // This will need the following byte array for a modulation sequence |
898 | // 144 data bits (18 * 8) | |
899 | // 18 parity bits | |
900 | // 2 Start and stop | |
901 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
902 | // 1 just for the case | |
903 | // ----------- + | |
904 | // 166 bytes, since every bit that needs to be send costs us a byte | |
905 | // | |
906 | ||
907 | // Prepare the tag modulation bits from the message | |
908 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
909 | ||
910 | // Make sure we do not exceed the free buffer space | |
911 | if (ToSendMax > max_buffer_size) { | |
912 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
913 | Dbhexdump(response_info->response_n,response_info->response,false); | |
914 | return false; | |
915 | } | |
916 | ||
917 | // Copy the byte array, used for this modulation to the buffer position | |
918 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
919 | ||
7bc95e2e | 920 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them |
ce02f6f9 | 921 | response_info->modulation_n = ToSendMax; |
7bc95e2e | 922 | response_info->ProxToAirDuration = LastProxToAirDuration; |
ce02f6f9 | 923 | |
924 | return true; | |
925 | } | |
926 | ||
927 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { | |
928 | // Retrieve and store the current buffer index | |
929 | response_info->modulation = free_buffer_pointer; | |
930 | ||
931 | // Determine the maximum size we can use from our buffer | |
a501c82b | 932 | size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer; |
ce02f6f9 | 933 | |
934 | // Forward the prepare tag modulation function to the inner function | |
935 | if (prepare_tag_modulation(response_info,max_buffer_size)) { | |
936 | // Update the free buffer offset | |
937 | free_buffer_pointer += ToSendMax; | |
938 | return true; | |
939 | } else { | |
940 | return false; | |
941 | } | |
942 | } | |
943 | ||
15c4dc5a | 944 | //----------------------------------------------------------------------------- |
945 | // Main loop of simulated tag: receive commands from reader, decide what | |
946 | // response to send, and send it. | |
947 | //----------------------------------------------------------------------------- | |
28afbd2b | 948 | void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data) |
15c4dc5a | 949 | { |
5f6d6c90 | 950 | // Enable and clear the trace |
5f6d6c90 | 951 | iso14a_clear_trace(); |
7bc95e2e | 952 | iso14a_set_tracing(TRUE); |
81cd0474 | 953 | |
81cd0474 | 954 | uint8_t sak; |
955 | ||
956 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). | |
957 | uint8_t response1[2]; | |
958 | ||
959 | switch (tagType) { | |
960 | case 1: { // MIFARE Classic | |
961 | // Says: I am Mifare 1k - original line | |
962 | response1[0] = 0x04; | |
963 | response1[1] = 0x00; | |
964 | sak = 0x08; | |
965 | } break; | |
966 | case 2: { // MIFARE Ultralight | |
967 | // Says: I am a stupid memory tag, no crypto | |
968 | response1[0] = 0x04; | |
969 | response1[1] = 0x00; | |
970 | sak = 0x00; | |
971 | } break; | |
972 | case 3: { // MIFARE DESFire | |
973 | // Says: I am a DESFire tag, ph33r me | |
974 | response1[0] = 0x04; | |
975 | response1[1] = 0x03; | |
976 | sak = 0x20; | |
977 | } break; | |
978 | case 4: { // ISO/IEC 14443-4 | |
979 | // Says: I am a javacard (JCOP) | |
980 | response1[0] = 0x04; | |
981 | response1[1] = 0x00; | |
982 | sak = 0x28; | |
983 | } break; | |
95e63594 | 984 | case 5: { // MIFARE TNP3XXX |
985 | // Says: I am a toy | |
986 | response1[0] = 0x01; | |
987 | response1[1] = 0x0f; | |
988 | sak = 0x01; | |
989 | } break; | |
81cd0474 | 990 | default: { |
991 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
992 | return; | |
993 | } break; | |
994 | } | |
995 | ||
996 | // The second response contains the (mandatory) first 24 bits of the UID | |
997 | uint8_t response2[5]; | |
998 | ||
999 | // Check if the uid uses the (optional) part | |
1000 | uint8_t response2a[5]; | |
1001 | if (uid_2nd) { | |
1002 | response2[0] = 0x88; | |
1003 | num_to_bytes(uid_1st,3,response2+1); | |
1004 | num_to_bytes(uid_2nd,4,response2a); | |
1005 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; | |
1006 | ||
1007 | // Configure the ATQA and SAK accordingly | |
1008 | response1[0] |= 0x40; | |
1009 | sak |= 0x04; | |
1010 | } else { | |
1011 | num_to_bytes(uid_1st,4,response2); | |
1012 | // Configure the ATQA and SAK accordingly | |
1013 | response1[0] &= 0xBF; | |
1014 | sak &= 0xFB; | |
1015 | } | |
1016 | ||
1017 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
1018 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
1019 | ||
1020 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
1021 | uint8_t response3[3]; | |
1022 | response3[0] = sak; | |
1023 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); | |
1024 | ||
1025 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
1026 | uint8_t response3a[3]; | |
1027 | response3a[0] = sak & 0xFB; | |
1028 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
1029 | ||
254b70a4 | 1030 | uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce |
a501c82b | 1031 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: |
1032 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, | |
1033 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
1034 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
1035 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 1036 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
1037 | ||
7bc95e2e | 1038 | #define TAG_RESPONSE_COUNT 7 |
1039 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { | |
1040 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
1041 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
1042 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
1043 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
1044 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
1045 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1046 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
1047 | }; | |
1048 | ||
1049 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1050 | // Such a response is less time critical, so we can prepare them on the fly | |
1051 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1052 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1053 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1054 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1055 | tag_response_info_t dynamic_response_info = { | |
1056 | .response = dynamic_response_buffer, | |
1057 | .response_n = 0, | |
1058 | .modulation = dynamic_modulation_buffer, | |
1059 | .modulation_n = 0 | |
1060 | }; | |
ce02f6f9 | 1061 | |
7bc95e2e | 1062 | // Reset the offset pointer of the free buffer |
1063 | reset_free_buffer(); | |
ce02f6f9 | 1064 | |
7bc95e2e | 1065 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1066 | // there will be not enough time to do this at the moment the reader sends it REQA |
7bc95e2e | 1067 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) { |
1068 | prepare_allocated_tag_modulation(&responses[i]); | |
1069 | } | |
15c4dc5a | 1070 | |
7bc95e2e | 1071 | int len = 0; |
15c4dc5a | 1072 | |
1073 | // To control where we are in the protocol | |
1074 | int order = 0; | |
1075 | int lastorder; | |
1076 | ||
1077 | // Just to allow some checks | |
1078 | int happened = 0; | |
1079 | int happened2 = 0; | |
81cd0474 | 1080 | int cmdsRecvd = 0; |
15c4dc5a | 1081 | |
254b70a4 | 1082 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 1083 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
15c4dc5a | 1084 | |
a501c82b | 1085 | // buffers used on software Uart: |
1086 | uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET; | |
1087 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; | |
1088 | ||
254b70a4 | 1089 | cmdsRecvd = 0; |
7bc95e2e | 1090 | tag_response_info_t* p_response; |
15c4dc5a | 1091 | |
254b70a4 | 1092 | LED_A_ON(); |
1093 | for(;;) { | |
7bc95e2e | 1094 | // Clean receive command buffer |
1095 | ||
a501c82b | 1096 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1097 | DbpString("Button press"); |
a501c82b | 1098 | break; |
254b70a4 | 1099 | } |
7bc95e2e | 1100 | |
1101 | p_response = NULL; | |
1102 | ||
254b70a4 | 1103 | // Okay, look at the command now. |
1104 | lastorder = order; | |
1105 | if(receivedCmd[0] == 0x26) { // Received a REQUEST | |
ce02f6f9 | 1106 | p_response = &responses[0]; order = 1; |
254b70a4 | 1107 | } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP |
ce02f6f9 | 1108 | p_response = &responses[0]; order = 6; |
254b70a4 | 1109 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1) |
ce02f6f9 | 1110 | p_response = &responses[1]; order = 2; |
a501c82b | 1111 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2) |
ce02f6f9 | 1112 | p_response = &responses[2]; order = 20; |
254b70a4 | 1113 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1114 | p_response = &responses[3]; order = 3; |
254b70a4 | 1115 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2) |
ce02f6f9 | 1116 | p_response = &responses[4]; order = 30; |
254b70a4 | 1117 | } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ |
a501c82b | 1118 | EmSendCmdEx(data+(4*receivedCmd[1]),16,false); |
7bc95e2e | 1119 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
5f6d6c90 | 1120 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
7bc95e2e | 1121 | p_response = NULL; |
254b70a4 | 1122 | } else if(receivedCmd[0] == 0x50) { // Received a HALT |
a501c82b | 1123 | |
7bc95e2e | 1124 | if (tracing) { |
a501c82b | 1125 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1126 | } |
1127 | p_response = NULL; | |
254b70a4 | 1128 | } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request |
ce02f6f9 | 1129 | p_response = &responses[5]; order = 7; |
254b70a4 | 1130 | } else if(receivedCmd[0] == 0xE0) { // Received a RATS request |
7bc95e2e | 1131 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1132 | EmSend4bit(CARD_NACK_NA); | |
1133 | p_response = NULL; | |
1134 | } else { | |
1135 | p_response = &responses[6]; order = 70; | |
1136 | } | |
a501c82b | 1137 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
7bc95e2e | 1138 | if (tracing) { |
a501c82b | 1139 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1140 | } |
1141 | uint32_t nr = bytes_to_num(receivedCmd,4); | |
1142 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
1143 | Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar); | |
1144 | } else { | |
1145 | // Check for ISO 14443A-4 compliant commands, look at left nibble | |
1146 | switch (receivedCmd[0]) { | |
1147 | ||
1148 | case 0x0B: | |
1149 | case 0x0A: { // IBlock (command) | |
1150 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1151 | dynamic_response_info.response[1] = 0x00; | |
1152 | dynamic_response_info.response[2] = 0x90; | |
1153 | dynamic_response_info.response[3] = 0x00; | |
1154 | dynamic_response_info.response_n = 4; | |
1155 | } break; | |
1156 | ||
1157 | case 0x1A: | |
1158 | case 0x1B: { // Chaining command | |
1159 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1160 | dynamic_response_info.response_n = 2; | |
1161 | } break; | |
1162 | ||
1163 | case 0xaa: | |
1164 | case 0xbb: { | |
1165 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1166 | dynamic_response_info.response_n = 2; | |
1167 | } break; | |
1168 | ||
1169 | case 0xBA: { // | |
1170 | memcpy(dynamic_response_info.response,"\xAB\x00",2); | |
1171 | dynamic_response_info.response_n = 2; | |
1172 | } break; | |
1173 | ||
1174 | case 0xCA: | |
1175 | case 0xC2: { // Readers sends deselect command | |
1176 | memcpy(dynamic_response_info.response,"\xCA\x00",2); | |
1177 | dynamic_response_info.response_n = 2; | |
1178 | } break; | |
1179 | ||
1180 | default: { | |
1181 | // Never seen this command before | |
1182 | if (tracing) { | |
a501c82b | 1183 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1184 | } |
1185 | Dbprintf("Received unknown command (len=%d):",len); | |
1186 | Dbhexdump(len,receivedCmd,false); | |
1187 | // Do not respond | |
1188 | dynamic_response_info.response_n = 0; | |
1189 | } break; | |
1190 | } | |
ce02f6f9 | 1191 | |
7bc95e2e | 1192 | if (dynamic_response_info.response_n > 0) { |
1193 | // Copy the CID from the reader query | |
1194 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1195 | |
7bc95e2e | 1196 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1197 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1198 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1199 | |
7bc95e2e | 1200 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1201 | Dbprintf("Error preparing tag response"); | |
1202 | if (tracing) { | |
a501c82b | 1203 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1204 | } |
1205 | break; | |
1206 | } | |
1207 | p_response = &dynamic_response_info; | |
1208 | } | |
81cd0474 | 1209 | } |
15c4dc5a | 1210 | |
1211 | // Count number of wakeups received after a halt | |
1212 | if(order == 6 && lastorder == 5) { happened++; } | |
1213 | ||
1214 | // Count number of other messages after a halt | |
1215 | if(order != 6 && lastorder == 5) { happened2++; } | |
1216 | ||
15c4dc5a | 1217 | if(cmdsRecvd > 999) { |
1218 | DbpString("1000 commands later..."); | |
254b70a4 | 1219 | break; |
15c4dc5a | 1220 | } |
ce02f6f9 | 1221 | cmdsRecvd++; |
1222 | ||
1223 | if (p_response != NULL) { | |
7bc95e2e | 1224 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1225 | // do the tracing for the previous reader request and this tag answer: | |
a501c82b | 1226 | uint8_t par[MAX_PARITY_SIZE]; |
1227 | GetParity(p_response->response, p_response->response_n, par); | |
1228 | ||
7bc95e2e | 1229 | EmLogTrace(Uart.output, |
1230 | Uart.len, | |
1231 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1232 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
a501c82b | 1233 | Uart.parity, |
7bc95e2e | 1234 | p_response->response, |
1235 | p_response->response_n, | |
1236 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1237 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
a501c82b | 1238 | par); |
7bc95e2e | 1239 | } |
1240 | ||
1241 | if (!tracing) { | |
1242 | Dbprintf("Trace Full. Simulation stopped."); | |
1243 | break; | |
1244 | } | |
1245 | } | |
15c4dc5a | 1246 | |
1247 | Dbprintf("%x %x %x", happened, happened2, cmdsRecvd); | |
1248 | LED_A_OFF(); | |
1249 | } | |
1250 | ||
9492e0b0 | 1251 | |
1252 | // prepare a delayed transfer. This simply shifts ToSend[] by a number | |
1253 | // of bits specified in the delay parameter. | |
1254 | void PrepareDelayedTransfer(uint16_t delay) | |
1255 | { | |
1256 | uint8_t bitmask = 0; | |
1257 | uint8_t bits_to_shift = 0; | |
1258 | uint8_t bits_shifted = 0; | |
1259 | ||
1260 | delay &= 0x07; | |
1261 | if (delay) { | |
1262 | for (uint16_t i = 0; i < delay; i++) { | |
1263 | bitmask |= (0x01 << i); | |
1264 | } | |
7bc95e2e | 1265 | ToSend[ToSendMax++] = 0x00; |
9492e0b0 | 1266 | for (uint16_t i = 0; i < ToSendMax; i++) { |
1267 | bits_to_shift = ToSend[i] & bitmask; | |
1268 | ToSend[i] = ToSend[i] >> delay; | |
1269 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1270 | bits_shifted = bits_to_shift; | |
1271 | } | |
1272 | } | |
1273 | } | |
1274 | ||
7bc95e2e | 1275 | |
1276 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1277 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1278 | // Parameter timing: |
7bc95e2e | 1279 | // if NULL: transfer at next possible time, taking into account |
1280 | // request guard time and frame delay time | |
1281 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1282 | // if != 0: delay transfer until time specified |
7bc95e2e | 1283 | //------------------------------------------------------------------------------------- |
a501c82b | 1284 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) |
15c4dc5a | 1285 | { |
7bc95e2e | 1286 | |
9492e0b0 | 1287 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1288 | |
7bc95e2e | 1289 | uint32_t ThisTransferTime = 0; |
e30c654b | 1290 | |
9492e0b0 | 1291 | if (timing) { |
1292 | if(*timing == 0) { // Measure time | |
7bc95e2e | 1293 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
9492e0b0 | 1294 | } else { |
1295 | PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1296 | } | |
7bc95e2e | 1297 | if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing"); |
1298 | while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks) | |
1299 | LastTimeProxToAirStart = *timing; | |
1300 | } else { | |
1301 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
1302 | while(GetCountSspClk() < ThisTransferTime); | |
1303 | LastTimeProxToAirStart = ThisTransferTime; | |
9492e0b0 | 1304 | } |
1305 | ||
7bc95e2e | 1306 | // clear TXRDY |
1307 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1308 | ||
7bc95e2e | 1309 | uint16_t c = 0; |
9492e0b0 | 1310 | for(;;) { |
1311 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1312 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
1313 | c++; | |
1314 | if(c >= len) { | |
1315 | break; | |
1316 | } | |
1317 | } | |
1318 | } | |
7bc95e2e | 1319 | |
f6c18637 | 1320 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); |
15c4dc5a | 1321 | } |
1322 | ||
7bc95e2e | 1323 | |
15c4dc5a | 1324 | //----------------------------------------------------------------------------- |
195af472 | 1325 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1326 | //----------------------------------------------------------------------------- |
a501c82b | 1327 | void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, uint16_t bits, const uint8_t *parity) |
15c4dc5a | 1328 | { |
7bc95e2e | 1329 | int i, j; |
1330 | int last; | |
1331 | uint8_t b; | |
e30c654b | 1332 | |
7bc95e2e | 1333 | ToSendReset(); |
e30c654b | 1334 | |
7bc95e2e | 1335 | // Start of Communication (Seq. Z) |
1336 | ToSend[++ToSendMax] = SEC_Z; | |
1337 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1338 | last = 0; | |
1339 | ||
1340 | size_t bytecount = nbytes(bits); | |
1341 | // Generate send structure for the data bits | |
1342 | for (i = 0; i < bytecount; i++) { | |
1343 | // Get the current byte to send | |
1344 | b = cmd[i]; | |
1345 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1346 | ||
1347 | for (j = 0; j < bitsleft; j++) { | |
1348 | if (b & 1) { | |
1349 | // Sequence X | |
1350 | ToSend[++ToSendMax] = SEC_X; | |
1351 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1352 | last = 1; | |
1353 | } else { | |
1354 | if (last == 0) { | |
1355 | // Sequence Z | |
1356 | ToSend[++ToSendMax] = SEC_Z; | |
1357 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1358 | } else { | |
1359 | // Sequence Y | |
1360 | ToSend[++ToSendMax] = SEC_Y; | |
1361 | last = 0; | |
1362 | } | |
1363 | } | |
1364 | b >>= 1; | |
1365 | } | |
1366 | ||
a501c82b | 1367 | // Only transmit parity bit if we transmitted a complete byte |
7bc95e2e | 1368 | if (j == 8) { |
1369 | // Get the parity bit | |
a501c82b | 1370 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1371 | // Sequence X |
1372 | ToSend[++ToSendMax] = SEC_X; | |
1373 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1374 | last = 1; | |
1375 | } else { | |
1376 | if (last == 0) { | |
1377 | // Sequence Z | |
1378 | ToSend[++ToSendMax] = SEC_Z; | |
1379 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1380 | } else { | |
1381 | // Sequence Y | |
1382 | ToSend[++ToSendMax] = SEC_Y; | |
1383 | last = 0; | |
1384 | } | |
1385 | } | |
1386 | } | |
1387 | } | |
e30c654b | 1388 | |
7bc95e2e | 1389 | // End of Communication: Logic 0 followed by Sequence Y |
1390 | if (last == 0) { | |
1391 | // Sequence Z | |
1392 | ToSend[++ToSendMax] = SEC_Z; | |
1393 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1394 | } else { | |
1395 | // Sequence Y | |
1396 | ToSend[++ToSendMax] = SEC_Y; | |
1397 | last = 0; | |
1398 | } | |
1399 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1400 | |
7bc95e2e | 1401 | // Convert to length of command: |
1402 | ToSendMax++; | |
15c4dc5a | 1403 | } |
1404 | ||
195af472 | 1405 | //----------------------------------------------------------------------------- |
1406 | // Prepare reader command to send to FPGA | |
1407 | //----------------------------------------------------------------------------- | |
a501c82b | 1408 | void CodeIso14443aAsReaderPar(const uint8_t * cmd, uint16_t len, const uint8_t *parity) |
195af472 | 1409 | { |
a501c82b | 1410 | CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
195af472 | 1411 | } |
1412 | ||
9ca155ba M |
1413 | //----------------------------------------------------------------------------- |
1414 | // Wait for commands from reader | |
1415 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1416 | // Or return 0 when command is captured | |
1417 | //----------------------------------------------------------------------------- | |
a501c82b | 1418 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) |
9ca155ba M |
1419 | { |
1420 | *len = 0; | |
1421 | ||
1422 | uint32_t timer = 0, vtime = 0; | |
1423 | int analogCnt = 0; | |
1424 | int analogAVG = 0; | |
1425 | ||
1426 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1427 | // only, since we are receiving, not transmitting). | |
1428 | // Signal field is off with the appropriate LED | |
1429 | LED_D_OFF(); | |
1430 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1431 | ||
1432 | // Set ADC to read field strength | |
1433 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1434 | AT91C_BASE_ADC->ADC_MR = | |
1435 | ADC_MODE_PRESCALE(32) | | |
1436 | ADC_MODE_STARTUP_TIME(16) | | |
1437 | ADC_MODE_SAMPLE_HOLD_TIME(8); | |
1438 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); | |
1439 | // start ADC | |
1440 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1441 | ||
1442 | // Now run a 'software UART' on the stream of incoming samples. | |
a501c82b | 1443 | UartInit(received, parity); |
7bc95e2e | 1444 | |
1445 | // Clear RXRDY: | |
1446 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba M |
1447 | |
1448 | for(;;) { | |
1449 | WDT_HIT(); | |
1450 | ||
1451 | if (BUTTON_PRESS()) return 1; | |
1452 | ||
1453 | // test if the field exists | |
1454 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1455 | analogCnt++; | |
1456 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1457 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1458 | if (analogCnt >= 32) { | |
1459 | if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { | |
1460 | vtime = GetTickCount(); | |
1461 | if (!timer) timer = vtime; | |
1462 | // 50ms no field --> card to idle state | |
1463 | if (vtime - timer > 50) return 2; | |
1464 | } else | |
1465 | if (timer) timer = 0; | |
1466 | analogCnt = 0; | |
1467 | analogAVG = 0; | |
1468 | } | |
1469 | } | |
7bc95e2e | 1470 | |
9ca155ba | 1471 | // receive and test the miller decoding |
7bc95e2e | 1472 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1473 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1474 | if(MillerDecoding(b, 0)) { | |
1475 | *len = Uart.len; | |
9ca155ba M |
1476 | return 0; |
1477 | } | |
7bc95e2e | 1478 | } |
1479 | ||
9ca155ba M |
1480 | } |
1481 | } | |
1482 | ||
9ca155ba | 1483 | |
a501c82b | 1484 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) |
7bc95e2e | 1485 | { |
1486 | uint8_t b; | |
1487 | uint16_t i = 0; | |
1488 | uint32_t ThisTransferTime; | |
1489 | ||
9ca155ba M |
1490 | // Modulate Manchester |
1491 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1492 | |
1493 | // include correction bit if necessary | |
1494 | if (Uart.parityBits & 0x01) { | |
1495 | correctionNeeded = TRUE; | |
1496 | } | |
1497 | if(correctionNeeded) { | |
9ca155ba M |
1498 | // 1236, so correction bit needed |
1499 | i = 0; | |
7bc95e2e | 1500 | } else { |
1501 | i = 1; | |
9ca155ba | 1502 | } |
7bc95e2e | 1503 | |
d714d3ef | 1504 | // clear receiving shift register and holding register |
7bc95e2e | 1505 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1506 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1507 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1508 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1509 | |
7bc95e2e | 1510 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
1511 | for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never | |
1512 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1513 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1514 | } | |
1515 | ||
1516 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1517 | ||
1518 | // Clear TXRDY: | |
1519 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1520 | ||
9ca155ba | 1521 | // send cycle |
7bc95e2e | 1522 | for(; i <= respLen; ) { |
9ca155ba | 1523 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1524 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1525 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1526 | } |
7bc95e2e | 1527 | |
9ca155ba M |
1528 | if(BUTTON_PRESS()) { |
1529 | break; | |
1530 | } | |
1531 | } | |
1532 | ||
7bc95e2e | 1533 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
1534 | for (i = 0; i < 2 ; ) { | |
1535 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1536 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1537 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1538 | i++; | |
1539 | } | |
1540 | } | |
1541 | ||
1542 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); | |
1543 | ||
9ca155ba M |
1544 | return 0; |
1545 | } | |
1546 | ||
7bc95e2e | 1547 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1548 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1549 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1550 | // do the tracing for the previous reader request and this tag answer: |
a501c82b | 1551 | uint8_t par[1]; |
1552 | GetParity(&resp, 1, par); | |
7bc95e2e | 1553 | EmLogTrace(Uart.output, |
1554 | Uart.len, | |
1555 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1556 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
a501c82b | 1557 | Uart.parity, |
7bc95e2e | 1558 | &resp, |
1559 | 1, | |
1560 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1561 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
a501c82b | 1562 | par); |
0a39986e | 1563 | return res; |
9ca155ba M |
1564 | } |
1565 | ||
8f51ddb0 | 1566 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1567 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1568 | } |
1569 | ||
a501c82b | 1570 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1571 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1572 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1573 | // do the tracing for the previous reader request and this tag answer: |
1574 | EmLogTrace(Uart.output, | |
1575 | Uart.len, | |
1576 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1577 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
a501c82b | 1578 | Uart.parity, |
7bc95e2e | 1579 | resp, |
1580 | respLen, | |
1581 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1582 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
a501c82b | 1583 | par); |
8f51ddb0 M |
1584 | return res; |
1585 | } | |
1586 | ||
a501c82b | 1587 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
1588 | uint8_t par[MAX_PARITY_SIZE]; | |
1589 | GetParity(resp, respLen, par); | |
1590 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 | 1591 | } |
a501c82b | 1592 | |
1593 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ | |
1594 | uint8_t par[MAX_PARITY_SIZE]; | |
1595 | GetParity(resp, respLen, par); | |
1596 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1597 | } |
1598 | ||
a501c82b | 1599 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1600 | return EmSendCmdExPar(resp, respLen, false, par); |
1601 | } | |
1602 | ||
a501c82b | 1603 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1604 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1605 | { |
f5ed4d12 | 1606 | if (tracing) { |
a501c82b | 1607 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from |
1608 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1609 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1610 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1611 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1612 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1613 | reader_EndTime = tag_StartTime - exact_fdt; | |
1614 | reader_StartTime = reader_EndTime - reader_modlen; | |
1615 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) { | |
1616 | return FALSE; | |
f5ed4d12 | 1617 | } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE)); |
1618 | } else { | |
1619 | return TRUE; | |
1620 | } | |
9ca155ba M |
1621 | } |
1622 | ||
15c4dc5a | 1623 | //----------------------------------------------------------------------------- |
1624 | // Wait a certain time for tag response | |
1625 | // If a response is captured return TRUE | |
e691fc45 | 1626 | // If it takes too long return FALSE |
15c4dc5a | 1627 | //----------------------------------------------------------------------------- |
a501c82b | 1628 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) |
15c4dc5a | 1629 | { |
7bc95e2e | 1630 | uint16_t c; |
e691fc45 | 1631 | |
15c4dc5a | 1632 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1633 | // only, since we are receiving, not transmitting). |
1634 | // Signal field is on with the appropriate LED | |
1635 | LED_D_ON(); | |
1636 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1637 | |
534983d7 | 1638 | // Now get the answer from the card |
a501c82b | 1639 | DemodInit(receivedResponse, receivedResponsePar); |
1640 | ||
7bc95e2e | 1641 | // clear RXRDY: |
1642 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1643 | ||
15c4dc5a | 1644 | c = 0; |
1645 | for(;;) { | |
534983d7 | 1646 | WDT_HIT(); |
15c4dc5a | 1647 | |
534983d7 | 1648 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1649 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1650 | if(ManchesterDecoding(b, offset, 0)) { |
1651 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
15c4dc5a | 1652 | return TRUE; |
a501c82b | 1653 | } else if (c++ > iso14a_timeout) { |
7bc95e2e | 1654 | return FALSE; |
15c4dc5a | 1655 | } |
534983d7 | 1656 | } |
1657 | } | |
15c4dc5a | 1658 | } |
1659 | ||
a501c82b | 1660 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) |
15c4dc5a | 1661 | { |
a501c82b | 1662 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
dfc3c505 | 1663 | |
7bc95e2e | 1664 | // Send command to tag |
1665 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
1666 | if(trigger) | |
1667 | LED_A_ON(); | |
dfc3c505 | 1668 | |
7bc95e2e | 1669 | // Log reader command in trace buffer |
1670 | if (tracing) { | |
a501c82b | 1671 | LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE); |
7bc95e2e | 1672 | } |
15c4dc5a | 1673 | } |
1674 | ||
a501c82b | 1675 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) |
dfc3c505 | 1676 | { |
a501c82b | 1677 | ReaderTransmitBitsPar(frame, len*8, par, timing); |
dfc3c505 | 1678 | } |
15c4dc5a | 1679 | |
a501c82b | 1680 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) |
e691fc45 | 1681 | { |
a501c82b | 1682 | // Generate parity and redirect |
1683 | uint8_t par[MAX_PARITY_SIZE]; | |
1684 | GetParity(frame, len/8, par); | |
1685 | ReaderTransmitBitsPar(frame, len, par, timing); | |
e691fc45 | 1686 | } |
1687 | ||
a501c82b | 1688 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) |
15c4dc5a | 1689 | { |
a501c82b | 1690 | // Generate parity and redirect |
1691 | uint8_t par[MAX_PARITY_SIZE]; | |
1692 | GetParity(frame, len, par); | |
1693 | ReaderTransmitBitsPar(frame, len*8, par, timing); | |
15c4dc5a | 1694 | } |
1695 | ||
a501c82b | 1696 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) |
e691fc45 | 1697 | { |
a501c82b | 1698 | if (!GetIso14443aAnswerFromTag(receivedAnswer,parity,offset)) return FALSE; |
7bc95e2e | 1699 | if (tracing) { |
a501c82b | 1700 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1701 | } |
e691fc45 | 1702 | return Demod.len; |
1703 | } | |
1704 | ||
a501c82b | 1705 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) |
15c4dc5a | 1706 | { |
a501c82b | 1707 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE; |
7bc95e2e | 1708 | if (tracing) { |
a501c82b | 1709 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1710 | } |
e691fc45 | 1711 | return Demod.len; |
f89c7050 M |
1712 | } |
1713 | ||
e691fc45 | 1714 | /* performs iso14443a anticollision procedure |
534983d7 | 1715 | * fills the uid pointer unless NULL |
1716 | * fills resp_data unless NULL */ | |
79a73ab2 | 1717 | int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) { |
f5ed4d12 | 1718 | //uint8_t halt[] = { 0x50, 0x00, 0x57, 0xCD }; // HALT |
a501c82b | 1719 | uint8_t wupa[] = { 0x52 }; // WAKE-UP |
1720 | //uint8_t reqa[] = { 0x26 }; // REQUEST A | |
1721 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1722 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1723 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
1724 | uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET; | |
1725 | uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
1726 | ||
1727 | byte_t uid_resp[4]; | |
1728 | size_t uid_resp_len; | |
d3499d36 | 1729 | uint8_t sak = 0x04; // cascade uid |
1730 | int cascade_level = 0; | |
1731 | int len; | |
a501c82b | 1732 | |
d3499d36 | 1733 | // test for the SKYLANDERS TOY. |
1734 | //ReaderTransmit(halt,sizeof(halt), NULL); | |
f5ed4d12 | 1735 | //len = ReaderReceive(resp, resp_par); |
a501c82b | 1736 | |
d3499d36 | 1737 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field |
1738 | ReaderTransmitBitsPar(wupa,7,0, NULL); | |
7bc95e2e | 1739 | |
d3499d36 | 1740 | // Receive the ATQA |
1741 | if(!ReaderReceive(resp, resp_par)) return 0; | |
1742 | ||
1743 | if(p_hi14a_card) { | |
1744 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1745 | p_hi14a_card->uidlen = 0; | |
1746 | memset(p_hi14a_card->uid,0,10); | |
1747 | } | |
5f6d6c90 | 1748 | |
d3499d36 | 1749 | // clear uid |
1750 | if (uid_ptr) { | |
1751 | memset(uid_ptr,0,10); | |
1752 | } | |
79a73ab2 | 1753 | |
ed258538 | 1754 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1755 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1756 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1757 | for(; sak & 0x04; cascade_level++) { | |
1758 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1759 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1760 | ||
1761 | // SELECT_ALL | |
9492e0b0 | 1762 | ReaderTransmit(sel_all,sizeof(sel_all), NULL); |
a501c82b | 1763 | if (!ReaderReceive(resp, resp_par)) return 0; |
5f6d6c90 | 1764 | |
e691fc45 | 1765 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit |
1766 | memset(uid_resp, 0, 4); | |
1767 | uint16_t uid_resp_bits = 0; | |
1768 | uint16_t collision_answer_offset = 0; | |
1769 | // anti-collision-loop: | |
1770 | while (Demod.collisionPos) { | |
1771 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1772 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1773 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
1774 | uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8); | |
1775 | } | |
1776 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1777 | uid_resp_bits++; | |
1778 | // construct anticollosion command: | |
1779 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1780 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1781 | sel_uid[2+i] = uid_resp[i]; | |
1782 | } | |
1783 | collision_answer_offset = uid_resp_bits%8; | |
1784 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
a501c82b | 1785 | if (!ReaderReceiveOffset(resp, collision_answer_offset,resp_par)) return 0; |
e691fc45 | 1786 | } |
1787 | // finally, add the last bits and BCC of the UID | |
1788 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1789 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1790 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
1791 | } | |
1792 | ||
1793 | } else { // no collision, use the response to SELECT_ALL as current uid | |
1794 | memcpy(uid_resp,resp,4); | |
1795 | } | |
1796 | uid_resp_len = 4; | |
95e63594 | 1797 | |
e691fc45 | 1798 | // calculate crypto UID. Always use last 4 Bytes. |
5f6d6c90 | 1799 | if(cuid_ptr) { |
1800 | *cuid_ptr = bytes_to_num(uid_resp, 4); | |
79a73ab2 | 1801 | } |
e30c654b | 1802 | |
ed258538 | 1803 | // Construct SELECT UID command |
e691fc45 | 1804 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) |
1805 | memcpy(sel_uid+2,uid_resp,4); // the UID | |
1806 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC | |
1807 | AppendCrc14443a(sel_uid,7); // calculate and add CRC | |
9492e0b0 | 1808 | ReaderTransmit(sel_uid,sizeof(sel_uid), NULL); |
534983d7 | 1809 | |
ed258538 | 1810 | // Receive the SAK |
a501c82b | 1811 | if (!ReaderReceive(resp, resp_par)) return 0; |
ed258538 | 1812 | sak = resp[0]; |
95e63594 | 1813 | |
d3499d36 | 1814 | // Test if more parts of the uid are coming |
e691fc45 | 1815 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { |
a501c82b | 1816 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: |
1817 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
a501c82b | 1818 | uid_resp[0] = uid_resp[1]; |
1819 | uid_resp[1] = uid_resp[2]; | |
1820 | uid_resp[2] = uid_resp[3]; | |
1821 | ||
1822 | uid_resp_len = 3; | |
79a73ab2 | 1823 | } |
5f6d6c90 | 1824 | |
79a73ab2 | 1825 | if(uid_ptr) { |
1826 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); | |
1827 | } | |
5f6d6c90 | 1828 | |
79a73ab2 | 1829 | if(p_hi14a_card) { |
1830 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
1831 | p_hi14a_card->uidlen += uid_resp_len; | |
1832 | } | |
ed258538 | 1833 | } |
79a73ab2 | 1834 | |
ed258538 | 1835 | if(p_hi14a_card) { |
1836 | p_hi14a_card->sak = sak; | |
1837 | p_hi14a_card->ats_len = 0; | |
1838 | } | |
534983d7 | 1839 | |
d3499d36 | 1840 | if( (sak & 0x20) == 0) { |
1841 | return 2; // non iso14443a compliant tag | |
1842 | } | |
534983d7 | 1843 | |
d3499d36 | 1844 | // Request for answer to select |
1845 | AppendCrc14443a(rats, 2); | |
1846 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 1847 | |
f5ed4d12 | 1848 | len = ReaderReceive(resp, resp_par); |
1849 | if(!len) return 0; | |
5191b3d1 | 1850 | |
d3499d36 | 1851 | if(p_hi14a_card) { |
1852 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
1853 | p_hi14a_card->ats_len = len; | |
1854 | } | |
5f6d6c90 | 1855 | |
d3499d36 | 1856 | // reset the PCB block number |
1857 | iso14_pcb_blocknum = 0; | |
1858 | return 1; | |
7e758047 | 1859 | } |
15c4dc5a | 1860 | |
7bc95e2e | 1861 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 1862 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 1863 | // Set up the synchronous serial port |
1864 | FpgaSetupSsc(); | |
7bc95e2e | 1865 | // connect Demodulated Signal to ADC: |
7e758047 | 1866 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
e30c654b | 1867 | |
7e758047 | 1868 | // Signal field is on with the appropriate LED |
95e63594 | 1869 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) { |
7bc95e2e | 1870 | LED_D_ON(); |
1871 | } else { | |
1872 | LED_D_OFF(); | |
1873 | } | |
1874 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
534983d7 | 1875 | |
7bc95e2e | 1876 | // Start the timer |
1877 | StartCountSspClk(); | |
1878 | ||
1879 | DemodReset(); | |
1880 | UartReset(); | |
1881 | NextTransferTime = 2*DELAY_ARM2AIR_AS_READER; | |
f38a1528 | 1882 | iso14a_set_timeout(1050); // 10ms default 10*105 = |
7e758047 | 1883 | } |
15c4dc5a | 1884 | |
a501c82b | 1885 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
1886 | uint8_t parity[MAX_PARITY_SIZE]; | |
534983d7 | 1887 | uint8_t real_cmd[cmd_len+4]; |
1888 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 1889 | // put block number into the PCB |
1890 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 1891 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
1892 | memcpy(real_cmd+2, cmd, cmd_len); | |
1893 | AppendCrc14443a(real_cmd,cmd_len+2); | |
1894 | ||
9492e0b0 | 1895 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
a501c82b | 1896 | size_t len = ReaderReceive(data, parity); |
b0127e65 | 1897 | uint8_t * data_bytes = (uint8_t *) data; |
1898 | if (!len) | |
1899 | return 0; //DATA LINK ERROR | |
1900 | // if we received an I- or R(ACK)-Block with a block number equal to the | |
1901 | // current block number, toggle the current block number | |
1902 | else if (len >= 4 // PCB+CID+CRC = 4 bytes | |
1903 | && ((data_bytes[0] & 0xC0) == 0 // I-Block | |
1904 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
1905 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
1906 | { | |
1907 | iso14_pcb_blocknum ^= 1; | |
1908 | } | |
1909 | ||
534983d7 | 1910 | return len; |
1911 | } | |
1912 | ||
7e758047 | 1913 | //----------------------------------------------------------------------------- |
1914 | // Read an ISO 14443a tag. Send out commands and store answers. | |
1915 | // | |
1916 | //----------------------------------------------------------------------------- | |
7bc95e2e | 1917 | void ReaderIso14443a(UsbCommand *c) |
7e758047 | 1918 | { |
534983d7 | 1919 | iso14a_command_t param = c->arg[0]; |
7bc95e2e | 1920 | uint8_t *cmd = c->d.asBytes; |
a501c82b | 1921 | size_t len = c->arg[1]; |
1922 | size_t lenbits = c->arg[2]; | |
9492e0b0 | 1923 | uint32_t arg0 = 0; |
1924 | byte_t buf[USB_CMD_DATA_SIZE]; | |
a501c82b | 1925 | uint8_t par[MAX_PARITY_SIZE]; |
902cb3c0 | 1926 | |
5f6d6c90 | 1927 | if(param & ISO14A_CONNECT) { |
1928 | iso14a_clear_trace(); | |
1929 | } | |
e691fc45 | 1930 | |
7bc95e2e | 1931 | iso14a_set_tracing(TRUE); |
e30c654b | 1932 | |
79a73ab2 | 1933 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1934 | iso14a_set_trigger(TRUE); |
9492e0b0 | 1935 | } |
15c4dc5a | 1936 | |
534983d7 | 1937 | if(param & ISO14A_CONNECT) { |
7bc95e2e | 1938 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 1939 | if(!(param & ISO14A_NO_SELECT)) { |
1940 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
1941 | arg0 = iso14443a_select_card(NULL,card,NULL); | |
1942 | cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t)); | |
1943 | } | |
534983d7 | 1944 | } |
e30c654b | 1945 | |
534983d7 | 1946 | if(param & ISO14A_SET_TIMEOUT) { |
313ee67e | 1947 | iso14a_set_timeout(c->arg[2]); |
534983d7 | 1948 | } |
e30c654b | 1949 | |
534983d7 | 1950 | if(param & ISO14A_APDU) { |
902cb3c0 | 1951 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 1952 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1953 | } |
e30c654b | 1954 | |
534983d7 | 1955 | if(param & ISO14A_RAW) { |
1956 | if(param & ISO14A_APPEND_CRC) { | |
1957 | AppendCrc14443a(cmd,len); | |
1958 | len += 2; | |
a501c82b | 1959 | if (lenbits) lenbits += 16; |
15c4dc5a | 1960 | } |
a501c82b | 1961 | if(lenbits>0) { |
1962 | GetParity(cmd, lenbits/8, par); | |
1963 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); | |
5f6d6c90 | 1964 | } else { |
1965 | ReaderTransmit(cmd,len, NULL); | |
1966 | } | |
a501c82b | 1967 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 1968 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1969 | } |
15c4dc5a | 1970 | |
79a73ab2 | 1971 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1972 | iso14a_set_trigger(FALSE); |
9492e0b0 | 1973 | } |
15c4dc5a | 1974 | |
79a73ab2 | 1975 | if(param & ISO14A_NO_DISCONNECT) { |
534983d7 | 1976 | return; |
9492e0b0 | 1977 | } |
15c4dc5a | 1978 | |
15c4dc5a | 1979 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1980 | LEDsoff(); | |
15c4dc5a | 1981 | } |
b0127e65 | 1982 | |
1c611bbd | 1983 | |
1c611bbd | 1984 | // Determine the distance between two nonces. |
1985 | // Assume that the difference is small, but we don't know which is first. | |
1986 | // Therefore try in alternating directions. | |
1987 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
1988 | ||
1989 | uint16_t i; | |
1990 | uint32_t nttmp1, nttmp2; | |
e772353f | 1991 | |
1c611bbd | 1992 | if (nt1 == nt2) return 0; |
1993 | ||
1994 | nttmp1 = nt1; | |
1995 | nttmp2 = nt2; | |
1996 | ||
1997 | for (i = 1; i < 32768; i++) { | |
1998 | nttmp1 = prng_successor(nttmp1, 1); | |
1999 | if (nttmp1 == nt2) return i; | |
2000 | nttmp2 = prng_successor(nttmp2, 1); | |
2001 | if (nttmp2 == nt1) return -i; | |
2002 | } | |
2003 | ||
2004 | return(-99999); // either nt1 or nt2 are invalid nonces | |
e772353f | 2005 | } |
2006 | ||
e772353f | 2007 | |
1c611bbd | 2008 | //----------------------------------------------------------------------------- |
2009 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2010 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2011 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2012 | // (article by Nicolas T. Courtois, 2009) | |
2013 | //----------------------------------------------------------------------------- | |
2014 | void ReaderMifare(bool first_try) | |
2015 | { | |
2016 | // Mifare AUTH | |
2017 | uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b }; | |
2018 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; | |
2019 | static uint8_t mf_nr_ar3; | |
e772353f | 2020 | |
a501c82b | 2021 | uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET); |
2022 | uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET); | |
7bc95e2e | 2023 | |
d2f487af | 2024 | iso14a_clear_trace(); |
7bc95e2e | 2025 | iso14a_set_tracing(TRUE); |
e772353f | 2026 | |
1c611bbd | 2027 | byte_t nt_diff = 0; |
a501c82b | 2028 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
1c611bbd | 2029 | static byte_t par_low = 0; |
2030 | bool led_on = TRUE; | |
a501c82b | 2031 | uint8_t uid[10] ={0}; |
1c611bbd | 2032 | uint32_t cuid; |
e772353f | 2033 | |
a61b4976 | 2034 | uint32_t nt = 0; |
2035 | uint32_t previous_nt = 0; | |
1c611bbd | 2036 | static uint32_t nt_attacked = 0; |
95e63594 | 2037 | byte_t par_list[8] = {0x00}; |
2038 | byte_t ks_list[8] = {0x00}; | |
e772353f | 2039 | |
1c611bbd | 2040 | static uint32_t sync_time; |
2041 | static uint32_t sync_cycles; | |
2042 | int catch_up_cycles = 0; | |
2043 | int last_catch_up = 0; | |
2044 | uint16_t consecutive_resyncs = 0; | |
2045 | int isOK = 0; | |
e772353f | 2046 | |
1c611bbd | 2047 | if (first_try) { |
1c611bbd | 2048 | mf_nr_ar3 = 0; |
7bc95e2e | 2049 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); |
2050 | sync_time = GetCountSspClk() & 0xfffffff8; | |
1c611bbd | 2051 | sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces). |
2052 | nt_attacked = 0; | |
2053 | nt = 0; | |
a501c82b | 2054 | par[0] = 0; |
1c611bbd | 2055 | } |
2056 | else { | |
2057 | // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same) | |
1c611bbd | 2058 | mf_nr_ar3++; |
2059 | mf_nr_ar[3] = mf_nr_ar3; | |
a501c82b | 2060 | par[0] = par_low; |
1c611bbd | 2061 | } |
e30c654b | 2062 | |
15c4dc5a | 2063 | LED_A_ON(); |
2064 | LED_B_OFF(); | |
2065 | LED_C_OFF(); | |
1c611bbd | 2066 | |
7bc95e2e | 2067 | |
1c611bbd | 2068 | for(uint16_t i = 0; TRUE; i++) { |
2069 | ||
2070 | WDT_HIT(); | |
e30c654b | 2071 | |
1c611bbd | 2072 | // Test if the action was cancelled |
2073 | if(BUTTON_PRESS()) { | |
2074 | break; | |
2075 | } | |
2076 | ||
2077 | LED_C_ON(); | |
e30c654b | 2078 | |
1c611bbd | 2079 | if(!iso14443a_select_card(uid, NULL, &cuid)) { |
9492e0b0 | 2080 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card"); |
1c611bbd | 2081 | continue; |
2082 | } | |
2083 | ||
9492e0b0 | 2084 | sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles; |
1c611bbd | 2085 | catch_up_cycles = 0; |
2086 | ||
2087 | // if we missed the sync time already, advance to the next nonce repeat | |
7bc95e2e | 2088 | while(GetCountSspClk() > sync_time) { |
9492e0b0 | 2089 | sync_time = (sync_time & 0xfffffff8) + sync_cycles; |
1c611bbd | 2090 | } |
e30c654b | 2091 | |
9492e0b0 | 2092 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) |
2093 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
f89c7050 | 2094 | |
1c611bbd | 2095 | // Receive the (4 Byte) "random" nonce |
a501c82b | 2096 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2097 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce"); |
1c611bbd | 2098 | continue; |
2099 | } | |
2100 | ||
1c611bbd | 2101 | previous_nt = nt; |
2102 | nt = bytes_to_num(receivedAnswer, 4); | |
2103 | ||
2104 | // Transmit reader nonce with fake par | |
9492e0b0 | 2105 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); |
1c611bbd | 2106 | |
2107 | if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet | |
2108 | int nt_distance = dist_nt(previous_nt, nt); | |
2109 | if (nt_distance == 0) { | |
2110 | nt_attacked = nt; | |
2111 | } | |
2112 | else { | |
2113 | if (nt_distance == -99999) { // invalid nonce received, try again | |
2114 | continue; | |
2115 | } | |
2116 | sync_cycles = (sync_cycles - nt_distance); | |
9492e0b0 | 2117 | if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles); |
1c611bbd | 2118 | continue; |
2119 | } | |
2120 | } | |
2121 | ||
2122 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
2123 | catch_up_cycles = -dist_nt(nt_attacked, nt); | |
2124 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. | |
2125 | catch_up_cycles = 0; | |
2126 | continue; | |
2127 | } | |
2128 | if (catch_up_cycles == last_catch_up) { | |
2129 | consecutive_resyncs++; | |
2130 | } | |
2131 | else { | |
2132 | last_catch_up = catch_up_cycles; | |
2133 | consecutive_resyncs = 0; | |
2134 | } | |
2135 | if (consecutive_resyncs < 3) { | |
9492e0b0 | 2136 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs); |
1c611bbd | 2137 | } |
2138 | else { | |
2139 | sync_cycles = sync_cycles + catch_up_cycles; | |
9492e0b0 | 2140 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles); |
1c611bbd | 2141 | } |
2142 | continue; | |
2143 | } | |
2144 | ||
2145 | consecutive_resyncs = 0; | |
2146 | ||
2147 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding | |
a501c82b | 2148 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) |
1c611bbd | 2149 | { |
9492e0b0 | 2150 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2151 | |
2152 | if (nt_diff == 0) | |
2153 | { | |
a501c82b | 2154 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2155 | } |
2156 | ||
2157 | led_on = !led_on; | |
2158 | if(led_on) LED_B_ON(); else LED_B_OFF(); | |
2159 | ||
a501c82b | 2160 | par_list[nt_diff] = SwapBits(par[0], 8); |
1c611bbd | 2161 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; |
2162 | ||
2163 | // Test if the information is complete | |
2164 | if (nt_diff == 0x07) { | |
2165 | isOK = 1; | |
2166 | break; | |
2167 | } | |
2168 | ||
2169 | nt_diff = (nt_diff + 1) & 0x07; | |
2170 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
a501c82b | 2171 | par[0] = par_low; |
1c611bbd | 2172 | } else { |
2173 | if (nt_diff == 0 && first_try) | |
2174 | { | |
a501c82b | 2175 | par[0]++; |
1c611bbd | 2176 | } else { |
a501c82b | 2177 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2178 | } |
2179 | } | |
2180 | } | |
2181 | ||
1c611bbd | 2182 | |
2183 | mf_nr_ar[3] &= 0x1F; | |
2184 | ||
2185 | byte_t buf[28]; | |
2186 | memcpy(buf + 0, uid, 4); | |
2187 | num_to_bytes(nt, 4, buf + 4); | |
2188 | memcpy(buf + 8, par_list, 8); | |
2189 | memcpy(buf + 16, ks_list, 8); | |
2190 | memcpy(buf + 24, mf_nr_ar, 4); | |
2191 | ||
2192 | cmd_send(CMD_ACK,isOK,0,0,buf,28); | |
2193 | ||
2194 | // Thats it... | |
2195 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2196 | LEDsoff(); | |
7bc95e2e | 2197 | |
2198 | iso14a_set_tracing(FALSE); | |
20f9a2a1 | 2199 | } |
1c611bbd | 2200 | |
d2f487af | 2201 | /** |
2202 | *MIFARE 1K simulate. | |
2203 | * | |
2204 | *@param flags : | |
2205 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK | |
2206 | * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that | |
2207 | * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that | |
2208 | * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later | |
2209 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite | |
2210 | */ | |
2211 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) | |
20f9a2a1 | 2212 | { |
50193c1e | 2213 | int cardSTATE = MFEMUL_NOFIELD; |
8556b852 | 2214 | int _7BUID = 0; |
9ca155ba | 2215 | int vHf = 0; // in mV |
8f51ddb0 | 2216 | int res; |
0a39986e M |
2217 | uint32_t selTimer = 0; |
2218 | uint32_t authTimer = 0; | |
a501c82b | 2219 | uint16_t len = 0; |
8f51ddb0 | 2220 | uint8_t cardWRBL = 0; |
9ca155ba M |
2221 | uint8_t cardAUTHSC = 0; |
2222 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
51969283 | 2223 | uint32_t cardRr = 0; |
9ca155ba | 2224 | uint32_t cuid = 0; |
d2f487af | 2225 | //uint32_t rn_enc = 0; |
51969283 | 2226 | uint32_t ans = 0; |
0014cb46 M |
2227 | uint32_t cardINTREG = 0; |
2228 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2229 | struct Crypto1State mpcs = {0, 0}; |
2230 | struct Crypto1State *pcs; | |
2231 | pcs = &mpcs; | |
d2f487af | 2232 | uint32_t numReads = 0;//Counts numer of times reader read a block |
a501c82b | 2233 | uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf(); |
2234 | uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE; | |
2235 | uint8_t* response = get_bigbufptr_recvrespbuf(); | |
2236 | uint8_t* response_par = response + MAX_FRAME_SIZE; | |
9ca155ba | 2237 | |
d2f487af | 2238 | uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID |
2239 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2240 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!! | |
2241 | uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; | |
2242 | uint8_t rSAK1[] = {0x04, 0xda, 0x17}; | |
9ca155ba | 2243 | |
d2f487af | 2244 | uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04}; |
2245 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; | |
7bc95e2e | 2246 | |
d2f487af | 2247 | //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2 |
2248 | // This can be used in a reader-only attack. | |
2249 | // (it can also be retrieved via 'hf 14a list', but hey... | |
2250 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0}; | |
2251 | uint8_t ar_nr_collected = 0; | |
0014cb46 | 2252 | |
0a39986e | 2253 | // clear trace |
7bc95e2e | 2254 | iso14a_clear_trace(); |
2255 | iso14a_set_tracing(TRUE); | |
51969283 | 2256 | |
7bc95e2e | 2257 | // Authenticate response - nonce |
51969283 | 2258 | uint32_t nonce = bytes_to_num(rAUTH_NT, 4); |
7bc95e2e | 2259 | |
d2f487af | 2260 | //-- Determine the UID |
2261 | // Can be set from emulator memory, incoming data | |
2262 | // and can be 7 or 4 bytes long | |
7bc95e2e | 2263 | if (flags & FLAG_4B_UID_IN_DATA) |
d2f487af | 2264 | { |
2265 | // 4B uid comes from data-portion of packet | |
2266 | memcpy(rUIDBCC1,datain,4); | |
8556b852 | 2267 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
8556b852 | 2268 | |
7bc95e2e | 2269 | } else if (flags & FLAG_7B_UID_IN_DATA) { |
d2f487af | 2270 | // 7B uid comes from data-portion of packet |
2271 | memcpy(&rUIDBCC1[1],datain,3); | |
2272 | memcpy(rUIDBCC2, datain+3, 4); | |
2273 | _7BUID = true; | |
7bc95e2e | 2274 | } else { |
d2f487af | 2275 | // get UID from emul memory |
2276 | emlGetMemBt(receivedCmd, 7, 1); | |
2277 | _7BUID = !(receivedCmd[0] == 0x00); | |
2278 | if (!_7BUID) { // ---------- 4BUID | |
2279 | emlGetMemBt(rUIDBCC1, 0, 4); | |
2280 | } else { // ---------- 7BUID | |
2281 | emlGetMemBt(&rUIDBCC1[1], 0, 3); | |
2282 | emlGetMemBt(rUIDBCC2, 3, 4); | |
2283 | } | |
2284 | } | |
7bc95e2e | 2285 | |
d2f487af | 2286 | /* |
2287 | * Regardless of what method was used to set the UID, set fifth byte and modify | |
2288 | * the ATQA for 4 or 7-byte UID | |
2289 | */ | |
d2f487af | 2290 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
7bc95e2e | 2291 | if (_7BUID) { |
d2f487af | 2292 | rATQA[0] = 0x44; |
8556b852 | 2293 | rUIDBCC1[0] = 0x88; |
8556b852 M |
2294 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; |
2295 | } | |
2296 | ||
9ca155ba | 2297 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 2298 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
9ca155ba | 2299 | |
9ca155ba | 2300 | |
d2f487af | 2301 | if (MF_DBGLEVEL >= 1) { |
2302 | if (!_7BUID) { | |
a501c82b | 2303 | Dbprintf("4B UID: %02x%02x%02x%02x", |
2304 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]); | |
7bc95e2e | 2305 | } else { |
a501c82b | 2306 | Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x", |
2307 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3], | |
2308 | rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]); | |
d2f487af | 2309 | } |
2310 | } | |
7bc95e2e | 2311 | |
2312 | bool finished = FALSE; | |
d2f487af | 2313 | while (!BUTTON_PRESS() && !finished) { |
9ca155ba | 2314 | WDT_HIT(); |
9ca155ba M |
2315 | |
2316 | // find reader field | |
2317 | // Vref = 3300mV, and an 10:1 voltage divider on the input | |
2318 | // can measure voltages up to 33000 mV | |
2319 | if (cardSTATE == MFEMUL_NOFIELD) { | |
2320 | vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10; | |
2321 | if (vHf > MF_MINFIELDV) { | |
0014cb46 | 2322 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2323 | LED_A_ON(); |
2324 | } | |
2325 | } | |
d2f487af | 2326 | if(cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2327 | |
d2f487af | 2328 | //Now, get data |
2329 | ||
a501c82b | 2330 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2331 | if (res == 2) { //Field is off! |
2332 | cardSTATE = MFEMUL_NOFIELD; | |
2333 | LEDsoff(); | |
2334 | continue; | |
7bc95e2e | 2335 | } else if (res == 1) { |
2336 | break; //return value 1 means button press | |
2337 | } | |
2338 | ||
d2f487af | 2339 | // REQ or WUP request in ANY state and WUP in HALTED state |
2340 | if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) { | |
2341 | selTimer = GetTickCount(); | |
2342 | EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52)); | |
2343 | cardSTATE = MFEMUL_SELECT1; | |
2344 | ||
2345 | // init crypto block | |
2346 | LED_B_OFF(); | |
2347 | LED_C_OFF(); | |
2348 | crypto1_destroy(pcs); | |
2349 | cardAUTHKEY = 0xff; | |
2350 | continue; | |
0a39986e | 2351 | } |
7bc95e2e | 2352 | |
50193c1e | 2353 | switch (cardSTATE) { |
d2f487af | 2354 | case MFEMUL_NOFIELD: |
2355 | case MFEMUL_HALTED: | |
50193c1e | 2356 | case MFEMUL_IDLE:{ |
a501c82b | 2357 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
50193c1e M |
2358 | break; |
2359 | } | |
2360 | case MFEMUL_SELECT1:{ | |
9ca155ba M |
2361 | // select all |
2362 | if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) { | |
d2f487af | 2363 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2364 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2365 | break; |
9ca155ba M |
2366 | } |
2367 | ||
d2f487af | 2368 | if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 ) |
2369 | { | |
2370 | Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]); | |
2371 | } | |
9ca155ba | 2372 | // select card |
0a39986e M |
2373 | if (len == 9 && |
2374 | (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
bfb6a143 | 2375 | EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK)); |
9ca155ba | 2376 | cuid = bytes_to_num(rUIDBCC1, 4); |
8556b852 M |
2377 | if (!_7BUID) { |
2378 | cardSTATE = MFEMUL_WORK; | |
0014cb46 M |
2379 | LED_B_ON(); |
2380 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
2381 | break; | |
8556b852 M |
2382 | } else { |
2383 | cardSTATE = MFEMUL_SELECT2; | |
8556b852 | 2384 | } |
9ca155ba | 2385 | } |
50193c1e M |
2386 | break; |
2387 | } | |
d2f487af | 2388 | case MFEMUL_AUTH1:{ |
2389 | if( len != 8) | |
2390 | { | |
2391 | cardSTATE_TO_IDLE(); | |
a501c82b | 2392 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2393 | break; |
2394 | } | |
2395 | uint32_t ar = bytes_to_num(receivedCmd, 4); | |
a501c82b | 2396 | uint32_t nr = bytes_to_num(&receivedCmd[4], 4); |
d2f487af | 2397 | |
2398 | //Collect AR/NR | |
2399 | if(ar_nr_collected < 2){ | |
273b57a7 | 2400 | if(ar_nr_responses[2] != ar) |
2401 | {// Avoid duplicates... probably not necessary, ar should vary. | |
d2f487af | 2402 | ar_nr_responses[ar_nr_collected*4] = cuid; |
2403 | ar_nr_responses[ar_nr_collected*4+1] = nonce; | |
2404 | ar_nr_responses[ar_nr_collected*4+2] = ar; | |
2405 | ar_nr_responses[ar_nr_collected*4+3] = nr; | |
273b57a7 | 2406 | ar_nr_collected++; |
d2f487af | 2407 | } |
2408 | } | |
2409 | ||
2410 | // --- crypto | |
2411 | crypto1_word(pcs, ar , 1); | |
2412 | cardRr = nr ^ crypto1_word(pcs, 0, 0); | |
2413 | ||
2414 | // test if auth OK | |
2415 | if (cardRr != prng_successor(nonce, 64)){ | |
a501c82b | 2416 | if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", |
2417 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2418 | cardRr, prng_successor(nonce, 64)); | |
7bc95e2e | 2419 | // Shouldn't we respond anything here? |
d2f487af | 2420 | // Right now, we don't nack or anything, which causes the |
2421 | // reader to do a WUPA after a while. /Martin | |
b03c0f2d | 2422 | // -- which is the correct response. /piwi |
d2f487af | 2423 | cardSTATE_TO_IDLE(); |
a501c82b | 2424 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2425 | break; |
2426 | } | |
2427 | ||
2428 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); | |
2429 | ||
2430 | num_to_bytes(ans, 4, rAUTH_AT); | |
2431 | // --- crypto | |
2432 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2433 | LED_C_ON(); | |
2434 | cardSTATE = MFEMUL_WORK; | |
b03c0f2d | 2435 | if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", |
2436 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2437 | GetTickCount() - authTimer); | |
d2f487af | 2438 | break; |
2439 | } | |
50193c1e | 2440 | case MFEMUL_SELECT2:{ |
7bc95e2e | 2441 | if (!len) { |
a501c82b | 2442 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2443 | break; |
2444 | } | |
8556b852 | 2445 | if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) { |
9ca155ba | 2446 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); |
8556b852 M |
2447 | break; |
2448 | } | |
9ca155ba | 2449 | |
8556b852 M |
2450 | // select 2 card |
2451 | if (len == 9 && | |
2452 | (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) { | |
2453 | EmSendCmd(rSAK, sizeof(rSAK)); | |
8556b852 M |
2454 | cuid = bytes_to_num(rUIDBCC2, 4); |
2455 | cardSTATE = MFEMUL_WORK; | |
2456 | LED_B_ON(); | |
0014cb46 | 2457 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); |
8556b852 M |
2458 | break; |
2459 | } | |
0014cb46 M |
2460 | |
2461 | // i guess there is a command). go into the work state. | |
7bc95e2e | 2462 | if (len != 4) { |
a501c82b | 2463 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2464 | break; |
2465 | } | |
0014cb46 | 2466 | cardSTATE = MFEMUL_WORK; |
d2f487af | 2467 | //goto lbWORK; |
2468 | //intentional fall-through to the next case-stmt | |
50193c1e | 2469 | } |
51969283 | 2470 | |
7bc95e2e | 2471 | case MFEMUL_WORK:{ |
2472 | if (len == 0) { | |
a501c82b | 2473 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2474 | break; |
2475 | } | |
2476 | ||
d2f487af | 2477 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2478 | ||
7bc95e2e | 2479 | if(encrypted_data) { |
51969283 M |
2480 | // decrypt seqence |
2481 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
d2f487af | 2482 | } |
7bc95e2e | 2483 | |
d2f487af | 2484 | if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) { |
2485 | authTimer = GetTickCount(); | |
2486 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
2487 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
2488 | crypto1_destroy(pcs);//Added by martin | |
2489 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); | |
51969283 | 2490 | |
d2f487af | 2491 | if (!encrypted_data) { // first authentication |
b03c0f2d | 2492 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
51969283 | 2493 | |
d2f487af | 2494 | crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state |
2495 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce | |
7bc95e2e | 2496 | } else { // nested authentication |
b03c0f2d | 2497 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
7bc95e2e | 2498 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2499 | num_to_bytes(ans, 4, rAUTH_AT); |
2500 | } | |
2501 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2502 | //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]); | |
2503 | cardSTATE = MFEMUL_AUTH1; | |
2504 | break; | |
51969283 | 2505 | } |
7bc95e2e | 2506 | |
8f51ddb0 M |
2507 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2508 | // BUT... ACK --> NACK | |
2509 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2510 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2511 | break; | |
2512 | } | |
2513 | ||
2514 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2515 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2516 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2517 | break; | |
0a39986e M |
2518 | } |
2519 | ||
7bc95e2e | 2520 | if(len != 4) { |
a501c82b | 2521 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2522 | break; |
2523 | } | |
d2f487af | 2524 | |
2525 | if(receivedCmd[0] == 0x30 // read block | |
2526 | || receivedCmd[0] == 0xA0 // write block | |
b03c0f2d | 2527 | || receivedCmd[0] == 0xC0 // inc |
2528 | || receivedCmd[0] == 0xC1 // dec | |
2529 | || receivedCmd[0] == 0xC2 // restore | |
7bc95e2e | 2530 | || receivedCmd[0] == 0xB0) { // transfer |
2531 | if (receivedCmd[1] >= 16 * 4) { | |
d2f487af | 2532 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2533 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); | |
2534 | break; | |
2535 | } | |
2536 | ||
7bc95e2e | 2537 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2538 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
d2f487af | 2539 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2540 | break; |
2541 | } | |
d2f487af | 2542 | } |
2543 | // read block | |
2544 | if (receivedCmd[0] == 0x30) { | |
b03c0f2d | 2545 | if (MF_DBGLEVEL >= 4) { |
d2f487af | 2546 | Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]); |
2547 | } | |
8f51ddb0 M |
2548 | emlGetMem(response, receivedCmd[1], 1); |
2549 | AppendCrc14443a(response, 16); | |
a501c82b | 2550 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2551 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2552 | numReads++; |
7bc95e2e | 2553 | if(exitAfterNReads > 0 && numReads == exitAfterNReads) { |
d2f487af | 2554 | Dbprintf("%d reads done, exiting", numReads); |
2555 | finished = true; | |
2556 | } | |
0a39986e M |
2557 | break; |
2558 | } | |
0a39986e | 2559 | // write block |
d2f487af | 2560 | if (receivedCmd[0] == 0xA0) { |
b03c0f2d | 2561 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]); |
8f51ddb0 | 2562 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2563 | cardSTATE = MFEMUL_WRITEBL2; |
2564 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2565 | break; |
7bc95e2e | 2566 | } |
0014cb46 | 2567 | // increment, decrement, restore |
d2f487af | 2568 | if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) { |
b03c0f2d | 2569 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2570 | if (emlCheckValBl(receivedCmd[1])) { |
2571 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); | |
0014cb46 M |
2572 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2573 | break; | |
2574 | } | |
2575 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2576 | if (receivedCmd[0] == 0xC1) | |
2577 | cardSTATE = MFEMUL_INTREG_INC; | |
2578 | if (receivedCmd[0] == 0xC0) | |
2579 | cardSTATE = MFEMUL_INTREG_DEC; | |
2580 | if (receivedCmd[0] == 0xC2) | |
2581 | cardSTATE = MFEMUL_INTREG_REST; | |
2582 | cardWRBL = receivedCmd[1]; | |
0014cb46 M |
2583 | break; |
2584 | } | |
0014cb46 | 2585 | // transfer |
d2f487af | 2586 | if (receivedCmd[0] == 0xB0) { |
b03c0f2d | 2587 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
0014cb46 M |
2588 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2589 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2590 | else | |
2591 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2592 | break; |
2593 | } | |
9ca155ba | 2594 | // halt |
d2f487af | 2595 | if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) { |
9ca155ba | 2596 | LED_B_OFF(); |
0a39986e | 2597 | LED_C_OFF(); |
0014cb46 M |
2598 | cardSTATE = MFEMUL_HALTED; |
2599 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
a501c82b | 2600 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0a39986e | 2601 | break; |
9ca155ba | 2602 | } |
d2f487af | 2603 | // RATS |
2604 | if (receivedCmd[0] == 0xe0) {//RATS | |
8f51ddb0 M |
2605 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2606 | break; | |
2607 | } | |
d2f487af | 2608 | // command not allowed |
2609 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2610 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2611 | break; |
8f51ddb0 M |
2612 | } |
2613 | case MFEMUL_WRITEBL2:{ | |
2614 | if (len == 18){ | |
2615 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2616 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2617 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2618 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2619 | } else { |
0014cb46 | 2620 | cardSTATE_TO_IDLE(); |
a501c82b | 2621 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
8f51ddb0 | 2622 | } |
8f51ddb0 | 2623 | break; |
50193c1e | 2624 | } |
0014cb46 M |
2625 | |
2626 | case MFEMUL_INTREG_INC:{ | |
2627 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2628 | memcpy(&ans, receivedCmd, 4); | |
2629 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2630 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2631 | cardSTATE_TO_IDLE(); | |
2632 | break; | |
7bc95e2e | 2633 | } |
a501c82b | 2634 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2635 | cardINTREG = cardINTREG + ans; |
2636 | cardSTATE = MFEMUL_WORK; | |
2637 | break; | |
2638 | } | |
2639 | case MFEMUL_INTREG_DEC:{ | |
2640 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2641 | memcpy(&ans, receivedCmd, 4); | |
2642 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2643 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2644 | cardSTATE_TO_IDLE(); | |
2645 | break; | |
2646 | } | |
a501c82b | 2647 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2648 | cardINTREG = cardINTREG - ans; |
2649 | cardSTATE = MFEMUL_WORK; | |
2650 | break; | |
2651 | } | |
2652 | case MFEMUL_INTREG_REST:{ | |
2653 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2654 | memcpy(&ans, receivedCmd, 4); | |
2655 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2656 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2657 | cardSTATE_TO_IDLE(); | |
2658 | break; | |
2659 | } | |
a501c82b | 2660 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2661 | cardSTATE = MFEMUL_WORK; |
2662 | break; | |
2663 | } | |
50193c1e | 2664 | } |
50193c1e M |
2665 | } |
2666 | ||
9ca155ba M |
2667 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2668 | LEDsoff(); | |
2669 | ||
d2f487af | 2670 | if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK |
2671 | { | |
2672 | //May just aswell send the collected ar_nr in the response aswell | |
2673 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4); | |
2674 | } | |
d714d3ef | 2675 | |
d2f487af | 2676 | if(flags & FLAG_NR_AR_ATTACK) |
2677 | { | |
7bc95e2e | 2678 | if(ar_nr_collected > 1) { |
d2f487af | 2679 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); |
d714d3ef | 2680 | Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x", |
d2f487af | 2681 | ar_nr_responses[0], // UID |
2682 | ar_nr_responses[1], //NT | |
2683 | ar_nr_responses[2], //AR1 | |
2684 | ar_nr_responses[3], //NR1 | |
2685 | ar_nr_responses[6], //AR2 | |
2686 | ar_nr_responses[7] //NR2 | |
2687 | ); | |
7bc95e2e | 2688 | } else { |
d2f487af | 2689 | Dbprintf("Failed to obtain two AR/NR pairs!"); |
7bc95e2e | 2690 | if(ar_nr_collected >0) { |
d714d3ef | 2691 | Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x", |
d2f487af | 2692 | ar_nr_responses[0], // UID |
2693 | ar_nr_responses[1], //NT | |
2694 | ar_nr_responses[2], //AR1 | |
2695 | ar_nr_responses[3] //NR1 | |
2696 | ); | |
2697 | } | |
2698 | } | |
2699 | } | |
0014cb46 | 2700 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen); |
15c4dc5a | 2701 | } |
b62a5a84 | 2702 | |
d2f487af | 2703 | |
2704 | ||
b62a5a84 M |
2705 | //----------------------------------------------------------------------------- |
2706 | // MIFARE sniffer. | |
2707 | // | |
2708 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
2709 | void RAMFUNC SniffMifare(uint8_t param) { |
2710 | // param: | |
2711 | // bit 0 - trigger from first card answer | |
2712 | // bit 1 - trigger from first reader 7-bit request | |
39864b0b M |
2713 | |
2714 | // C(red) A(yellow) B(green) | |
b62a5a84 M |
2715 | LEDsoff(); |
2716 | // init trace buffer | |
991f13f2 | 2717 | iso14a_clear_trace(); |
2718 | iso14a_set_tracing(TRUE); | |
b62a5a84 | 2719 | |
b62a5a84 M |
2720 | // The command (reader -> tag) that we're receiving. |
2721 | // The length of a received command will in most cases be no more than 18 bytes. | |
2722 | // So 32 should be enough! | |
2723 | uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET); | |
a501c82b | 2724 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; |
b62a5a84 | 2725 | // The response (tag -> reader) that we're receiving. |
a501c82b | 2726 | uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET); |
2727 | uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
2728 | ||
b62a5a84 M |
2729 | // As we receive stuff, we copy it from receivedCmd or receivedResponse |
2730 | // into trace, along with its length and other annotations. | |
2731 | //uint8_t *trace = (uint8_t *)BigBuf; | |
2732 | ||
2733 | // The DMA buffer, used to stream samples from the FPGA | |
7bc95e2e | 2734 | uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET; |
2735 | uint8_t *data = dmaBuf; | |
2736 | uint8_t previous_data = 0; | |
5cd9ec01 M |
2737 | int maxDataLen = 0; |
2738 | int dataLen = 0; | |
7bc95e2e | 2739 | bool ReaderIsActive = FALSE; |
2740 | bool TagIsActive = FALSE; | |
2741 | ||
2742 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
b62a5a84 M |
2743 | |
2744 | // Set up the demodulator for tag -> reader responses. | |
a501c82b | 2745 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
2746 | |
2747 | // Set up the demodulator for the reader -> tag commands | |
a501c82b | 2748 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 M |
2749 | |
2750 | // Setup for the DMA. | |
7bc95e2e | 2751 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
b62a5a84 | 2752 | |
b62a5a84 | 2753 | LED_D_OFF(); |
39864b0b M |
2754 | |
2755 | // init sniffer | |
2756 | MfSniffInit(); | |
b62a5a84 | 2757 | |
b62a5a84 | 2758 | // And now we loop, receiving samples. |
7bc95e2e | 2759 | for(uint32_t sniffCounter = 0; TRUE; ) { |
2760 | ||
5cd9ec01 M |
2761 | if(BUTTON_PRESS()) { |
2762 | DbpString("cancelled by button"); | |
7bc95e2e | 2763 | break; |
5cd9ec01 M |
2764 | } |
2765 | ||
b62a5a84 M |
2766 | LED_A_ON(); |
2767 | WDT_HIT(); | |
39864b0b | 2768 | |
7bc95e2e | 2769 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
2770 | // check if a transaction is completed (timeout after 2000ms). | |
2771 | // if yes, stop the DMA transfer and send what we have so far to the client | |
2772 | if (MfSniffSend(2000)) { | |
2773 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
2774 | sniffCounter = 0; | |
2775 | data = dmaBuf; | |
2776 | maxDataLen = 0; | |
2777 | ReaderIsActive = FALSE; | |
2778 | TagIsActive = FALSE; | |
2779 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. | |
39864b0b | 2780 | } |
39864b0b | 2781 | } |
7bc95e2e | 2782 | |
2783 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
2784 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
2785 | if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred | |
2786 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed | |
2787 | } else { | |
2788 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed | |
5cd9ec01 M |
2789 | } |
2790 | // test for length of buffer | |
7bc95e2e | 2791 | if(dataLen > maxDataLen) { // we are more behind than ever... |
2792 | maxDataLen = dataLen; | |
5cd9ec01 M |
2793 | if(dataLen > 400) { |
2794 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); | |
7bc95e2e | 2795 | break; |
b62a5a84 M |
2796 | } |
2797 | } | |
5cd9ec01 | 2798 | if(dataLen < 1) continue; |
b62a5a84 | 2799 | |
7bc95e2e | 2800 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
2801 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
2802 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
2803 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
55acbb2a | 2804 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
2805 | } |
2806 | // secondary buffer sets as primary, secondary buffer was stopped | |
2807 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
2808 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
2809 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
2810 | } | |
5cd9ec01 M |
2811 | |
2812 | LED_A_OFF(); | |
b62a5a84 | 2813 | |
7bc95e2e | 2814 | if (sniffCounter & 0x01) { |
b62a5a84 | 2815 | |
7bc95e2e | 2816 | if(!TagIsActive) { // no need to try decoding tag data if the reader is sending |
2817 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
2818 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
2819 | LED_C_INV(); | |
a501c82b | 2820 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break; |
b62a5a84 | 2821 | |
7bc95e2e | 2822 | /* And ready to receive another command. */ |
2823 | UartReset(); | |
2824 | ||
2825 | /* And also reset the demod code */ | |
2826 | DemodReset(); | |
2827 | } | |
2828 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
2829 | } | |
2830 | ||
2831 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending | |
2832 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
2833 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
2834 | LED_C_INV(); | |
b62a5a84 | 2835 | |
a501c82b | 2836 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break; |
39864b0b | 2837 | |
7bc95e2e | 2838 | // And ready to receive another response. |
2839 | DemodReset(); | |
2840 | } | |
2841 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
2842 | } | |
b62a5a84 M |
2843 | } |
2844 | ||
7bc95e2e | 2845 | previous_data = *data; |
2846 | sniffCounter++; | |
5cd9ec01 | 2847 | data++; |
d714d3ef | 2848 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 | 2849 | data = dmaBuf; |
b62a5a84 | 2850 | } |
7bc95e2e | 2851 | |
b62a5a84 M |
2852 | } // main cycle |
2853 | ||
2854 | DbpString("COMMAND FINISHED"); | |
2855 | ||
55acbb2a | 2856 | FpgaDisableSscDma(); |
39864b0b M |
2857 | MfSniffEnd(); |
2858 | ||
7bc95e2e | 2859 | Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); |
b62a5a84 | 2860 | LEDsoff(); |
3803d529 | 2861 | } |