1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "../include/proxmark3.h"
17 #include "../common/cmd.h"
18 #include "../common/iso14443crc.h"
19 #include "iso14443a.h"
21 #include "mifareutil.h"
23 static uint32_t iso14a_timeout
;
24 uint8_t *trace
= (uint8_t *) BigBuf
+TRACE_OFFSET
;
29 // the block number for the ISO14443-4 PCB
30 static uint8_t iso14_pcb_blocknum
= 0;
35 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36 #define REQUEST_GUARD_TIME (7000/16 + 1)
37 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39 // bool LastCommandWasRequest = FALSE;
42 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 // When the PM acts as reader and is receiving tag data, it takes
45 // 3 ticks delay in the AD converter
46 // 16 ticks until the modulation detector completes and sets curbit
47 // 8 ticks until bit_to_arm is assigned from curbit
48 // 8*16 ticks for the transfer from FPGA to ARM
49 // 4*16 ticks until we measure the time
50 // - 8*16 ticks because we measure the time of the previous transfer
51 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
53 // When the PM acts as a reader and is sending, it takes
54 // 4*16 ticks until we can write data to the sending hold register
55 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
56 // 8 ticks until the first transfer starts
57 // 8 ticks later the FPGA samples the data
58 // 1 tick to assign mod_sig_coil
59 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61 // When the PM acts as tag and is receiving it takes
62 // 2 ticks delay in the RF part (for the first falling edge),
63 // 3 ticks for the A/D conversion,
64 // 8 ticks on average until the start of the SSC transfer,
65 // 8 ticks until the SSC samples the first data
66 // 7*16 ticks to complete the transfer from FPGA to ARM
67 // 8 ticks until the next ssp_clk rising edge
68 // 4*16 ticks until we measure the time
69 // - 8*16 ticks because we measure the time of the previous transfer
70 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
72 // The FPGA will report its internal sending delay in
73 uint16_t FpgaSendQueueDelay
;
74 // the 5 first bits are the number of bits buffered in mod_sig_buf
75 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78 // When the PM acts as tag and is sending, it takes
79 // 4*16 ticks until we can write data to the sending hold register
80 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
81 // 8 ticks until the first transfer starts
82 // 8 ticks later the FPGA samples the data
83 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84 // + 1 tick to assign mod_sig_coil
85 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
87 // When the PM acts as sniffer and is receiving tag data, it takes
88 // 3 ticks A/D conversion
89 // 14 ticks to complete the modulation detection
90 // 8 ticks (on average) until the result is stored in to_arm
91 // + the delays in transferring data - which is the same for
92 // sniffing reader and tag data and therefore not relevant
93 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
95 // When the PM acts as sniffer and is receiving reader data, it takes
96 // 2 ticks delay in analogue RF receiver (for the falling edge of the
97 // start bit, which marks the start of the communication)
98 // 3 ticks A/D conversion
99 // 8 ticks on average until the data is stored in to_arm.
100 // + the delays in transferring data - which is the same for
101 // sniffing reader and tag data and therefore not relevant
102 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
104 //variables used for timing purposes:
105 //these are in ssp_clk cycles:
106 static uint32_t NextTransferTime
;
107 static uint32_t LastTimeProxToAirStart
;
108 static uint32_t LastProxToAirDuration
;
112 // CARD TO READER - manchester
113 // Sequence D: 11110000 modulation with subcarrier during first half
114 // Sequence E: 00001111 modulation with subcarrier during second half
115 // Sequence F: 00000000 no modulation with subcarrier
116 // READER TO CARD - miller
117 // Sequence X: 00001100 drop after half a period
118 // Sequence Y: 00000000 no drop
119 // Sequence Z: 11000000 drop at start
127 const uint8_t OddByteParity
[256] = {
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
141 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
146 void iso14a_set_trigger(bool enable
) {
150 void iso14a_clear_trace() {
151 memset(trace
, 0x44, TRACE_SIZE
);
155 void iso14a_set_tracing(bool enable
) {
159 void iso14a_set_timeout(uint32_t timeout
) {
160 iso14a_timeout
= timeout
;
163 //-----------------------------------------------------------------------------
164 // Generate the parity value for a byte sequence
166 //-----------------------------------------------------------------------------
167 byte_t
oddparity (const byte_t bt
)
169 return OddByteParity
[bt
];
172 void GetParity(const uint8_t * pbtCmd
, uint16_t iLen
, uint8_t *par
)
174 uint16_t paritybit_cnt
= 0;
175 uint16_t paritybyte_cnt
= 0;
176 uint8_t parityBits
= 0;
178 for (uint16_t i
= 0; i
< iLen
; i
++) {
179 // Generate the parity bits
180 parityBits
|= ((OddByteParity
[pbtCmd
[i
]]) << (7-paritybit_cnt
));
181 if (paritybit_cnt
== 7) {
182 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
183 parityBits
= 0; // and advance to next Parity Byte
191 // save remaining parity bits
192 par
[paritybyte_cnt
] = parityBits
;
196 void AppendCrc14443a(uint8_t* data
, int len
)
198 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
201 // The function LogTrace() is also used by the iClass implementation in iClass.c
202 bool RAMFUNC
LogTrace(const uint8_t *btBytes
, uint16_t iLen
, uint32_t timestamp_start
, uint32_t timestamp_end
, uint8_t *parity
, bool readerToTag
)
204 if (!tracing
) return FALSE
;
206 uint16_t num_paritybytes
= (iLen
-1)/8 + 1; // number of valid paritybytes in *parity
207 uint16_t duration
= timestamp_end
- timestamp_start
;
209 // Return when trace is full
210 if (traceLen
+ sizeof(iLen
) + sizeof(timestamp_start
) + sizeof(duration
) + num_paritybytes
+ iLen
>= TRACE_SIZE
) {
211 tracing
= FALSE
; // don't trace any more
216 // 32 bits timestamp (little endian)
217 // 16 bits duration (little endian)
218 // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
220 // x Bytes parity (one byte per 8 bytes data)
223 trace
[traceLen
++] = ((timestamp_start
>> 0) & 0xff);
224 trace
[traceLen
++] = ((timestamp_start
>> 8) & 0xff);
225 trace
[traceLen
++] = ((timestamp_start
>> 16) & 0xff);
226 trace
[traceLen
++] = ((timestamp_start
>> 24) & 0xff);
229 trace
[traceLen
++] = ((duration
>> 0) & 0xff);
230 trace
[traceLen
++] = ((duration
>> 8) & 0xff);
233 trace
[traceLen
++] = ((iLen
>> 0) & 0xff);
234 trace
[traceLen
++] = ((iLen
>> 8) & 0xff);
238 trace
[traceLen
- 1] |= 0x80;
242 if (btBytes
!= NULL
&& iLen
!= 0) {
243 memcpy(trace
+ traceLen
, btBytes
, iLen
);
248 if (parity
!= NULL
&& iLen
!= 0) {
249 memcpy(trace
+ traceLen
, parity
, num_paritybytes
);
251 traceLen
+= num_paritybytes
;
256 //=============================================================================
257 // ISO 14443 Type A - Miller decoder
258 //=============================================================================
260 // This decoder is used when the PM3 acts as a tag.
261 // The reader will generate "pauses" by temporarily switching of the field.
262 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
263 // The FPGA does a comparison with a threshold and would deliver e.g.:
264 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
265 // The Miller decoder needs to identify the following sequences:
266 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
267 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
268 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
269 // Note 1: the bitstream may start at any time. We therefore need to sync.
270 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
271 //-----------------------------------------------------------------------------
274 // Lookup-Table to decide if 4 raw bits are a modulation.
275 // We accept two or three consecutive "0" in any position with the rest "1"
276 const bool Mod_Miller_LUT
[] = {
277 TRUE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
,
278 TRUE
, TRUE
, FALSE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
280 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
281 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
285 Uart
.state
= STATE_UNSYNCD
;
287 Uart
.len
= 0; // number of decoded data bytes
288 Uart
.parityLen
= 0; // number of decoded parity bytes
289 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
290 Uart
.parityBits
= 0; // holds 8 parity bits
291 Uart
.twoBits
= 0x0000; // buffer for 2 Bits
297 void UartInit(uint8_t *data
, uint8_t *parity
)
300 Uart
.parity
= parity
;
304 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
305 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
308 Uart
.twoBits
= (Uart
.twoBits
<< 8) | bit
;
310 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
312 if (Uart
.highCnt
< 7) { // wait for a stable unmodulated signal
313 if (Uart
.twoBits
== 0xffff) {
319 Uart
.syncBit
= 0xFFFF; // not set
320 // look for 00xx1111 (the start bit)
321 if ((Uart
.twoBits
& 0x6780) == 0x0780) Uart
.syncBit
= 7;
322 else if ((Uart
.twoBits
& 0x33C0) == 0x03C0) Uart
.syncBit
= 6;
323 else if ((Uart
.twoBits
& 0x19E0) == 0x01E0) Uart
.syncBit
= 5;
324 else if ((Uart
.twoBits
& 0x0CF0) == 0x00F0) Uart
.syncBit
= 4;
325 else if ((Uart
.twoBits
& 0x0678) == 0x0078) Uart
.syncBit
= 3;
326 else if ((Uart
.twoBits
& 0x033C) == 0x003C) Uart
.syncBit
= 2;
327 else if ((Uart
.twoBits
& 0x019E) == 0x001E) Uart
.syncBit
= 1;
328 else if ((Uart
.twoBits
& 0x00CF) == 0x000F) Uart
.syncBit
= 0;
329 if (Uart
.syncBit
!= 0xFFFF) {
330 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
331 Uart
.startTime
-= Uart
.syncBit
;
332 Uart
.endTime
= Uart
.startTime
;
333 Uart
.state
= STATE_START_OF_COMMUNICATION
;
339 if (IsMillerModulationNibble1(Uart
.twoBits
>> Uart
.syncBit
)) {
340 if (IsMillerModulationNibble2(Uart
.twoBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
343 } else { // Modulation in first half = Sequence Z = logic "0"
344 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
349 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
350 Uart
.state
= STATE_MILLER_Z
;
351 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
352 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
353 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
354 Uart
.parityBits
<<= 1; // make room for the parity bit
355 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
358 if((Uart
.len
& 0x0007) == 0) { // every 8 data bytes
359 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
366 if (IsMillerModulationNibble2(Uart
.twoBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
368 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
369 Uart
.state
= STATE_MILLER_X
;
370 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
371 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
372 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
373 Uart
.parityBits
<<= 1; // make room for the new parity bit
374 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
377 if ((Uart
.len
& 0x0007) == 0) { // every 8 data bytes
378 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
382 } else { // no modulation in both halves - Sequence Y
383 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
384 Uart
.state
= STATE_UNSYNCD
;
385 Uart
.bitCount
--; // last "0" was part of EOC sequence
386 Uart
.shiftReg
<<= 1; // drop it
387 if(Uart
.bitCount
> 0) { // if we decoded some bits
388 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
389 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
390 Uart
.parityBits
<<= 1; // add a (void) parity bit
391 Uart
.parityBits
<<= (8 - (Uart
.len
& 0x0007)); // left align parity bits
392 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
394 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
395 Uart
.parityBits
<<= (8 - (Uart
.len
& 0x0007)); // left align remaining parity bits
396 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
397 return TRUE
; // we are finished with decoding the raw data sequence
400 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
403 } else { // a logic "0"
405 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
406 Uart
.state
= STATE_MILLER_Y
;
407 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
408 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
409 Uart
.parityBits
<<= 1; // make room for the parity bit
410 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
413 if ((Uart
.len
& 0x0007) == 0) { // every 8 data bytes
414 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
424 return FALSE
; // not finished yet, need more data
429 //=============================================================================
430 // ISO 14443 Type A - Manchester decoder
431 //=============================================================================
433 // This decoder is used when the PM3 acts as a reader.
434 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
435 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
436 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
437 // The Manchester decoder needs to identify the following sequences:
438 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
439 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
440 // 8 ticks unmodulated: Sequence F = end of communication
441 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
442 // Note 1: the bitstream may start at any time. We therefore need to sync.
443 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
446 // Lookup-Table to decide if 4 raw bits are a modulation.
447 // We accept three or four "1" in any position
448 const bool Mod_Manchester_LUT
[] = {
449 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
450 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
453 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
454 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
459 Demod
.state
= DEMOD_UNSYNCD
;
460 Demod
.len
= 0; // number of decoded data bytes
462 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
463 Demod
.parityBits
= 0; //
464 Demod
.collisionPos
= 0; // Position of collision bit
465 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
471 void DemodInit(uint8_t *data
, uint8_t *parity
)
474 Demod
.parity
= parity
;
478 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
479 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
482 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
484 if (Demod
.state
== DEMOD_UNSYNCD
) {
486 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
487 if (Demod
.twoBits
== 0x0000) {
493 Demod
.syncBit
= 0xFFFF; // not set
494 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
495 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
496 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
497 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
498 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
499 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
500 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
501 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
502 if (Demod
.syncBit
!= 0xFFFF) {
503 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
504 Demod
.startTime
-= Demod
.syncBit
;
505 Demod
.bitCount
= offset
; // number of decoded data bits
506 Demod
.state
= DEMOD_MANCHESTER_DATA
;
512 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
513 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
514 if (!Demod
.collisionPos
) {
515 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
517 } // modulation in first half only - Sequence D = 1
519 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
520 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
521 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
522 Demod
.parityBits
<<= 1; // make room for the parity bit
523 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
526 if((Demod
.len
& 0x0007) == 0) { // every 8 data bytes
527 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
528 Demod
.parityBits
= 0;
531 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
532 } else { // no modulation in first half
533 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
535 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
536 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
537 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
538 Demod
.parityBits
<<= 1; // make room for the new parity bit
539 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
542 if ((Demod
.len
& 0x0007) == 0) { // every 8 data bytes
543 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
544 Demod
.parityBits
= 0;
547 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
548 } else { // no modulation in both halves - End of communication
549 if(Demod
.bitCount
> 0) { // there are some remaining data bits
550 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
551 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
552 Demod
.parityBits
<<= 1; // add a (void) parity bit
553 Demod
.parityBits
<<= (8 - (Demod
.len
& 0x0007)); // left align remaining parity bits
554 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
556 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
557 Demod
.parityBits
<<= (8 - (Demod
.len
& 0x0007)); // left align remaining parity bits
558 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
559 return TRUE
; // we are finished with decoding the raw data sequence
560 } else { // nothing received. Start over
568 return FALSE
; // not finished yet, need more data
571 //=============================================================================
572 // Finally, a `sniffer' for ISO 14443 Type A
573 // Both sides of communication!
574 //=============================================================================
576 //-----------------------------------------------------------------------------
577 // Record the sequence of commands sent by the reader to the tag, with
578 // triggering so that we start recording at the point that the tag is moved
580 //-----------------------------------------------------------------------------
581 void RAMFUNC
SnoopIso14443a(uint8_t param
) {
583 // bit 0 - trigger from first card answer
584 // bit 1 - trigger from first reader 7-bit request
588 iso14a_clear_trace();
589 iso14a_set_tracing(TRUE
);
591 // We won't start recording the frames that we acquire until we trigger;
592 // a good trigger condition to get started is probably when we see a
593 // response from the tag.
594 // triggered == FALSE -- to wait first for card
595 bool triggered
= !(param
& 0x03);
597 // The command (reader -> tag) that we're receiving.
598 // The length of a received command will in most cases be no more than 18 bytes.
599 // So 32 should be enough!
600 uint8_t *receivedCmd
= ((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
;
601 uint8_t *receivedCmdPar
= ((uint8_t *)BigBuf
) + RECV_CMD_PAR_OFFSET
;
603 // The response (tag -> reader) that we're receiving.
604 uint8_t *receivedResponse
= ((uint8_t *)BigBuf
) + RECV_RESP_OFFSET
;
605 uint8_t *receivedResponsePar
= ((uint8_t *)BigBuf
) + RECV_RESP_PAR_OFFSET
;
607 // As we receive stuff, we copy it from receivedCmd or receivedResponse
608 // into trace, along with its length and other annotations.
609 //uint8_t *trace = (uint8_t *)BigBuf;
611 // The DMA buffer, used to stream samples from the FPGA
612 uint8_t *dmaBuf
= ((uint8_t *)BigBuf
) + DMA_BUFFER_OFFSET
;
613 uint8_t *data
= dmaBuf
;
614 uint8_t previous_data
= 0;
617 bool TagIsActive
= FALSE
;
618 bool ReaderIsActive
= FALSE
;
620 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
622 // Set up the demodulator for tag -> reader responses.
623 DemodInit(receivedResponse
, receivedResponsePar
);
625 // Set up the demodulator for the reader -> tag commands
626 UartInit(receivedCmd
, receivedCmdPar
);
628 // Setup and start DMA.
629 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
631 // And now we loop, receiving samples.
632 for(uint32_t rsamples
= 0; TRUE
; ) {
635 DbpString("cancelled by button");
642 int register readBufDataP
= data
- dmaBuf
;
643 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
644 if (readBufDataP
<= dmaBufDataP
){
645 dataLen
= dmaBufDataP
- readBufDataP
;
647 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
649 // test for length of buffer
650 if(dataLen
> maxDataLen
) {
651 maxDataLen
= dataLen
;
653 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
657 if(dataLen
< 1) continue;
659 // primary buffer was stopped( <-- we lost data!
660 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
661 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
662 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
663 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
665 // secondary buffer sets as primary, secondary buffer was stopped
666 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
667 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
668 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
673 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
675 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
676 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
677 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
680 // check - if there is a short 7bit request from reader
681 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
684 if (!LogTrace(receivedCmd
,
686 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
687 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
691 /* And ready to receive another command. */
693 /* And also reset the demod code, which might have been */
694 /* false-triggered by the commands from the reader. */
698 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
701 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
702 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
703 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
706 if (!LogTrace(receivedResponse
,
708 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
709 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
713 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
715 // And ready to receive another response.
719 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
723 previous_data
= *data
;
726 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
731 DbpString("COMMAND FINISHED");
734 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
735 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen
, (uint32_t)Uart
.output
[0]);
739 //-----------------------------------------------------------------------------
740 // Prepare tag messages
741 //-----------------------------------------------------------------------------
742 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
746 // Correction bit, might be removed when not needed
751 ToSendStuffBit(1); // 1
757 ToSend
[++ToSendMax
] = SEC_D
;
758 LastProxToAirDuration
= 8 * ToSendMax
- 4;
760 for( uint16_t i
= 0; i
< len
; i
++) {
764 for(uint16_t j
= 0; j
< 8; j
++) {
766 ToSend
[++ToSendMax
] = SEC_D
;
768 ToSend
[++ToSendMax
] = SEC_E
;
773 // Get the parity bit
774 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
775 ToSend
[++ToSendMax
] = SEC_D
;
776 LastProxToAirDuration
= 8 * ToSendMax
- 4;
778 ToSend
[++ToSendMax
] = SEC_E
;
779 LastProxToAirDuration
= 8 * ToSendMax
;
784 ToSend
[++ToSendMax
] = SEC_F
;
786 // Convert from last byte pos to length
790 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
792 uint8_t par
[MAX_PARITY_SIZE
];
794 GetParity(cmd
, len
, par
);
795 CodeIso14443aAsTagPar(cmd
, len
, par
);
799 static void Code4bitAnswerAsTag(uint8_t cmd
)
805 // Correction bit, might be removed when not needed
810 ToSendStuffBit(1); // 1
816 ToSend
[++ToSendMax
] = SEC_D
;
819 for(i
= 0; i
< 4; i
++) {
821 ToSend
[++ToSendMax
] = SEC_D
;
822 LastProxToAirDuration
= 8 * ToSendMax
- 4;
824 ToSend
[++ToSendMax
] = SEC_E
;
825 LastProxToAirDuration
= 8 * ToSendMax
;
831 ToSend
[++ToSendMax
] = SEC_F
;
833 // Convert from last byte pos to length
837 //-----------------------------------------------------------------------------
838 // Wait for commands from reader
839 // Stop when button is pressed
840 // Or return TRUE when command is captured
841 //-----------------------------------------------------------------------------
842 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
844 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
845 // only, since we are receiving, not transmitting).
846 // Signal field is off with the appropriate LED
848 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
850 // Now run a `software UART' on the stream of incoming samples.
851 UartInit(received
, parity
);
854 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
859 if(BUTTON_PRESS()) return FALSE
;
861 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
862 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
863 if(MillerDecoding(b
, 0)) {
871 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
872 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
873 int EmSend4bit(uint8_t resp
);
874 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
875 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
876 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
877 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
878 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
879 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
881 static uint8_t* free_buffer_pointer
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
);
888 uint32_t ProxToAirDuration
;
889 } tag_response_info_t
;
891 void reset_free_buffer() {
892 free_buffer_pointer
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
);
895 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
896 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
897 // This will need the following byte array for a modulation sequence
898 // 144 data bits (18 * 8)
901 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
902 // 1 just for the case
904 // 166 bytes, since every bit that needs to be send costs us a byte
907 // Prepare the tag modulation bits from the message
908 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
910 // Make sure we do not exceed the free buffer space
911 if (ToSendMax
> max_buffer_size
) {
912 Dbprintf("Out of memory, when modulating bits for tag answer:");
913 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
917 // Copy the byte array, used for this modulation to the buffer position
918 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
920 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
921 response_info
->modulation_n
= ToSendMax
;
922 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
927 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
928 // Retrieve and store the current buffer index
929 response_info
->modulation
= free_buffer_pointer
;
931 // Determine the maximum size we can use from our buffer
932 size_t max_buffer_size
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ FREE_BUFFER_SIZE
) - free_buffer_pointer
;
934 // Forward the prepare tag modulation function to the inner function
935 if (prepare_tag_modulation(response_info
,max_buffer_size
)) {
936 // Update the free buffer offset
937 free_buffer_pointer
+= ToSendMax
;
944 //-----------------------------------------------------------------------------
945 // Main loop of simulated tag: receive commands from reader, decide what
946 // response to send, and send it.
947 //-----------------------------------------------------------------------------
948 void SimulateIso14443aTag(int tagType
, int uid_1st
, int uid_2nd
, byte_t
* data
)
950 // Enable and clear the trace
951 iso14a_clear_trace();
952 iso14a_set_tracing(TRUE
);
956 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
957 uint8_t response1
[2];
960 case 1: { // MIFARE Classic
961 // Says: I am Mifare 1k - original line
966 case 2: { // MIFARE Ultralight
967 // Says: I am a stupid memory tag, no crypto
972 case 3: { // MIFARE DESFire
973 // Says: I am a DESFire tag, ph33r me
978 case 4: { // ISO/IEC 14443-4
979 // Says: I am a javacard (JCOP)
984 case 5: { // MIFARE TNP3XXX
991 Dbprintf("Error: unkown tagtype (%d)",tagType
);
996 // The second response contains the (mandatory) first 24 bits of the UID
997 uint8_t response2
[5];
999 // Check if the uid uses the (optional) part
1000 uint8_t response2a
[5];
1002 response2
[0] = 0x88;
1003 num_to_bytes(uid_1st
,3,response2
+1);
1004 num_to_bytes(uid_2nd
,4,response2a
);
1005 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
1007 // Configure the ATQA and SAK accordingly
1008 response1
[0] |= 0x40;
1011 num_to_bytes(uid_1st
,4,response2
);
1012 // Configure the ATQA and SAK accordingly
1013 response1
[0] &= 0xBF;
1017 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1018 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
1020 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1021 uint8_t response3
[3];
1023 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
1025 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1026 uint8_t response3a
[3];
1027 response3a
[0] = sak
& 0xFB;
1028 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
1030 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1031 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1032 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1033 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1034 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1035 // TC(1) = 0x02: CID supported, NAD not supported
1036 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
1038 #define TAG_RESPONSE_COUNT 7
1039 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
1040 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
1041 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
1042 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1043 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
1044 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
1045 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
1046 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1049 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1050 // Such a response is less time critical, so we can prepare them on the fly
1051 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1052 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1053 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1054 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1055 tag_response_info_t dynamic_response_info
= {
1056 .response
= dynamic_response_buffer
,
1058 .modulation
= dynamic_modulation_buffer
,
1062 // Reset the offset pointer of the free buffer
1063 reset_free_buffer();
1065 // Prepare the responses of the anticollision phase
1066 // there will be not enough time to do this at the moment the reader sends it REQA
1067 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1068 prepare_allocated_tag_modulation(&responses
[i
]);
1073 // To control where we are in the protocol
1077 // Just to allow some checks
1082 // We need to listen to the high-frequency, peak-detected path.
1083 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1085 // buffers used on software Uart:
1086 uint8_t *receivedCmd
= ((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
;
1087 uint8_t *receivedCmdPar
= ((uint8_t *)BigBuf
) + RECV_CMD_PAR_OFFSET
;
1090 tag_response_info_t
* p_response
;
1094 // Clean receive command buffer
1096 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1097 DbpString("Button press");
1103 // Okay, look at the command now.
1105 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1106 p_response
= &responses
[0]; order
= 1;
1107 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1108 p_response
= &responses
[0]; order
= 6;
1109 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1110 p_response
= &responses
[1]; order
= 2;
1111 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1112 p_response
= &responses
[2]; order
= 20;
1113 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1114 p_response
= &responses
[3]; order
= 3;
1115 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1116 p_response
= &responses
[4]; order
= 30;
1117 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1118 EmSendCmdEx(data
+(4*receivedCmd
[1]),16,false);
1119 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1120 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1122 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1125 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1128 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1129 p_response
= &responses
[5]; order
= 7;
1130 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1131 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1132 EmSend4bit(CARD_NACK_NA
);
1135 p_response
= &responses
[6]; order
= 70;
1137 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1139 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1141 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1142 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1143 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr
,ar
);
1145 // Check for ISO 14443A-4 compliant commands, look at left nibble
1146 switch (receivedCmd
[0]) {
1149 case 0x0A: { // IBlock (command)
1150 dynamic_response_info
.response
[0] = receivedCmd
[0];
1151 dynamic_response_info
.response
[1] = 0x00;
1152 dynamic_response_info
.response
[2] = 0x90;
1153 dynamic_response_info
.response
[3] = 0x00;
1154 dynamic_response_info
.response_n
= 4;
1158 case 0x1B: { // Chaining command
1159 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1160 dynamic_response_info
.response_n
= 2;
1165 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1166 dynamic_response_info
.response_n
= 2;
1170 memcpy(dynamic_response_info
.response
,"\xAB\x00",2);
1171 dynamic_response_info
.response_n
= 2;
1175 case 0xC2: { // Readers sends deselect command
1176 memcpy(dynamic_response_info
.response
,"\xCA\x00",2);
1177 dynamic_response_info
.response_n
= 2;
1181 // Never seen this command before
1183 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1185 Dbprintf("Received unknown command (len=%d):",len
);
1186 Dbhexdump(len
,receivedCmd
,false);
1188 dynamic_response_info
.response_n
= 0;
1192 if (dynamic_response_info
.response_n
> 0) {
1193 // Copy the CID from the reader query
1194 dynamic_response_info
.response
[1] = receivedCmd
[1];
1196 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1197 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1198 dynamic_response_info
.response_n
+= 2;
1200 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1201 Dbprintf("Error preparing tag response");
1203 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1207 p_response
= &dynamic_response_info
;
1211 // Count number of wakeups received after a halt
1212 if(order
== 6 && lastorder
== 5) { happened
++; }
1214 // Count number of other messages after a halt
1215 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1217 if(cmdsRecvd
> 999) {
1218 DbpString("1000 commands later...");
1223 if (p_response
!= NULL
) {
1224 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1225 // do the tracing for the previous reader request and this tag answer:
1226 uint8_t par
[MAX_PARITY_SIZE
];
1227 GetParity(p_response
->response
, p_response
->response_n
, par
);
1229 EmLogTrace(Uart
.output
,
1231 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1232 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1234 p_response
->response
,
1235 p_response
->response_n
,
1236 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1237 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1242 Dbprintf("Trace Full. Simulation stopped.");
1247 Dbprintf("%x %x %x", happened
, happened2
, cmdsRecvd
);
1252 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1253 // of bits specified in the delay parameter.
1254 void PrepareDelayedTransfer(uint16_t delay
)
1256 uint8_t bitmask
= 0;
1257 uint8_t bits_to_shift
= 0;
1258 uint8_t bits_shifted
= 0;
1262 for (uint16_t i
= 0; i
< delay
; i
++) {
1263 bitmask
|= (0x01 << i
);
1265 ToSend
[ToSendMax
++] = 0x00;
1266 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1267 bits_to_shift
= ToSend
[i
] & bitmask
;
1268 ToSend
[i
] = ToSend
[i
] >> delay
;
1269 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1270 bits_shifted
= bits_to_shift
;
1276 //-------------------------------------------------------------------------------------
1277 // Transmit the command (to the tag) that was placed in ToSend[].
1278 // Parameter timing:
1279 // if NULL: transfer at next possible time, taking into account
1280 // request guard time and frame delay time
1281 // if == 0: transfer immediately and return time of transfer
1282 // if != 0: delay transfer until time specified
1283 //-------------------------------------------------------------------------------------
1284 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1287 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1289 uint32_t ThisTransferTime
= 0;
1292 if(*timing
== 0) { // Measure time
1293 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1295 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1297 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1298 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1299 LastTimeProxToAirStart
= *timing
;
1301 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1302 while(GetCountSspClk() < ThisTransferTime
);
1303 LastTimeProxToAirStart
= ThisTransferTime
;
1307 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1311 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1312 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1320 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1324 //-----------------------------------------------------------------------------
1325 // Prepare reader command (in bits, support short frames) to send to FPGA
1326 //-----------------------------------------------------------------------------
1327 void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd
, uint16_t bits
, const uint8_t *parity
)
1335 // Start of Communication (Seq. Z)
1336 ToSend
[++ToSendMax
] = SEC_Z
;
1337 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1340 size_t bytecount
= nbytes(bits
);
1341 // Generate send structure for the data bits
1342 for (i
= 0; i
< bytecount
; i
++) {
1343 // Get the current byte to send
1345 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1347 for (j
= 0; j
< bitsleft
; j
++) {
1350 ToSend
[++ToSendMax
] = SEC_X
;
1351 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1356 ToSend
[++ToSendMax
] = SEC_Z
;
1357 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1360 ToSend
[++ToSendMax
] = SEC_Y
;
1367 // Only transmit parity bit if we transmitted a complete byte
1369 // Get the parity bit
1370 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1372 ToSend
[++ToSendMax
] = SEC_X
;
1373 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1378 ToSend
[++ToSendMax
] = SEC_Z
;
1379 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1382 ToSend
[++ToSendMax
] = SEC_Y
;
1389 // End of Communication: Logic 0 followed by Sequence Y
1392 ToSend
[++ToSendMax
] = SEC_Z
;
1393 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1396 ToSend
[++ToSendMax
] = SEC_Y
;
1399 ToSend
[++ToSendMax
] = SEC_Y
;
1401 // Convert to length of command:
1405 //-----------------------------------------------------------------------------
1406 // Prepare reader command to send to FPGA
1407 //-----------------------------------------------------------------------------
1408 void CodeIso14443aAsReaderPar(const uint8_t * cmd
, uint16_t len
, const uint8_t *parity
)
1410 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1413 //-----------------------------------------------------------------------------
1414 // Wait for commands from reader
1415 // Stop when button is pressed (return 1) or field was gone (return 2)
1416 // Or return 0 when command is captured
1417 //-----------------------------------------------------------------------------
1418 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1422 uint32_t timer
= 0, vtime
= 0;
1426 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1427 // only, since we are receiving, not transmitting).
1428 // Signal field is off with the appropriate LED
1430 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1432 // Set ADC to read field strength
1433 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1434 AT91C_BASE_ADC
->ADC_MR
=
1435 ADC_MODE_PRESCALE(32) |
1436 ADC_MODE_STARTUP_TIME(16) |
1437 ADC_MODE_SAMPLE_HOLD_TIME(8);
1438 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1440 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1442 // Now run a 'software UART' on the stream of incoming samples.
1443 UartInit(received
, parity
);
1446 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1451 if (BUTTON_PRESS()) return 1;
1453 // test if the field exists
1454 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1456 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1457 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1458 if (analogCnt
>= 32) {
1459 if ((33000 * (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1460 vtime
= GetTickCount();
1461 if (!timer
) timer
= vtime
;
1462 // 50ms no field --> card to idle state
1463 if (vtime
- timer
> 50) return 2;
1465 if (timer
) timer
= 0;
1471 // receive and test the miller decoding
1472 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1473 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1474 if(MillerDecoding(b
, 0)) {
1484 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1488 uint32_t ThisTransferTime
;
1490 // Modulate Manchester
1491 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1493 // include correction bit if necessary
1494 if (Uart
.parityBits
& 0x01) {
1495 correctionNeeded
= TRUE
;
1497 if(correctionNeeded
) {
1498 // 1236, so correction bit needed
1504 // clear receiving shift register and holding register
1505 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1506 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1507 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1508 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1510 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1511 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1512 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1513 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1516 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1519 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1522 for(; i
<= respLen
; ) {
1523 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1524 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1525 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1528 if(BUTTON_PRESS()) {
1533 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1534 for (i
= 0; i
< 2 ; ) {
1535 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1536 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1537 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1542 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1547 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1548 Code4bitAnswerAsTag(resp
);
1549 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1550 // do the tracing for the previous reader request and this tag answer:
1552 GetParity(&resp
, 1, par
);
1553 EmLogTrace(Uart
.output
,
1555 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1556 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1560 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1561 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1566 int EmSend4bit(uint8_t resp
){
1567 return EmSend4bitEx(resp
, false);
1570 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1571 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1572 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1573 // do the tracing for the previous reader request and this tag answer:
1574 EmLogTrace(Uart
.output
,
1576 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1577 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1581 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1582 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1587 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1588 uint8_t par
[MAX_PARITY_SIZE
];
1589 GetParity(resp
, respLen
, par
);
1590 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1593 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1594 uint8_t par
[MAX_PARITY_SIZE
];
1595 GetParity(resp
, respLen
, par
);
1596 return EmSendCmdExPar(resp
, respLen
, false, par
);
1599 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1600 return EmSendCmdExPar(resp
, respLen
, false, par
);
1603 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1604 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1607 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1608 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1609 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1610 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1611 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1612 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1613 reader_EndTime
= tag_StartTime
- exact_fdt
;
1614 reader_StartTime
= reader_EndTime
- reader_modlen
;
1615 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
)) {
1617 } else return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1623 //-----------------------------------------------------------------------------
1624 // Wait a certain time for tag response
1625 // If a response is captured return TRUE
1626 // If it takes too long return FALSE
1627 //-----------------------------------------------------------------------------
1628 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1632 // Set FPGA mode to "reader listen mode", no modulation (listen
1633 // only, since we are receiving, not transmitting).
1634 // Signal field is on with the appropriate LED
1636 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1638 // Now get the answer from the card
1639 DemodInit(receivedResponse
, receivedResponsePar
);
1642 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1648 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1649 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1650 if(ManchesterDecoding(b
, offset
, 0)) {
1651 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1653 } else if (c
++ > iso14a_timeout
) {
1660 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1662 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1664 // Send command to tag
1665 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1669 // Log reader command in trace buffer
1671 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1675 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1677 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1680 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1682 // Generate parity and redirect
1683 uint8_t par
[MAX_PARITY_SIZE
];
1684 GetParity(frame
, len
/8, par
);
1685 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1688 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1690 // Generate parity and redirect
1691 uint8_t par
[MAX_PARITY_SIZE
];
1692 GetParity(frame
, len
, par
);
1693 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1696 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1698 if (!GetIso14443aAnswerFromTag(receivedAnswer
,parity
,offset
)) return FALSE
;
1700 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1705 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1707 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return FALSE
;
1709 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1714 /* performs iso14443a anticollision procedure
1715 * fills the uid pointer unless NULL
1716 * fills resp_data unless NULL */
1717 int iso14443a_select_card(byte_t
* uid_ptr
, iso14a_card_select_t
* p_hi14a_card
, uint32_t* cuid_ptr
) {
1718 //uint8_t halt[] = { 0x50, 0x00, 0x57, 0xCD }; // HALT
1719 uint8_t wupa
[] = { 0x52 }; // WAKE-UP
1720 //uint8_t reqa[] = { 0x26 }; // REQUEST A
1721 uint8_t sel_all
[] = { 0x93,0x20 };
1722 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1723 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1724 uint8_t *resp
= ((uint8_t *)BigBuf
) + RECV_RESP_OFFSET
;
1725 uint8_t *resp_par
= ((uint8_t *)BigBuf
) + RECV_RESP_PAR_OFFSET
;
1728 size_t uid_resp_len
;
1729 uint8_t sak
= 0x04; // cascade uid
1730 int cascade_level
= 0;
1733 // test for the SKYLANDERS TOY.
1734 //ReaderTransmit(halt,sizeof(halt), NULL);
1735 //len = ReaderReceive(resp, resp_par);
1737 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1738 ReaderTransmitBitsPar(wupa
,7,0, NULL
);
1741 if(!ReaderReceive(resp
, resp_par
)) return 0;
1744 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1745 p_hi14a_card
->uidlen
= 0;
1746 memset(p_hi14a_card
->uid
,0,10);
1751 memset(uid_ptr
,0,10);
1754 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1755 // which case we need to make a cascade 2 request and select - this is a long UID
1756 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1757 for(; sak
& 0x04; cascade_level
++) {
1758 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1759 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1762 ReaderTransmit(sel_all
,sizeof(sel_all
), NULL
);
1763 if (!ReaderReceive(resp
, resp_par
)) return 0;
1765 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1766 memset(uid_resp
, 0, 4);
1767 uint16_t uid_resp_bits
= 0;
1768 uint16_t collision_answer_offset
= 0;
1769 // anti-collision-loop:
1770 while (Demod
.collisionPos
) {
1771 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1772 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1773 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1774 uid_resp
[uid_resp_bits
& 0xf8] |= UIDbit
<< (uid_resp_bits
% 8);
1776 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1778 // construct anticollosion command:
1779 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1780 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1781 sel_uid
[2+i
] = uid_resp
[i
];
1783 collision_answer_offset
= uid_resp_bits
%8;
1784 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1785 if (!ReaderReceiveOffset(resp
, collision_answer_offset
,resp_par
)) return 0;
1787 // finally, add the last bits and BCC of the UID
1788 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1789 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1790 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1793 } else { // no collision, use the response to SELECT_ALL as current uid
1794 memcpy(uid_resp
,resp
,4);
1798 // calculate crypto UID. Always use last 4 Bytes.
1800 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1803 // Construct SELECT UID command
1804 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1805 memcpy(sel_uid
+2,uid_resp
,4); // the UID
1806 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1807 AppendCrc14443a(sel_uid
,7); // calculate and add CRC
1808 ReaderTransmit(sel_uid
,sizeof(sel_uid
), NULL
);
1811 if (!ReaderReceive(resp
, resp_par
)) return 0;
1814 // Test if more parts of the uid are coming
1815 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1816 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1817 // http://www.nxp.com/documents/application_note/AN10927.pdf
1818 uid_resp
[0] = uid_resp
[1];
1819 uid_resp
[1] = uid_resp
[2];
1820 uid_resp
[2] = uid_resp
[3];
1826 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1830 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1831 p_hi14a_card
->uidlen
+= uid_resp_len
;
1836 p_hi14a_card
->sak
= sak
;
1837 p_hi14a_card
->ats_len
= 0;
1840 if( (sak
& 0x20) == 0) {
1841 return 2; // non iso14443a compliant tag
1844 // Request for answer to select
1845 AppendCrc14443a(rats
, 2);
1846 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1848 len
= ReaderReceive(resp
, resp_par
);
1852 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
1853 p_hi14a_card
->ats_len
= len
;
1856 // reset the PCB block number
1857 iso14_pcb_blocknum
= 0;
1861 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1862 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1863 // Set up the synchronous serial port
1865 // connect Demodulated Signal to ADC:
1866 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1868 // Signal field is on with the appropriate LED
1869 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
|| fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
1874 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
1881 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
1882 iso14a_set_timeout(1050); // 10ms default 10*105 =
1885 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
1886 uint8_t parity
[MAX_PARITY_SIZE
];
1887 uint8_t real_cmd
[cmd_len
+4];
1888 real_cmd
[0] = 0x0a; //I-Block
1889 // put block number into the PCB
1890 real_cmd
[0] |= iso14_pcb_blocknum
;
1891 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1892 memcpy(real_cmd
+2, cmd
, cmd_len
);
1893 AppendCrc14443a(real_cmd
,cmd_len
+2);
1895 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
1896 size_t len
= ReaderReceive(data
, parity
);
1897 uint8_t * data_bytes
= (uint8_t *) data
;
1899 return 0; //DATA LINK ERROR
1900 // if we received an I- or R(ACK)-Block with a block number equal to the
1901 // current block number, toggle the current block number
1902 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
1903 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
1904 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1905 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
1907 iso14_pcb_blocknum
^= 1;
1913 //-----------------------------------------------------------------------------
1914 // Read an ISO 14443a tag. Send out commands and store answers.
1916 //-----------------------------------------------------------------------------
1917 void ReaderIso14443a(UsbCommand
*c
)
1919 iso14a_command_t param
= c
->arg
[0];
1920 uint8_t *cmd
= c
->d
.asBytes
;
1921 size_t len
= c
->arg
[1];
1922 size_t lenbits
= c
->arg
[2];
1924 byte_t buf
[USB_CMD_DATA_SIZE
];
1925 uint8_t par
[MAX_PARITY_SIZE
];
1927 if(param
& ISO14A_CONNECT
) {
1928 iso14a_clear_trace();
1931 iso14a_set_tracing(TRUE
);
1933 if(param
& ISO14A_REQUEST_TRIGGER
) {
1934 iso14a_set_trigger(TRUE
);
1937 if(param
& ISO14A_CONNECT
) {
1938 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
1939 if(!(param
& ISO14A_NO_SELECT
)) {
1940 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
1941 arg0
= iso14443a_select_card(NULL
,card
,NULL
);
1942 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
1946 if(param
& ISO14A_SET_TIMEOUT
) {
1947 iso14a_set_timeout(c
->arg
[2]);
1950 if(param
& ISO14A_APDU
) {
1951 arg0
= iso14_apdu(cmd
, len
, buf
);
1952 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1955 if(param
& ISO14A_RAW
) {
1956 if(param
& ISO14A_APPEND_CRC
) {
1957 AppendCrc14443a(cmd
,len
);
1959 if (lenbits
) lenbits
+= 16;
1962 GetParity(cmd
, lenbits
/8, par
);
1963 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
);
1965 ReaderTransmit(cmd
,len
, NULL
);
1967 arg0
= ReaderReceive(buf
, par
);
1968 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1971 if(param
& ISO14A_REQUEST_TRIGGER
) {
1972 iso14a_set_trigger(FALSE
);
1975 if(param
& ISO14A_NO_DISCONNECT
) {
1979 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1984 // Determine the distance between two nonces.
1985 // Assume that the difference is small, but we don't know which is first.
1986 // Therefore try in alternating directions.
1987 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
1990 uint32_t nttmp1
, nttmp2
;
1992 if (nt1
== nt2
) return 0;
1997 for (i
= 1; i
< 32768; i
++) {
1998 nttmp1
= prng_successor(nttmp1
, 1);
1999 if (nttmp1
== nt2
) return i
;
2000 nttmp2
= prng_successor(nttmp2
, 1);
2001 if (nttmp2
== nt1
) return -i
;
2004 return(-99999); // either nt1 or nt2 are invalid nonces
2008 //-----------------------------------------------------------------------------
2009 // Recover several bits of the cypher stream. This implements (first stages of)
2010 // the algorithm described in "The Dark Side of Security by Obscurity and
2011 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2012 // (article by Nicolas T. Courtois, 2009)
2013 //-----------------------------------------------------------------------------
2014 void ReaderMifare(bool first_try
)
2017 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
2018 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2019 static uint8_t mf_nr_ar3
;
2021 uint8_t* receivedAnswer
= (((uint8_t *)BigBuf
) + RECV_RESP_OFFSET
);
2022 uint8_t* receivedAnswerPar
= (((uint8_t *)BigBuf
) + RECV_RESP_PAR_OFFSET
);
2024 iso14a_clear_trace();
2025 iso14a_set_tracing(TRUE
);
2028 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2029 static byte_t par_low
= 0;
2031 uint8_t uid
[10] ={0};
2035 uint32_t previous_nt
= 0;
2036 static uint32_t nt_attacked
= 0;
2037 byte_t par_list
[8] = {0x00};
2038 byte_t ks_list
[8] = {0x00};
2040 static uint32_t sync_time
;
2041 static uint32_t sync_cycles
;
2042 int catch_up_cycles
= 0;
2043 int last_catch_up
= 0;
2044 uint16_t consecutive_resyncs
= 0;
2049 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2050 sync_time
= GetCountSspClk() & 0xfffffff8;
2051 sync_cycles
= 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2057 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2059 mf_nr_ar
[3] = mf_nr_ar3
;
2068 for(uint16_t i
= 0; TRUE
; i
++) {
2072 // Test if the action was cancelled
2073 if(BUTTON_PRESS()) {
2079 if(!iso14443a_select_card(uid
, NULL
, &cuid
)) {
2080 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2084 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2085 catch_up_cycles
= 0;
2087 // if we missed the sync time already, advance to the next nonce repeat
2088 while(GetCountSspClk() > sync_time
) {
2089 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2092 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2093 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2095 // Receive the (4 Byte) "random" nonce
2096 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2097 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2102 nt
= bytes_to_num(receivedAnswer
, 4);
2104 // Transmit reader nonce with fake par
2105 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2107 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2108 int nt_distance
= dist_nt(previous_nt
, nt
);
2109 if (nt_distance
== 0) {
2113 if (nt_distance
== -99999) { // invalid nonce received, try again
2116 sync_cycles
= (sync_cycles
- nt_distance
);
2117 if (MF_DBGLEVEL
>= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i
, nt_distance
, sync_cycles
);
2122 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2123 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2124 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2125 catch_up_cycles
= 0;
2128 if (catch_up_cycles
== last_catch_up
) {
2129 consecutive_resyncs
++;
2132 last_catch_up
= catch_up_cycles
;
2133 consecutive_resyncs
= 0;
2135 if (consecutive_resyncs
< 3) {
2136 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2139 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2140 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2145 consecutive_resyncs
= 0;
2147 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2148 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
))
2150 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2154 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2158 if(led_on
) LED_B_ON(); else LED_B_OFF();
2160 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2161 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2163 // Test if the information is complete
2164 if (nt_diff
== 0x07) {
2169 nt_diff
= (nt_diff
+ 1) & 0x07;
2170 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2173 if (nt_diff
== 0 && first_try
)
2177 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2183 mf_nr_ar
[3] &= 0x1F;
2186 memcpy(buf
+ 0, uid
, 4);
2187 num_to_bytes(nt
, 4, buf
+ 4);
2188 memcpy(buf
+ 8, par_list
, 8);
2189 memcpy(buf
+ 16, ks_list
, 8);
2190 memcpy(buf
+ 24, mf_nr_ar
, 4);
2192 cmd_send(CMD_ACK
,isOK
,0,0,buf
,28);
2195 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2198 iso14a_set_tracing(FALSE
);
2202 *MIFARE 1K simulate.
2205 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2206 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2207 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2208 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2209 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2211 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2213 int cardSTATE
= MFEMUL_NOFIELD
;
2215 int vHf
= 0; // in mV
2217 uint32_t selTimer
= 0;
2218 uint32_t authTimer
= 0;
2220 uint8_t cardWRBL
= 0;
2221 uint8_t cardAUTHSC
= 0;
2222 uint8_t cardAUTHKEY
= 0xff; // no authentication
2223 uint32_t cardRr
= 0;
2225 //uint32_t rn_enc = 0;
2227 uint32_t cardINTREG
= 0;
2228 uint8_t cardINTBLOCK
= 0;
2229 struct Crypto1State mpcs
= {0, 0};
2230 struct Crypto1State
*pcs
;
2232 uint32_t numReads
= 0;//Counts numer of times reader read a block
2233 uint8_t* receivedCmd
= get_bigbufptr_recvcmdbuf();
2234 uint8_t* receivedCmd_par
= receivedCmd
+ MAX_FRAME_SIZE
;
2235 uint8_t* response
= get_bigbufptr_recvrespbuf();
2236 uint8_t* response_par
= response
+ MAX_FRAME_SIZE
;
2238 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2239 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2240 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2241 uint8_t rSAK
[] = {0x08, 0xb6, 0xdd};
2242 uint8_t rSAK1
[] = {0x04, 0xda, 0x17};
2244 uint8_t rAUTH_NT
[] = {0x01, 0x02, 0x03, 0x04};
2245 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2247 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2248 // This can be used in a reader-only attack.
2249 // (it can also be retrieved via 'hf 14a list', but hey...
2250 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0};
2251 uint8_t ar_nr_collected
= 0;
2254 iso14a_clear_trace();
2255 iso14a_set_tracing(TRUE
);
2257 // Authenticate response - nonce
2258 uint32_t nonce
= bytes_to_num(rAUTH_NT
, 4);
2260 //-- Determine the UID
2261 // Can be set from emulator memory, incoming data
2262 // and can be 7 or 4 bytes long
2263 if (flags
& FLAG_4B_UID_IN_DATA
)
2265 // 4B uid comes from data-portion of packet
2266 memcpy(rUIDBCC1
,datain
,4);
2267 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2269 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2270 // 7B uid comes from data-portion of packet
2271 memcpy(&rUIDBCC1
[1],datain
,3);
2272 memcpy(rUIDBCC2
, datain
+3, 4);
2275 // get UID from emul memory
2276 emlGetMemBt(receivedCmd
, 7, 1);
2277 _7BUID
= !(receivedCmd
[0] == 0x00);
2278 if (!_7BUID
) { // ---------- 4BUID
2279 emlGetMemBt(rUIDBCC1
, 0, 4);
2280 } else { // ---------- 7BUID
2281 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2282 emlGetMemBt(rUIDBCC2
, 3, 4);
2287 * Regardless of what method was used to set the UID, set fifth byte and modify
2288 * the ATQA for 4 or 7-byte UID
2290 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2294 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2297 // We need to listen to the high-frequency, peak-detected path.
2298 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2301 if (MF_DBGLEVEL
>= 1) {
2303 Dbprintf("4B UID: %02x%02x%02x%02x",
2304 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3]);
2306 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2307 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3],
2308 rUIDBCC2
[0], rUIDBCC2
[1] ,rUIDBCC2
[2], rUIDBCC2
[3]);
2312 bool finished
= FALSE
;
2313 while (!BUTTON_PRESS() && !finished
) {
2316 // find reader field
2317 // Vref = 3300mV, and an 10:1 voltage divider on the input
2318 // can measure voltages up to 33000 mV
2319 if (cardSTATE
== MFEMUL_NOFIELD
) {
2320 vHf
= (33000 * AvgAdc(ADC_CHAN_HF
)) >> 10;
2321 if (vHf
> MF_MINFIELDV
) {
2322 cardSTATE_TO_IDLE();
2326 if(cardSTATE
== MFEMUL_NOFIELD
) continue;
2330 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2331 if (res
== 2) { //Field is off!
2332 cardSTATE
= MFEMUL_NOFIELD
;
2335 } else if (res
== 1) {
2336 break; //return value 1 means button press
2339 // REQ or WUP request in ANY state and WUP in HALTED state
2340 if (len
== 1 && ((receivedCmd
[0] == 0x26 && cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == 0x52)) {
2341 selTimer
= GetTickCount();
2342 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == 0x52));
2343 cardSTATE
= MFEMUL_SELECT1
;
2345 // init crypto block
2348 crypto1_destroy(pcs
);
2353 switch (cardSTATE
) {
2354 case MFEMUL_NOFIELD
:
2357 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2360 case MFEMUL_SELECT1
:{
2362 if (len
== 2 && (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x20)) {
2363 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2364 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2368 if (MF_DBGLEVEL
>= 4 && len
== 9 && receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 )
2370 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2374 (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2375 EmSendCmd(_7BUID
?rSAK1
:rSAK
, _7BUID
?sizeof(rSAK1
):sizeof(rSAK
));
2376 cuid
= bytes_to_num(rUIDBCC1
, 4);
2378 cardSTATE
= MFEMUL_WORK
;
2380 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2383 cardSTATE
= MFEMUL_SELECT2
;
2391 cardSTATE_TO_IDLE();
2392 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2395 uint32_t ar
= bytes_to_num(receivedCmd
, 4);
2396 uint32_t nr
= bytes_to_num(&receivedCmd
[4], 4);
2399 if(ar_nr_collected
< 2){
2400 if(ar_nr_responses
[2] != ar
)
2401 {// Avoid duplicates... probably not necessary, ar should vary.
2402 ar_nr_responses
[ar_nr_collected
*4] = cuid
;
2403 ar_nr_responses
[ar_nr_collected
*4+1] = nonce
;
2404 ar_nr_responses
[ar_nr_collected
*4+2] = ar
;
2405 ar_nr_responses
[ar_nr_collected
*4+3] = nr
;
2411 crypto1_word(pcs
, ar
, 1);
2412 cardRr
= nr
^ crypto1_word(pcs
, 0, 0);
2415 if (cardRr
!= prng_successor(nonce
, 64)){
2416 if (MF_DBGLEVEL
>= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2417 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2418 cardRr
, prng_successor(nonce
, 64));
2419 // Shouldn't we respond anything here?
2420 // Right now, we don't nack or anything, which causes the
2421 // reader to do a WUPA after a while. /Martin
2422 // -- which is the correct response. /piwi
2423 cardSTATE_TO_IDLE();
2424 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2428 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2430 num_to_bytes(ans
, 4, rAUTH_AT
);
2432 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2434 cardSTATE
= MFEMUL_WORK
;
2435 if (MF_DBGLEVEL
>= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2436 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2437 GetTickCount() - authTimer
);
2440 case MFEMUL_SELECT2
:{
2442 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2445 if (len
== 2 && (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x20)) {
2446 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2452 (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0)) {
2453 EmSendCmd(rSAK
, sizeof(rSAK
));
2454 cuid
= bytes_to_num(rUIDBCC2
, 4);
2455 cardSTATE
= MFEMUL_WORK
;
2457 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2461 // i guess there is a command). go into the work state.
2463 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2466 cardSTATE
= MFEMUL_WORK
;
2468 //intentional fall-through to the next case-stmt
2473 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2477 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2479 if(encrypted_data
) {
2481 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2484 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2485 authTimer
= GetTickCount();
2486 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2487 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2488 crypto1_destroy(pcs
);//Added by martin
2489 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2491 if (!encrypted_data
) { // first authentication
2492 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2494 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2495 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2496 } else { // nested authentication
2497 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2498 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2499 num_to_bytes(ans
, 4, rAUTH_AT
);
2501 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2502 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2503 cardSTATE
= MFEMUL_AUTH1
;
2507 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2508 // BUT... ACK --> NACK
2509 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2510 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2514 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2515 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2516 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2521 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2525 if(receivedCmd
[0] == 0x30 // read block
2526 || receivedCmd
[0] == 0xA0 // write block
2527 || receivedCmd
[0] == 0xC0 // inc
2528 || receivedCmd
[0] == 0xC1 // dec
2529 || receivedCmd
[0] == 0xC2 // restore
2530 || receivedCmd
[0] == 0xB0) { // transfer
2531 if (receivedCmd
[1] >= 16 * 4) {
2532 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2533 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2537 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2538 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2539 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2544 if (receivedCmd
[0] == 0x30) {
2545 if (MF_DBGLEVEL
>= 4) {
2546 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2548 emlGetMem(response
, receivedCmd
[1], 1);
2549 AppendCrc14443a(response
, 16);
2550 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2551 EmSendCmdPar(response
, 18, response_par
);
2553 if(exitAfterNReads
> 0 && numReads
== exitAfterNReads
) {
2554 Dbprintf("%d reads done, exiting", numReads
);
2560 if (receivedCmd
[0] == 0xA0) {
2561 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2562 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2563 cardSTATE
= MFEMUL_WRITEBL2
;
2564 cardWRBL
= receivedCmd
[1];
2567 // increment, decrement, restore
2568 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2569 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2570 if (emlCheckValBl(receivedCmd
[1])) {
2571 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2572 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2575 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2576 if (receivedCmd
[0] == 0xC1)
2577 cardSTATE
= MFEMUL_INTREG_INC
;
2578 if (receivedCmd
[0] == 0xC0)
2579 cardSTATE
= MFEMUL_INTREG_DEC
;
2580 if (receivedCmd
[0] == 0xC2)
2581 cardSTATE
= MFEMUL_INTREG_REST
;
2582 cardWRBL
= receivedCmd
[1];
2586 if (receivedCmd
[0] == 0xB0) {
2587 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2588 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2589 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2591 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2595 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2598 cardSTATE
= MFEMUL_HALTED
;
2599 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2600 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2604 if (receivedCmd
[0] == 0xe0) {//RATS
2605 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2608 // command not allowed
2609 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2610 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2613 case MFEMUL_WRITEBL2
:{
2615 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2616 emlSetMem(receivedCmd
, cardWRBL
, 1);
2617 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2618 cardSTATE
= MFEMUL_WORK
;
2620 cardSTATE_TO_IDLE();
2621 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2626 case MFEMUL_INTREG_INC
:{
2627 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2628 memcpy(&ans
, receivedCmd
, 4);
2629 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2630 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2631 cardSTATE_TO_IDLE();
2634 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2635 cardINTREG
= cardINTREG
+ ans
;
2636 cardSTATE
= MFEMUL_WORK
;
2639 case MFEMUL_INTREG_DEC
:{
2640 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2641 memcpy(&ans
, receivedCmd
, 4);
2642 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2643 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2644 cardSTATE_TO_IDLE();
2647 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2648 cardINTREG
= cardINTREG
- ans
;
2649 cardSTATE
= MFEMUL_WORK
;
2652 case MFEMUL_INTREG_REST
:{
2653 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2654 memcpy(&ans
, receivedCmd
, 4);
2655 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2656 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2657 cardSTATE_TO_IDLE();
2660 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2661 cardSTATE
= MFEMUL_WORK
;
2667 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2670 if(flags
& FLAG_INTERACTIVE
)// Interactive mode flag, means we need to send ACK
2672 //May just aswell send the collected ar_nr in the response aswell
2673 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,0,0,&ar_nr_responses
,ar_nr_collected
*4*4);
2676 if(flags
& FLAG_NR_AR_ATTACK
)
2678 if(ar_nr_collected
> 1) {
2679 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2680 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2681 ar_nr_responses
[0], // UID
2682 ar_nr_responses
[1], //NT
2683 ar_nr_responses
[2], //AR1
2684 ar_nr_responses
[3], //NR1
2685 ar_nr_responses
[6], //AR2
2686 ar_nr_responses
[7] //NR2
2689 Dbprintf("Failed to obtain two AR/NR pairs!");
2690 if(ar_nr_collected
>0) {
2691 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2692 ar_nr_responses
[0], // UID
2693 ar_nr_responses
[1], //NT
2694 ar_nr_responses
[2], //AR1
2695 ar_nr_responses
[3] //NR1
2700 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, traceLen
);
2705 //-----------------------------------------------------------------------------
2708 //-----------------------------------------------------------------------------
2709 void RAMFUNC
SniffMifare(uint8_t param
) {
2711 // bit 0 - trigger from first card answer
2712 // bit 1 - trigger from first reader 7-bit request
2714 // C(red) A(yellow) B(green)
2716 // init trace buffer
2717 iso14a_clear_trace();
2718 iso14a_set_tracing(TRUE
);
2720 // The command (reader -> tag) that we're receiving.
2721 // The length of a received command will in most cases be no more than 18 bytes.
2722 // So 32 should be enough!
2723 uint8_t *receivedCmd
= (((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
);
2724 uint8_t *receivedCmdPar
= ((uint8_t *)BigBuf
) + RECV_CMD_PAR_OFFSET
;
2725 // The response (tag -> reader) that we're receiving.
2726 uint8_t *receivedResponse
= (((uint8_t *)BigBuf
) + RECV_RESP_OFFSET
);
2727 uint8_t *receivedResponsePar
= ((uint8_t *)BigBuf
) + RECV_RESP_PAR_OFFSET
;
2729 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2730 // into trace, along with its length and other annotations.
2731 //uint8_t *trace = (uint8_t *)BigBuf;
2733 // The DMA buffer, used to stream samples from the FPGA
2734 uint8_t *dmaBuf
= ((uint8_t *)BigBuf
) + DMA_BUFFER_OFFSET
;
2735 uint8_t *data
= dmaBuf
;
2736 uint8_t previous_data
= 0;
2739 bool ReaderIsActive
= FALSE
;
2740 bool TagIsActive
= FALSE
;
2742 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
2744 // Set up the demodulator for tag -> reader responses.
2745 DemodInit(receivedResponse
, receivedResponsePar
);
2747 // Set up the demodulator for the reader -> tag commands
2748 UartInit(receivedCmd
, receivedCmdPar
);
2750 // Setup for the DMA.
2751 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2758 // And now we loop, receiving samples.
2759 for(uint32_t sniffCounter
= 0; TRUE
; ) {
2761 if(BUTTON_PRESS()) {
2762 DbpString("cancelled by button");
2769 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
2770 // check if a transaction is completed (timeout after 2000ms).
2771 // if yes, stop the DMA transfer and send what we have so far to the client
2772 if (MfSniffSend(2000)) {
2773 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2777 ReaderIsActive
= FALSE
;
2778 TagIsActive
= FALSE
;
2779 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2783 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
2784 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
2785 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
2786 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
2788 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
2790 // test for length of buffer
2791 if(dataLen
> maxDataLen
) { // we are more behind than ever...
2792 maxDataLen
= dataLen
;
2794 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
2798 if(dataLen
< 1) continue;
2800 // primary buffer was stopped ( <-- we lost data!
2801 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
2802 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
2803 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
2804 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
2806 // secondary buffer sets as primary, secondary buffer was stopped
2807 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
2808 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
2809 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
2814 if (sniffCounter
& 0x01) {
2816 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
2817 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
2818 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
2820 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
2822 /* And ready to receive another command. */
2825 /* And also reset the demod code */
2828 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
2831 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
2832 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
2833 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
2836 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
2838 // And ready to receive another response.
2841 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
2845 previous_data
= *data
;
2848 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
2854 DbpString("COMMAND FINISHED");
2856 FpgaDisableSscDma();
2859 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);