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[proxmark3-svn] / armsrc / iso15693.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "deprecated"
51 // *) document all the functions
52
53 #include "iso15693.h"
54
55 #include "proxmark3.h"
56 #include "util.h"
57 #include "apps.h"
58 #include "string.h"
59 #include "iso15693tools.h"
60 #include "protocols.h"
61 #include "usb_cdc.h"
62 #include "BigBuf.h"
63 #include "fpgaloader.h"
64
65 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
66
67 // Delays in SSP_CLK ticks.
68 // SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
69 #define DELAY_READER_TO_ARM 8
70 #define DELAY_ARM_TO_READER 0
71 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader. All values should be multiples of 16
72 #define DELAY_ARM_TO_TAG 16
73 #define DELAY_TAG_TO_ARM 32
74 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when snooping. All values should be multiples of 16
75 #define DELAY_TAG_TO_ARM_SNOOP 32
76 #define DELAY_READER_TO_ARM_SNOOP 32
77
78 // times in samples @ 212kHz when acting as reader
79 //#define ISO15693_READER_TIMEOUT 80 // 80/212kHz = 378us, nominal t1_max=313,9us
80 #define ISO15693_READER_TIMEOUT 330 // 330/212kHz = 1558us, should be even enough for iClass tags responding to ACTALL
81 #define ISO15693_READER_TIMEOUT_WRITE 4700 // 4700/212kHz = 22ms, nominal 20ms
82
83
84 static int DEBUG = 0;
85
86
87 ///////////////////////////////////////////////////////////////////////
88 // ISO 15693 Part 2 - Air Interface
89 // This section basically contains transmission and receiving of bits
90 ///////////////////////////////////////////////////////////////////////
91
92 // buffers
93 #define ISO15693_DMA_BUFFER_SIZE 256 // must be a power of 2
94 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
95 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
96
97
98 // specific LogTrace function for ISO15693: the duration needs to be scaled because otherwise it won't fit into a uint16_t
99 bool LogTrace_ISO15693(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) {
100 uint32_t duration = timestamp_end - timestamp_start;
101 duration /= 32;
102 timestamp_end = timestamp_start + duration;
103 return LogTrace(btBytes, iLen, timestamp_start, timestamp_end, parity, readerToTag);
104 }
105
106
107 // ---------------------------
108 // Signal Processing
109 // ---------------------------
110
111 // prepare data using "1 out of 4" code for later transmission
112 // resulting data rate is 26.48 kbit/s (fc/512)
113 // cmd ... data
114 // n ... length of data
115 void CodeIso15693AsReader(uint8_t *cmd, int n) {
116
117 ToSendReset();
118
119 // SOF for 1of4
120 ToSend[++ToSendMax] = 0x84; //10000100
121
122 // data
123 for (int i = 0; i < n; i++) {
124 for (int j = 0; j < 8; j += 2) {
125 int these = (cmd[i] >> j) & 0x03;
126 switch(these) {
127 case 0:
128 ToSend[++ToSendMax] = 0x40; //01000000
129 break;
130 case 1:
131 ToSend[++ToSendMax] = 0x10; //00010000
132 break;
133 case 2:
134 ToSend[++ToSendMax] = 0x04; //00000100
135 break;
136 case 3:
137 ToSend[++ToSendMax] = 0x01; //00000001
138 break;
139 }
140 }
141 }
142
143 // EOF
144 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
145
146 ToSendMax++;
147 }
148
149
150 // Encode EOF only
151 static void CodeIso15693AsReaderEOF() {
152 ToSendReset();
153 ToSend[++ToSendMax] = 0x20;
154 ToSendMax++;
155 }
156
157
158 // encode data using "1 out of 256" scheme
159 // data rate is 1,66 kbit/s (fc/8192)
160 // is designed for more robust communication over longer distances
161 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
162 {
163 ToSendReset();
164
165 // SOF for 1of256
166 ToSend[++ToSendMax] = 0x81; //10000001
167
168 // data
169 for(int i = 0; i < n; i++) {
170 for (int j = 0; j <= 255; j++) {
171 if (cmd[i] == j) {
172 ToSendStuffBit(0);
173 ToSendStuffBit(1);
174 } else {
175 ToSendStuffBit(0);
176 ToSendStuffBit(0);
177 }
178 }
179 }
180
181 // EOF
182 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
183
184 ToSendMax++;
185 }
186
187
188 // static uint8_t encode4Bits(const uint8_t b) {
189 // uint8_t c = b & 0xF;
190 // // OTA, the least significant bits first
191 // // The columns are
192 // // 1 - Bit value to send
193 // // 2 - Reversed (big-endian)
194 // // 3 - Manchester Encoded
195 // // 4 - Hex values
196
197 // switch(c){
198 // // 1 2 3 4
199 // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
200 // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
201 // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
202 // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
203 // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
204 // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
205 // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
206 // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
207 // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
208 // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
209 // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
210 // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
211 // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
212 // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
213 // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
214 // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
215
216 // }
217 // }
218
219 static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
220
221 void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
222 /*
223 * SOF comprises 3 parts;
224 * * An unmodulated time of 56.64 us
225 * * 24 pulses of 423.75 kHz (fc/32)
226 * * A logic 1, which starts with an unmodulated time of 18.88us
227 * followed by 8 pulses of 423.75kHz (fc/32)
228 *
229 * EOF comprises 3 parts:
230 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
231 * time of 18.88us.
232 * - 24 pulses of fc/32
233 * - An unmodulated time of 56.64 us
234 *
235 * A logic 0 starts with 8 pulses of fc/32
236 * followed by an unmodulated time of 256/fc (~18,88us).
237 *
238 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
239 * 8 pulses of fc/32 (also 18.88us)
240 *
241 * A bit here becomes 8 pulses of fc/32. Therefore:
242 * The SOF can be written as 00011101 = 0x1D
243 * The EOF can be written as 10111000 = 0xb8
244 * A logic 1 is 01
245 * A logic 0 is 10
246 *
247 * */
248
249 ToSendReset();
250
251 // SOF
252 ToSend[++ToSendMax] = 0x1D; // 00011101
253
254 // data
255 for (int i = 0; i < len; i++) {
256 ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
257 ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
258 }
259
260 // EOF
261 ToSend[++ToSendMax] = 0xB8; // 10111000
262
263 ToSendMax++;
264 }
265
266
267 // Transmit the command (to the tag) that was placed in cmd[].
268 void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time) {
269
270 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_FULL_MOD);
271
272 if (*start_time < DELAY_ARM_TO_TAG) {
273 *start_time = DELAY_ARM_TO_TAG;
274 }
275
276 *start_time = (*start_time - DELAY_ARM_TO_TAG) & 0xfffffff0;
277
278 if (GetCountSspClk() > *start_time) { // we may miss the intended time
279 *start_time = (GetCountSspClk() + 16) & 0xfffffff0; // next possible time
280 }
281
282 while (GetCountSspClk() < *start_time)
283 /* wait */ ;
284
285 LED_B_ON();
286 for (int c = 0; c < len; c++) {
287 uint8_t data = cmd[c];
288 for (int i = 0; i < 8; i++) {
289 uint16_t send_word = (data & 0x80) ? 0xffff : 0x0000;
290 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
291 AT91C_BASE_SSC->SSC_THR = send_word;
292 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
293 AT91C_BASE_SSC->SSC_THR = send_word;
294
295 data <<= 1;
296 }
297 WDT_HIT();
298 }
299 LED_B_OFF();
300
301 *start_time = *start_time + DELAY_ARM_TO_TAG;
302
303 }
304
305
306 //-----------------------------------------------------------------------------
307 // Transmit the tag response (to the reader) that was placed in cmd[].
308 //-----------------------------------------------------------------------------
309 void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
310 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
311 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
312
313 uint32_t modulation_start_time = *start_time - DELAY_ARM_TO_READER + 3 * 8; // no need to transfer the unmodulated start of SOF
314
315 while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
316 if (slot_time) {
317 modulation_start_time += slot_time; // use next available slot
318 } else {
319 modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
320 }
321 }
322
323 while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
324 /* wait */ ;
325
326 uint8_t shift_delay = modulation_start_time & 0x00000007;
327
328 *start_time = modulation_start_time + DELAY_ARM_TO_READER - 3 * 8;
329
330 LED_C_ON();
331 uint8_t bits_to_shift = 0x00;
332 uint8_t bits_to_send = 0x00;
333 for (size_t c = 0; c < len; c++) {
334 for (int i = (c==0?4:7); i >= 0; i--) {
335 uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
336 for (int j = 0; j < (slow?4:1); ) {
337 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
338 bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
339 AT91C_BASE_SSC->SSC_THR = bits_to_send;
340 bits_to_shift = cmd_bits;
341 j++;
342 }
343 }
344 }
345 WDT_HIT();
346 }
347 // send the remaining bits, padded with 0:
348 bits_to_send = bits_to_shift << (8 - shift_delay);
349 for ( ; ; ) {
350 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
351 AT91C_BASE_SSC->SSC_THR = bits_to_send;
352 break;
353 }
354 }
355 LED_C_OFF();
356 }
357
358
359 //=============================================================================
360 // An ISO 15693 decoder for tag responses (one subcarrier only).
361 // Uses cross correlation to identify each bit and EOF.
362 // This function is called 8 times per bit (every 2 subcarrier cycles).
363 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
364 // i.e. function is called every 4,72us
365 // LED handling:
366 // LED C -> ON once we have received the SOF and are expecting the rest.
367 // LED C -> OFF once we have received EOF or are unsynced
368 //
369 // Returns: true if we received a EOF
370 // false if we are still waiting for some more
371 //=============================================================================
372
373 #define NOISE_THRESHOLD 160 // don't try to correlate noise
374 #define MAX_PREVIOUS_AMPLITUDE (-1 - NOISE_THRESHOLD)
375
376 typedef struct DecodeTag {
377 enum {
378 STATE_TAG_SOF_LOW,
379 STATE_TAG_SOF_RISING_EDGE,
380 STATE_TAG_SOF_HIGH,
381 STATE_TAG_SOF_HIGH_END,
382 STATE_TAG_RECEIVING_DATA,
383 STATE_TAG_EOF,
384 STATE_TAG_EOF_TAIL
385 } state;
386 int bitCount;
387 int posCount;
388 enum {
389 LOGIC0,
390 LOGIC1,
391 SOF_PART1,
392 SOF_PART2
393 } lastBit;
394 uint16_t shiftReg;
395 uint16_t max_len;
396 uint8_t *output;
397 int len;
398 int sum1, sum2;
399 int threshold_sof;
400 int threshold_half;
401 uint16_t previous_amplitude;
402 } DecodeTag_t;
403
404
405 static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag) {
406 switch (DecodeTag->state) {
407 case STATE_TAG_SOF_LOW:
408 // waiting for a rising edge
409 if (amplitude > NOISE_THRESHOLD + DecodeTag->previous_amplitude) {
410 if (DecodeTag->posCount > 10) {
411 DecodeTag->threshold_sof = amplitude - DecodeTag->previous_amplitude; // to be divided by 2
412 DecodeTag->threshold_half = 0;
413 DecodeTag->state = STATE_TAG_SOF_RISING_EDGE;
414 } else {
415 DecodeTag->posCount = 0;
416 }
417 } else {
418 DecodeTag->posCount++;
419 DecodeTag->previous_amplitude = amplitude;
420 }
421 break;
422
423 case STATE_TAG_SOF_RISING_EDGE:
424 if (amplitude > DecodeTag->threshold_sof + DecodeTag->previous_amplitude) { // edge still rising
425 if (amplitude > DecodeTag->threshold_sof + DecodeTag->threshold_sof) { // steeper edge, take this as time reference
426 DecodeTag->posCount = 1;
427 } else {
428 DecodeTag->posCount = 2;
429 }
430 DecodeTag->threshold_sof = (amplitude - DecodeTag->previous_amplitude) / 2;
431 } else {
432 DecodeTag->posCount = 2;
433 DecodeTag->threshold_sof = DecodeTag->threshold_sof/2;
434 }
435 // DecodeTag->posCount = 2;
436 DecodeTag->state = STATE_TAG_SOF_HIGH;
437 break;
438
439 case STATE_TAG_SOF_HIGH:
440 // waiting for 10 times high. Take average over the last 8
441 if (amplitude > DecodeTag->threshold_sof) {
442 DecodeTag->posCount++;
443 if (DecodeTag->posCount > 2) {
444 DecodeTag->threshold_half += amplitude; // keep track of average high value
445 }
446 if (DecodeTag->posCount == 10) {
447 DecodeTag->threshold_half >>= 2; // (4 times 1/2 average)
448 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
449 }
450 } else { // high phase was too short
451 DecodeTag->posCount = 1;
452 DecodeTag->previous_amplitude = amplitude;
453 DecodeTag->state = STATE_TAG_SOF_LOW;
454 }
455 break;
456
457 case STATE_TAG_SOF_HIGH_END:
458 // check for falling edge
459 if (DecodeTag->posCount == 13 && amplitude < DecodeTag->threshold_sof) {
460 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
461 DecodeTag->shiftReg = 0;
462 DecodeTag->bitCount = 0;
463 DecodeTag->len = 0;
464 DecodeTag->sum1 = amplitude;
465 DecodeTag->sum2 = 0;
466 DecodeTag->posCount = 2;
467 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
468 // FpgaDisableTracing(); // DEBUGGING
469 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
470 // amplitude,
471 // DecodeTag->threshold_sof,
472 // DecodeTag->threshold_half/4,
473 // DecodeTag->previous_amplitude); // DEBUGGING
474 LED_C_ON();
475 } else {
476 DecodeTag->posCount++;
477 if (DecodeTag->posCount > 13) { // high phase too long
478 DecodeTag->posCount = 0;
479 DecodeTag->previous_amplitude = amplitude;
480 DecodeTag->state = STATE_TAG_SOF_LOW;
481 LED_C_OFF();
482 }
483 }
484 break;
485
486 case STATE_TAG_RECEIVING_DATA:
487 // FpgaDisableTracing(); // DEBUGGING
488 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
489 // amplitude,
490 // DecodeTag->threshold_sof,
491 // DecodeTag->threshold_half/4,
492 // DecodeTag->previous_amplitude); // DEBUGGING
493 if (DecodeTag->posCount == 1) {
494 DecodeTag->sum1 = 0;
495 DecodeTag->sum2 = 0;
496 }
497 if (DecodeTag->posCount <= 4) {
498 DecodeTag->sum1 += amplitude;
499 } else {
500 DecodeTag->sum2 += amplitude;
501 }
502 if (DecodeTag->posCount == 8) {
503 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in both halves
504 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
505 DecodeTag->state = STATE_TAG_EOF;
506 } else {
507 DecodeTag->posCount = 0;
508 DecodeTag->previous_amplitude = amplitude;
509 DecodeTag->state = STATE_TAG_SOF_LOW;
510 LED_C_OFF();
511 }
512 } else if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in second half
513 // logic 1
514 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
515 DecodeTag->lastBit = SOF_PART2; // SOF completed
516 } else {
517 DecodeTag->lastBit = LOGIC1;
518 DecodeTag->shiftReg >>= 1;
519 DecodeTag->shiftReg |= 0x80;
520 DecodeTag->bitCount++;
521 if (DecodeTag->bitCount == 8) {
522 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
523 DecodeTag->len++;
524 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
525 if (DecodeTag->len > DecodeTag->max_len) {
526 // buffer overflow, give up
527 LED_C_OFF();
528 return true;
529 }
530 DecodeTag->bitCount = 0;
531 DecodeTag->shiftReg = 0;
532 }
533 }
534 } else if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
535 // logic 0
536 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
537 DecodeTag->posCount = 0;
538 DecodeTag->previous_amplitude = amplitude;
539 DecodeTag->state = STATE_TAG_SOF_LOW;
540 LED_C_OFF();
541 } else {
542 DecodeTag->lastBit = LOGIC0;
543 DecodeTag->shiftReg >>= 1;
544 DecodeTag->bitCount++;
545 if (DecodeTag->bitCount == 8) {
546 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
547 DecodeTag->len++;
548 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
549 if (DecodeTag->len > DecodeTag->max_len) {
550 // buffer overflow, give up
551 DecodeTag->posCount = 0;
552 DecodeTag->previous_amplitude = amplitude;
553 DecodeTag->state = STATE_TAG_SOF_LOW;
554 LED_C_OFF();
555 }
556 DecodeTag->bitCount = 0;
557 DecodeTag->shiftReg = 0;
558 }
559 }
560 } else { // no modulation
561 if (DecodeTag->lastBit == SOF_PART2) { // only SOF (this is OK for iClass)
562 LED_C_OFF();
563 return true;
564 } else {
565 DecodeTag->posCount = 0;
566 DecodeTag->state = STATE_TAG_SOF_LOW;
567 LED_C_OFF();
568 }
569 }
570 DecodeTag->posCount = 0;
571 }
572 DecodeTag->posCount++;
573 break;
574
575 case STATE_TAG_EOF:
576 if (DecodeTag->posCount == 1) {
577 DecodeTag->sum1 = 0;
578 DecodeTag->sum2 = 0;
579 }
580 if (DecodeTag->posCount <= 4) {
581 DecodeTag->sum1 += amplitude;
582 } else {
583 DecodeTag->sum2 += amplitude;
584 }
585 if (DecodeTag->posCount == 8) {
586 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
587 DecodeTag->posCount = 0;
588 DecodeTag->state = STATE_TAG_EOF_TAIL;
589 } else {
590 DecodeTag->posCount = 0;
591 DecodeTag->previous_amplitude = amplitude;
592 DecodeTag->state = STATE_TAG_SOF_LOW;
593 LED_C_OFF();
594 }
595 }
596 DecodeTag->posCount++;
597 break;
598
599 case STATE_TAG_EOF_TAIL:
600 if (DecodeTag->posCount == 1) {
601 DecodeTag->sum1 = 0;
602 DecodeTag->sum2 = 0;
603 }
604 if (DecodeTag->posCount <= 4) {
605 DecodeTag->sum1 += amplitude;
606 } else {
607 DecodeTag->sum2 += amplitude;
608 }
609 if (DecodeTag->posCount == 8) {
610 if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // no modulation in both halves
611 LED_C_OFF();
612 return true;
613 } else {
614 DecodeTag->posCount = 0;
615 DecodeTag->previous_amplitude = amplitude;
616 DecodeTag->state = STATE_TAG_SOF_LOW;
617 LED_C_OFF();
618 }
619 }
620 DecodeTag->posCount++;
621 break;
622 }
623
624 return false;
625 }
626
627
628 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len) {
629 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
630 DecodeTag->posCount = 0;
631 DecodeTag->state = STATE_TAG_SOF_LOW;
632 DecodeTag->output = data;
633 DecodeTag->max_len = max_len;
634 }
635
636
637 static void DecodeTagReset(DecodeTag_t *DecodeTag) {
638 DecodeTag->posCount = 0;
639 DecodeTag->state = STATE_TAG_SOF_LOW;
640 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
641 }
642
643
644 /*
645 * Receive and decode the tag response, also log to tracebuffer
646 */
647 int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, uint16_t timeout, uint32_t *eof_time) {
648
649 int samples = 0;
650 int ret = 0;
651
652 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
653
654 // the Decoder data structure
655 DecodeTag_t DecodeTag = { 0 };
656 DecodeTagInit(&DecodeTag, response, max_len);
657
658 // wait for last transfer to complete
659 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
660
661 // And put the FPGA in the appropriate mode
662 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
663
664 // Setup and start DMA.
665 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
666 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
667 uint32_t dma_start_time = 0;
668 uint16_t *upTo = dmaBuf;
669
670 for(;;) {
671 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
672
673 if (behindBy == 0) continue;
674
675 samples++;
676 if (samples == 1) {
677 // DMA has transferred the very first data
678 dma_start_time = GetCountSspClk() & 0xfffffff0;
679 }
680
681 uint16_t tagdata = *upTo++;
682
683 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
684 upTo = dmaBuf; // start reading the circular buffer from the beginning
685 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
686 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
687 ret = -1;
688 break;
689 }
690 }
691 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
692 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
693 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
694 }
695
696 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
697 *eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM; // end of EOF
698 if (DecodeTag.lastBit == SOF_PART2) {
699 *eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
700 }
701 if (DecodeTag.len > DecodeTag.max_len) {
702 ret = -2; // buffer overflow
703 }
704 break;
705 }
706
707 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
708 ret = -1; // timeout
709 break;
710 }
711
712 }
713
714 FpgaDisableSscDma();
715
716 if (DEBUG) Dbprintf("samples = %d, ret = %d, Decoder: state = %d, lastBit = %d, len = %d, bitCount = %d, posCount = %d",
717 samples, ret, DecodeTag.state, DecodeTag.lastBit, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
718
719 if (ret < 0) {
720 return ret;
721 }
722
723 uint32_t sof_time = *eof_time
724 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
725 - 32 * 16 // time for SOF transfer
726 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
727
728 if (DEBUG) Dbprintf("timing: sof_time = %d, eof_time = %d", sof_time, *eof_time);
729
730 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, *eof_time*4, NULL, false);
731
732 return DecodeTag.len;
733 }
734
735
736 //=============================================================================
737 // An ISO15693 decoder for reader commands.
738 //
739 // This function is called 4 times per bit (every 2 subcarrier cycles).
740 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
741 // LED handling:
742 // LED B -> ON once we have received the SOF and are expecting the rest.
743 // LED B -> OFF once we have received EOF or are in error state or unsynced
744 //
745 // Returns: true if we received a EOF
746 // false if we are still waiting for some more
747 //=============================================================================
748
749 typedef struct DecodeReader {
750 enum {
751 STATE_READER_UNSYNCD,
752 STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
753 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
754 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
755 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
756 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
757 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
758 STATE_READER_RECEIVE_DATA_1_OUT_OF_256,
759 STATE_READER_RECEIVE_JAMMING
760 } state;
761 enum {
762 CODING_1_OUT_OF_4,
763 CODING_1_OUT_OF_256
764 } Coding;
765 uint8_t shiftReg;
766 uint8_t bitCount;
767 int byteCount;
768 int byteCountMax;
769 int posCount;
770 int sum1, sum2;
771 uint8_t *output;
772 uint8_t jam_search_len;
773 uint8_t *jam_search_string;
774 } DecodeReader_t;
775
776
777 static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len, uint8_t jam_search_len, uint8_t *jam_search_string) {
778 DecodeReader->output = data;
779 DecodeReader->byteCountMax = max_len;
780 DecodeReader->state = STATE_READER_UNSYNCD;
781 DecodeReader->byteCount = 0;
782 DecodeReader->bitCount = 0;
783 DecodeReader->posCount = 1;
784 DecodeReader->shiftReg = 0;
785 DecodeReader->jam_search_len = jam_search_len;
786 DecodeReader->jam_search_string = jam_search_string;
787 }
788
789
790 static void DecodeReaderReset(DecodeReader_t* DecodeReader) {
791 DecodeReader->state = STATE_READER_UNSYNCD;
792 }
793
794
795 static int inline __attribute__((always_inline)) Handle15693SampleFromReader(bool bit, DecodeReader_t *DecodeReader) {
796 switch (DecodeReader->state) {
797 case STATE_READER_UNSYNCD:
798 // wait for unmodulated carrier
799 if (bit) {
800 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
801 }
802 break;
803
804 case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
805 if (!bit) {
806 // we went low, so this could be the beginning of a SOF
807 DecodeReader->posCount = 1;
808 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
809 }
810 break;
811
812 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
813 DecodeReader->posCount++;
814 if (bit) { // detected rising edge
815 if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
816 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
817 } else { // SOF
818 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
819 }
820 } else {
821 if (DecodeReader->posCount > 5) { // stayed low for too long
822 DecodeReaderReset(DecodeReader);
823 } else {
824 // do nothing, keep waiting
825 }
826 }
827 break;
828
829 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
830 DecodeReader->posCount++;
831 if (!bit) { // detected a falling edge
832 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
833 DecodeReaderReset(DecodeReader);
834 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
835 DecodeReader->Coding = CODING_1_OUT_OF_4;
836 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
837 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
838 DecodeReaderReset(DecodeReader);
839 } else { // SOF for 1 out of 256 coding
840 DecodeReader->Coding = CODING_1_OUT_OF_256;
841 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
842 }
843 } else {
844 if (DecodeReader->posCount > 29) { // stayed high for too long
845 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
846 } else {
847 // do nothing, keep waiting
848 }
849 }
850 break;
851
852 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
853 DecodeReader->posCount++;
854 if (bit) { // detected rising edge
855 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
856 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
857 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
858 } else {
859 DecodeReader->posCount = 1;
860 DecodeReader->bitCount = 0;
861 DecodeReader->byteCount = 0;
862 DecodeReader->sum1 = 1;
863 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
864 LED_B_ON();
865 }
866 } else { // CODING_1_OUT_OF_4
867 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
868 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
869 } else {
870 DecodeReader->posCount = 1;
871 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
872 }
873 }
874 } else {
875 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
876 if (DecodeReader->posCount > 34) { // signal stayed low for too long
877 DecodeReaderReset(DecodeReader);
878 } else {
879 // do nothing, keep waiting
880 }
881 } else { // CODING_1_OUT_OF_4
882 if (DecodeReader->posCount > 26) { // signal stayed low for too long
883 DecodeReaderReset(DecodeReader);
884 } else {
885 // do nothing, keep waiting
886 }
887 }
888 }
889 break;
890
891 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
892 DecodeReader->posCount++;
893 if (bit) {
894 if (DecodeReader->posCount == 9) {
895 DecodeReader->posCount = 1;
896 DecodeReader->bitCount = 0;
897 DecodeReader->byteCount = 0;
898 DecodeReader->sum1 = 1;
899 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
900 LED_B_ON();
901 } else {
902 // do nothing, keep waiting
903 }
904 } else { // unexpected falling edge
905 DecodeReaderReset(DecodeReader);
906 }
907 break;
908
909 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
910 DecodeReader->posCount++;
911 if (DecodeReader->posCount == 1) {
912 DecodeReader->sum1 = bit?1:0;
913 } else if (DecodeReader->posCount <= 4) {
914 if (bit) DecodeReader->sum1++;
915 } else if (DecodeReader->posCount == 5) {
916 DecodeReader->sum2 = bit?1:0;
917 } else {
918 if (bit) DecodeReader->sum2++;
919 }
920 if (DecodeReader->posCount == 8) {
921 DecodeReader->posCount = 0;
922 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
923 LED_B_OFF(); // Finished receiving
924 DecodeReaderReset(DecodeReader);
925 if (DecodeReader->byteCount != 0) {
926 return true;
927 }
928 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
929 DecodeReader->shiftReg >>= 2;
930 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
931 }
932 if (DecodeReader->bitCount == 15) { // we have a full byte
933 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
934 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
935 // buffer overflow, give up
936 LED_B_OFF();
937 DecodeReaderReset(DecodeReader);
938 }
939 DecodeReader->bitCount = 0;
940 DecodeReader->shiftReg = 0;
941 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
942 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
943 LED_D_ON();
944 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
945 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
946 }
947 }
948 } else {
949 DecodeReader->bitCount++;
950 }
951 }
952 break;
953
954 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
955 DecodeReader->posCount++;
956 if (DecodeReader->posCount == 1) {
957 DecodeReader->sum1 = bit?1:0;
958 } else if (DecodeReader->posCount <= 4) {
959 if (bit) DecodeReader->sum1++;
960 } else if (DecodeReader->posCount == 5) {
961 DecodeReader->sum2 = bit?1:0;
962 } else if (bit) {
963 DecodeReader->sum2++;
964 }
965 if (DecodeReader->posCount == 8) {
966 DecodeReader->posCount = 0;
967 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
968 LED_B_OFF(); // Finished receiving
969 DecodeReaderReset(DecodeReader);
970 if (DecodeReader->byteCount != 0) {
971 return true;
972 }
973 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
974 DecodeReader->shiftReg = DecodeReader->bitCount;
975 }
976 if (DecodeReader->bitCount == 255) { // we have a full byte
977 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
978 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
979 // buffer overflow, give up
980 LED_B_OFF();
981 DecodeReaderReset(DecodeReader);
982 }
983 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
984 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
985 LED_D_ON();
986 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
987 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
988 }
989 }
990 }
991 DecodeReader->bitCount++;
992 }
993 break;
994
995 case STATE_READER_RECEIVE_JAMMING:
996 DecodeReader->posCount++;
997 if (DecodeReader->Coding == CODING_1_OUT_OF_4) {
998 if (DecodeReader->posCount == 7*16) { // 7 bits jammed
999 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
1000 // FpgaDisableTracing();
1001 LED_D_OFF();
1002 } else if (DecodeReader->posCount == 8*16) {
1003 DecodeReader->posCount = 0;
1004 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
1005 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
1006 }
1007 } else {
1008 if (DecodeReader->posCount == 7*256) { // 7 bits jammend
1009 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
1010 LED_D_OFF();
1011 } else if (DecodeReader->posCount == 8*256) {
1012 DecodeReader->posCount = 0;
1013 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
1014 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
1015 }
1016 }
1017 break;
1018
1019 default:
1020 LED_B_OFF();
1021 DecodeReaderReset(DecodeReader);
1022 break;
1023 }
1024
1025 return false;
1026 }
1027
1028
1029 //-----------------------------------------------------------------------------
1030 // Receive a command (from the reader to us, where we are the simulated tag),
1031 // and store it in the given buffer, up to the given maximum length. Keeps
1032 // spinning, waiting for a well-framed command, until either we get one
1033 // (returns len) or someone presses the pushbutton on the board (returns -1).
1034 //
1035 // Assume that we're called with the SSC (to the FPGA) and ADC path set
1036 // correctly.
1037 //-----------------------------------------------------------------------------
1038
1039 int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
1040 int samples = 0;
1041 bool gotFrame = false;
1042 uint8_t b;
1043
1044 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1045
1046 // the decoder data structure
1047 DecodeReader_t DecodeReader = {0};
1048 DecodeReaderInit(&DecodeReader, received, max_len, 0, NULL);
1049
1050 // wait for last transfer to complete
1051 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1052
1053 LED_D_OFF();
1054 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1055
1056 // clear receive register and wait for next transfer
1057 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
1058 (void) temp;
1059 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
1060
1061 uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
1062
1063 // Setup and start DMA.
1064 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1065 uint8_t *upTo = dmaBuf;
1066
1067 for (;;) {
1068 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1069
1070 if (behindBy == 0) continue;
1071
1072 b = *upTo++;
1073 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1074 upTo = dmaBuf; // start reading the circular buffer from the beginning
1075 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1076 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
1077 break;
1078 }
1079 }
1080 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1081 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1082 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1083 }
1084
1085 for (int i = 7; i >= 0; i--) {
1086 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
1087 *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM; // end of EOF
1088 gotFrame = true;
1089 break;
1090 }
1091 samples++;
1092 }
1093
1094 if (gotFrame) {
1095 break;
1096 }
1097
1098 if (BUTTON_PRESS()) {
1099 DecodeReader.byteCount = -1;
1100 break;
1101 }
1102
1103 WDT_HIT();
1104 }
1105
1106 FpgaDisableSscDma();
1107
1108 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
1109 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
1110
1111 if (DecodeReader.byteCount > 0) {
1112 uint32_t sof_time = *eof_time
1113 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
1114 - 32 // time for SOF transfer
1115 - 16; // time for EOF transfer
1116 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*32, *eof_time*32, NULL, true);
1117 }
1118
1119 return DecodeReader.byteCount;
1120 }
1121
1122
1123 // Construct an identify (Inventory) request, which is the first
1124 // thing that you must send to a tag to get a response.
1125 static void BuildIdentifyRequest(uint8_t *cmd) {
1126 uint16_t crc;
1127 // one sub-carrier, inventory, 1 slot, fast rate
1128 cmd[0] = ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1 | ISO15693_REQ_DATARATE_HIGH;
1129 // inventory command code
1130 cmd[1] = 0x01;
1131 // no mask
1132 cmd[2] = 0x00;
1133 //Now the CRC
1134 crc = Iso15693Crc(cmd, 3);
1135 cmd[3] = crc & 0xff;
1136 cmd[4] = crc >> 8;
1137 }
1138
1139
1140 //-----------------------------------------------------------------------------
1141 // Start to read an ISO 15693 tag. We send an identify request, then wait
1142 // for the response. The response is not demodulated, just left in the buffer
1143 // so that it can be downloaded to a PC and processed there.
1144 //-----------------------------------------------------------------------------
1145 void AcquireRawAdcSamplesIso15693(void) {
1146 LED_A_ON();
1147
1148 uint8_t *dest = BigBuf_get_addr();
1149
1150 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1151 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1152 LED_D_ON();
1153 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1154 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1155
1156 uint8_t cmd[5];
1157 BuildIdentifyRequest(cmd);
1158 CodeIso15693AsReader(cmd, sizeof(cmd));
1159
1160 // Give the tags time to energize
1161 SpinDelay(100);
1162
1163 // Now send the command
1164 uint32_t start_time = 0;
1165 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1166
1167 // wait for last transfer to complete
1168 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) ;
1169
1170 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
1171
1172 for(int c = 0; c < 4000; ) {
1173 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1174 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1175 dest[c++] = r >> 5;
1176 }
1177 }
1178
1179 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1180 LEDsoff();
1181 }
1182
1183
1184 void SnoopIso15693(uint8_t jam_search_len, uint8_t *jam_search_string) {
1185
1186 LED_A_ON();
1187
1188 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1189
1190 clear_trace();
1191 set_tracing(true);
1192
1193 // The DMA buffer, used to stream samples from the FPGA
1194 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1195
1196 // Count of samples received so far, so that we can include timing
1197 // information in the trace buffer.
1198 int samples = 0;
1199
1200 DecodeTag_t DecodeTag = {0};
1201 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1202 DecodeTagInit(&DecodeTag, response, sizeof(response));
1203
1204 DecodeReader_t DecodeReader = {0};
1205 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1206 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd), jam_search_len, jam_search_string);
1207
1208 // Print some debug information about the buffer sizes
1209 if (DEBUG) {
1210 Dbprintf("Snooping buffers initialized:");
1211 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1212 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1213 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1214 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1215 }
1216 Dbprintf("Snoop started. Press PM3 Button to stop.");
1217
1218 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
1219 LED_D_OFF();
1220 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1221 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1222 StartCountSspClk();
1223 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1224
1225 bool TagIsActive = false;
1226 bool ReaderIsActive = false;
1227 bool ExpectTagAnswer = false;
1228 uint32_t dma_start_time = 0;
1229 uint16_t *upTo = dmaBuf;
1230
1231 uint16_t max_behindBy = 0;
1232
1233 // And now we loop, receiving samples.
1234 for(;;) {
1235 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1236 if (behindBy > max_behindBy) {
1237 max_behindBy = behindBy;
1238 }
1239
1240 if (behindBy == 0) continue;
1241
1242 samples++;
1243 if (samples == 1) {
1244 // DMA has transferred the very first data
1245 dma_start_time = GetCountSspClk() & 0xfffffff0;
1246 }
1247
1248 uint16_t snoopdata = *upTo++;
1249
1250 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1251 upTo = dmaBuf; // start reading the circular buffer from the beginning
1252 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1253 // FpgaDisableTracing();
1254 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1255 break;
1256 }
1257 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1258 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1259 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1260 WDT_HIT();
1261 if (BUTTON_PRESS()) {
1262 DbpString("Snoop stopped.");
1263 break;
1264 }
1265 }
1266 }
1267
1268 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1269 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1270 // FpgaDisableSscDma();
1271 uint32_t eof_time = dma_start_time + samples*16 + 8 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1272 if (DecodeReader.byteCount > 0) {
1273 uint32_t sof_time = eof_time
1274 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1275 - 32*16 // time for SOF transfer
1276 - 16*16; // time for EOF transfer
1277 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1278 }
1279 /* And ready to receive another command. */
1280 DecodeReaderReset(&DecodeReader);
1281 /* And also reset the demod code, which might have been */
1282 /* false-triggered by the commands from the reader. */
1283 DecodeTagReset(&DecodeTag);
1284 ReaderIsActive = false;
1285 ExpectTagAnswer = true;
1286 // upTo = dmaBuf;
1287 // samples = 0;
1288 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1289 // continue;
1290 } else if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1291 // FpgaDisableSscDma();
1292 uint32_t eof_time = dma_start_time + samples*16 + 16 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1293 if (DecodeReader.byteCount > 0) {
1294 uint32_t sof_time = eof_time
1295 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1296 - 32*16 // time for SOF transfer
1297 - 16*16; // time for EOF transfer
1298 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1299 }
1300 /* And ready to receive another command. */
1301 DecodeReaderReset(&DecodeReader);
1302 /* And also reset the demod code, which might have been */
1303 /* false-triggered by the commands from the reader. */
1304 DecodeTagReset(&DecodeTag);
1305 ReaderIsActive = false;
1306 ExpectTagAnswer = true;
1307 // upTo = dmaBuf;
1308 // samples = 0;
1309 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1310 // continue;
1311 } else {
1312 ReaderIsActive = (DecodeReader.state >= STATE_READER_RECEIVE_DATA_1_OUT_OF_4);
1313 }
1314 }
1315
1316 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1317 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1318 // FpgaDisableSscDma();
1319 uint32_t eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM_SNOOP; // end of EOF
1320 if (DecodeTag.lastBit == SOF_PART2) {
1321 eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
1322 }
1323 uint32_t sof_time = eof_time
1324 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
1325 - 32 * 16 // time for SOF transfer
1326 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
1327 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, eof_time*4, NULL, false);
1328 // And ready to receive another response.
1329 DecodeTagReset(&DecodeTag);
1330 DecodeReaderReset(&DecodeReader);
1331 ExpectTagAnswer = false;
1332 TagIsActive = false;
1333 // upTo = dmaBuf;
1334 // samples = 0;
1335 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1336 // continue;
1337 } else {
1338 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1339 }
1340 }
1341
1342 }
1343
1344 FpgaDisableSscDma();
1345
1346 DbpString("Snoop statistics:");
1347 Dbprintf(" ExpectTagAnswer: %d, TagIsActive: %d, ReaderIsActive: %d", ExpectTagAnswer, TagIsActive, ReaderIsActive);
1348 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1349 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1350 Dbprintf(" DecodeTag posCount: %d", DecodeTag.posCount);
1351 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1352 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1353 Dbprintf(" DecodeReader posCount: %d", DecodeReader.posCount);
1354 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1355 Dbprintf(" Max behindBy: %d", max_behindBy);
1356 }
1357
1358
1359 // Initialize the proxmark as iso15k reader
1360 void Iso15693InitReader() {
1361 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1362
1363 // Start from off (no field generated)
1364 LED_D_OFF();
1365 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1366 SpinDelay(10);
1367
1368 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1369 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1370
1371 // Give the tags time to energize
1372 LED_D_ON();
1373 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1374 SpinDelay(250);
1375 }
1376
1377 ///////////////////////////////////////////////////////////////////////
1378 // ISO 15693 Part 3 - Air Interface
1379 // This section basically contains transmission and receiving of bits
1380 ///////////////////////////////////////////////////////////////////////
1381
1382
1383 // uid is in transmission order (which is reverse of display order)
1384 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber, uint8_t *cmd) {
1385 uint16_t crc;
1386 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1387 // followed by the block data
1388 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1389 // READ BLOCK command code
1390 cmd[1] = ISO15693_READBLOCK;
1391 // UID may be optionally specified here
1392 // 64-bit UID
1393 cmd[2] = uid[0];
1394 cmd[3] = uid[1];
1395 cmd[4] = uid[2];
1396 cmd[5] = uid[3];
1397 cmd[6] = uid[4];
1398 cmd[7] = uid[5];
1399 cmd[8] = uid[6];
1400 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1401 // Block number to read
1402 cmd[10] = blockNumber;
1403 //Now the CRC
1404 crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1405 cmd[11] = crc & 0xff;
1406 cmd[12] = crc >> 8;
1407
1408 }
1409
1410
1411 // Now the VICC>VCD responses when we are simulating a tag
1412 static void BuildInventoryResponse(uint8_t *uid) {
1413 uint8_t cmd[12];
1414
1415 uint16_t crc;
1416
1417 cmd[0] = 0; // No error, no protocol format extension
1418 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1419 // 64-bit UID
1420 cmd[2] = uid[7]; //0x32;
1421 cmd[3] = uid[6]; //0x4b;
1422 cmd[4] = uid[5]; //0x03;
1423 cmd[5] = uid[4]; //0x01;
1424 cmd[6] = uid[3]; //0x00;
1425 cmd[7] = uid[2]; //0x10;
1426 cmd[8] = uid[1]; //0x05;
1427 cmd[9] = uid[0]; //0xe0;
1428 //Now the CRC
1429 crc = Iso15693Crc(cmd, 10);
1430 cmd[10] = crc & 0xff;
1431 cmd[11] = crc >> 8;
1432
1433 CodeIso15693AsTag(cmd, sizeof(cmd));
1434 }
1435
1436 // Universal Method for sending to and recv bytes from a tag
1437 // init ... should we initialize the reader?
1438 // speed ... 0 low speed, 1 hi speed
1439 // *recv will contain the tag's answer
1440 // return: length of received data, or -1 for timeout
1441 int SendDataTag(uint8_t *send, int sendlen, bool init, bool speed_fast, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint16_t timeout, uint32_t *eof_time) {
1442
1443 if (init) {
1444 Iso15693InitReader();
1445 StartCountSspClk();
1446 }
1447
1448 int answerLen = 0;
1449
1450 if (speed_fast) {
1451 // high speed (1 out of 4)
1452 CodeIso15693AsReader(send, sendlen);
1453 } else {
1454 // low speed (1 out of 256)
1455 CodeIso15693AsReader256(send, sendlen);
1456 }
1457
1458 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1459 uint32_t end_time = start_time + 32*(8*ToSendMax-4); // substract the 4 padding bits after EOF
1460 LogTrace_ISO15693(send, sendlen, start_time*4, end_time*4, NULL, true);
1461
1462 // Now wait for a response
1463 if (recv != NULL) {
1464 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, timeout, eof_time);
1465 }
1466
1467 return answerLen;
1468 }
1469
1470
1471 int SendDataTagEOF(uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint16_t timeout, uint32_t *eof_time) {
1472
1473 int answerLen = 0;
1474
1475 CodeIso15693AsReaderEOF();
1476
1477 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1478 uint32_t end_time = start_time + 32*(8*ToSendMax-4); // substract the 4 padding bits after EOF
1479 LogTrace_ISO15693(NULL, 0, start_time*4, end_time*4, NULL, true);
1480
1481 // Now wait for a response
1482 if (recv != NULL) {
1483 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, timeout, eof_time);
1484 }
1485
1486 return answerLen;
1487 }
1488
1489
1490 // --------------------------------------------------------------------
1491 // Debug Functions
1492 // --------------------------------------------------------------------
1493
1494 // Decodes a message from a tag and displays its metadata and content
1495 #define DBD15STATLEN 48
1496 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1497 char status[DBD15STATLEN+1]={0};
1498 uint16_t crc;
1499
1500 if (len > 3) {
1501 if (d[0] & ISO15693_RES_EXT)
1502 strncat(status,"ProtExt ", DBD15STATLEN);
1503 if (d[0] & ISO15693_RES_ERROR) {
1504 // error
1505 strncat(status,"Error ", DBD15STATLEN);
1506 switch (d[1]) {
1507 case 0x01:
1508 strncat(status,"01:notSupp", DBD15STATLEN);
1509 break;
1510 case 0x02:
1511 strncat(status,"02:notRecog", DBD15STATLEN);
1512 break;
1513 case 0x03:
1514 strncat(status,"03:optNotSupp", DBD15STATLEN);
1515 break;
1516 case 0x0f:
1517 strncat(status,"0f:noInfo", DBD15STATLEN);
1518 break;
1519 case 0x10:
1520 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1521 break;
1522 case 0x11:
1523 strncat(status,"11:lockAgain", DBD15STATLEN);
1524 break;
1525 case 0x12:
1526 strncat(status,"12:locked", DBD15STATLEN);
1527 break;
1528 case 0x13:
1529 strncat(status,"13:progErr", DBD15STATLEN);
1530 break;
1531 case 0x14:
1532 strncat(status,"14:lockErr", DBD15STATLEN);
1533 break;
1534 default:
1535 strncat(status,"unknownErr", DBD15STATLEN);
1536 }
1537 strncat(status," ", DBD15STATLEN);
1538 } else {
1539 strncat(status,"NoErr ", DBD15STATLEN);
1540 }
1541
1542 crc=Iso15693Crc(d,len-2);
1543 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1544 strncat(status,"CrcOK",DBD15STATLEN);
1545 else
1546 strncat(status,"CrcFail!",DBD15STATLEN);
1547
1548 Dbprintf("%s",status);
1549 }
1550 }
1551
1552
1553
1554 ///////////////////////////////////////////////////////////////////////
1555 // Functions called via USB/Client
1556 ///////////////////////////////////////////////////////////////////////
1557
1558 void SetDebugIso15693(uint32_t debug) {
1559 DEBUG=debug;
1560 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1561 return;
1562 }
1563
1564
1565 //---------------------------------------------------------------------------------------
1566 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector.
1567 // all demodulation performed in arm rather than host. - greg
1568 //---------------------------------------------------------------------------------------
1569 void ReaderIso15693(uint32_t parameter) {
1570
1571 LED_A_ON();
1572
1573 set_tracing(true);
1574
1575 uint8_t TagUID[8] = {0x00};
1576
1577 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1578
1579 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1580
1581 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1582 // Setup SSC
1583 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1584
1585 // Start from off (no field generated)
1586 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1587 SpinDelay(200);
1588
1589 // Give the tags time to energize
1590 LED_D_ON();
1591 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1592 SpinDelay(200);
1593 StartCountSspClk();
1594
1595
1596 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1597 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1598
1599 // Now send the IDENTIFY command
1600 uint8_t cmd[5];
1601 BuildIdentifyRequest(cmd);
1602 uint32_t start_time = 0;
1603 uint32_t eof_time;
1604 int answerLen = SendDataTag(cmd, sizeof(cmd), true, true, answer, sizeof(answer), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1605 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1606
1607 if (answerLen >= 12) { // we should do a better check than this
1608 TagUID[0] = answer[2];
1609 TagUID[1] = answer[3];
1610 TagUID[2] = answer[4];
1611 TagUID[3] = answer[5];
1612 TagUID[4] = answer[6];
1613 TagUID[5] = answer[7];
1614 TagUID[6] = answer[8]; // IC Manufacturer code
1615 TagUID[7] = answer[9]; // always E0
1616 }
1617
1618 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1619 DbdecodeIso15693Answer(answerLen, answer);
1620 Dbhexdump(answerLen, answer, false);
1621
1622 // UID is reverse
1623 if (answerLen >= 12)
1624 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1625 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1626 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1627
1628 // read all pages
1629 if (answerLen >= 12 && DEBUG) {
1630 for (int i = 0; i < 32; i++) { // sanity check, assume max 32 pages
1631 uint8_t cmd[13];
1632 BuildReadBlockRequest(TagUID, i, cmd);
1633 answerLen = SendDataTag(cmd, sizeof(cmd), false, true, answer, sizeof(answer), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1634 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1635 if (answerLen > 0) {
1636 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1637 DbdecodeIso15693Answer(answerLen, answer);
1638 Dbhexdump(answerLen, answer, false);
1639 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1640 }
1641 }
1642 }
1643
1644 // for the time being, switch field off to protect RDV4
1645 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1646 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1647 LED_D_OFF();
1648
1649 LED_A_OFF();
1650 }
1651
1652
1653 // Simulate an ISO15693 TAG.
1654 // For Inventory command: print command and send Inventory Response with given UID
1655 // TODO: interpret other reader commands and send appropriate response
1656 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
1657
1658 LED_A_ON();
1659
1660 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1661 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1662 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1663 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1664
1665 StartCountSspClk();
1666
1667 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1668
1669 // Build a suitable response to the reader INVENTORY command
1670 BuildInventoryResponse(uid);
1671
1672 // Listen to reader
1673 while (!BUTTON_PRESS()) {
1674 uint32_t eof_time = 0, start_time = 0;
1675 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1676
1677 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1678 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1679 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM;
1680 TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
1681 }
1682
1683 Dbprintf("%d bytes read from reader:", cmd_len);
1684 Dbhexdump(cmd_len, cmd, false);
1685 }
1686
1687 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1688 LED_D_OFF();
1689 LED_A_OFF();
1690 }
1691
1692
1693 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1694 // (some manufactures offer a way to read the AFI, though)
1695 void BruteforceIso15693Afi(uint32_t speed) {
1696 LED_A_ON();
1697
1698 uint8_t data[6];
1699 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1700 int datalen = 0, recvlen = 0;
1701 uint32_t eof_time;
1702
1703 // first without AFI
1704 // Tags should respond without AFI and with AFI=0 even when AFI is active
1705
1706 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1707 data[1] = ISO15693_INVENTORY;
1708 data[2] = 0; // mask length
1709 datalen = Iso15693AddCrc(data,3);
1710 uint32_t start_time = GetCountSspClk();
1711 recvlen = SendDataTag(data, datalen, true, speed, recv, sizeof(recv), 0, ISO15693_READER_TIMEOUT, &eof_time);
1712 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1713 WDT_HIT();
1714 if (recvlen>=12) {
1715 Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
1716 }
1717
1718 // now with AFI
1719
1720 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1721 data[1] = ISO15693_INVENTORY;
1722 data[2] = 0; // AFI
1723 data[3] = 0; // mask length
1724
1725 for (int i = 0; i < 256; i++) {
1726 data[2] = i & 0xFF;
1727 datalen = Iso15693AddCrc(data,4);
1728 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1729 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1730 WDT_HIT();
1731 if (recvlen >= 12) {
1732 Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
1733 }
1734 }
1735 Dbprintf("AFI Bruteforcing done.");
1736
1737 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1738 LED_D_OFF();
1739 LED_A_OFF();
1740
1741 }
1742
1743 // Allows to directly send commands to the tag via the client
1744 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1745
1746 LED_A_ON();
1747
1748 int recvlen = 0;
1749 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1750 uint32_t eof_time;
1751
1752 uint16_t timeout;
1753 bool request_answer = false;
1754
1755 switch (data[1]) {
1756 case ISO15693_WRITEBLOCK:
1757 case ISO15693_LOCKBLOCK:
1758 case ISO15693_WRITE_MULTI_BLOCK:
1759 case ISO15693_WRITE_AFI:
1760 case ISO15693_LOCK_AFI:
1761 case ISO15693_WRITE_DSFID:
1762 case ISO15693_LOCK_DSFID:
1763 timeout = ISO15693_READER_TIMEOUT_WRITE;
1764 request_answer = data[0] & ISO15693_REQ_OPTION;
1765 break;
1766 default:
1767 timeout = ISO15693_READER_TIMEOUT;
1768 }
1769
1770 if (DEBUG) {
1771 Dbprintf("SEND:");
1772 Dbhexdump(datalen, data, false);
1773 }
1774
1775 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0, timeout, &eof_time);
1776
1777 if (request_answer) { // send a single EOF to get the tag response
1778 recvlen = SendDataTagEOF((recv?recvbuf:NULL), sizeof(recvbuf), 0, ISO15693_READER_TIMEOUT, &eof_time);
1779 }
1780
1781 // for the time being, switch field off to protect rdv4.0
1782 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1783 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1784 LED_D_OFF();
1785
1786 if (recv) {
1787 if (DEBUG) {
1788 Dbprintf("RECV:");
1789 if (recvlen > 0) {
1790 Dbhexdump(recvlen, recvbuf, false);
1791 DbdecodeIso15693Answer(recvlen, recvbuf);
1792 }
1793 }
1794 if (recvlen > ISO15693_MAX_RESPONSE_LENGTH) {
1795 recvlen = ISO15693_MAX_RESPONSE_LENGTH;
1796 }
1797 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1798 }
1799
1800 LED_A_OFF();
1801 }
1802
1803 //-----------------------------------------------------------------------------
1804 // Work with "magic Chinese" card.
1805 //
1806 //-----------------------------------------------------------------------------
1807
1808 // Set the UID on Magic ISO15693 tag (based on Iceman's LUA-script).
1809 void SetTag15693Uid(uint8_t *uid) {
1810
1811 LED_A_ON();
1812
1813 uint8_t cmd[4][9] = {
1814 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x3e, 0x00, 0x00, 0x00, 0x00},
1815 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x3f, 0x69, 0x96, 0x00, 0x00},
1816 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x38},
1817 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x39}
1818 };
1819
1820 uint16_t crc;
1821
1822 int recvlen = 0;
1823 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1824 uint32_t eof_time;
1825
1826 // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
1827 cmd[2][3] = uid[7];
1828 cmd[2][4] = uid[6];
1829 cmd[2][5] = uid[5];
1830 cmd[2][6] = uid[4];
1831
1832 // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
1833 cmd[3][3] = uid[3];
1834 cmd[3][4] = uid[2];
1835 cmd[3][5] = uid[1];
1836 cmd[3][6] = uid[0];
1837
1838 uint32_t start_time = 0;
1839
1840 for (int i = 0; i < 4; i++) {
1841 // Add the CRC
1842 crc = Iso15693Crc(cmd[i], 7);
1843 cmd[i][7] = crc & 0xff;
1844 cmd[i][8] = crc >> 8;
1845
1846 recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), i==0?true:false, true, recvbuf, sizeof(recvbuf), start_time, ISO15693_READER_TIMEOUT_WRITE, &eof_time);
1847 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1848 if (DEBUG) {
1849 Dbprintf("SEND:");
1850 Dbhexdump(sizeof(cmd[i]), cmd[i], false);
1851 Dbprintf("RECV:");
1852 if (recvlen > 0) {
1853 Dbhexdump(recvlen, recvbuf, false);
1854 DbdecodeIso15693Answer(recvlen, recvbuf);
1855 }
1856 }
1857 // Note: need to know if we expect an answer from one of the magic commands
1858 // if (recvlen < 0) {
1859 // break;
1860 // }
1861 }
1862
1863 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1864 LED_D_OFF();
1865
1866 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, recvlen);
1867 LED_A_OFF();
1868 }
1869
1870
1871
1872 // --------------------------------------------------------------------
1873 // -- Misc & deprecated functions
1874 // --------------------------------------------------------------------
1875
1876 /*
1877
1878 // do not use; has a fix UID
1879 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1880 {
1881 uint8_t cmd[12];
1882
1883 uint16_t crc;
1884 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1885 // followed by the block data
1886 // one sub-carrier, inventory, 1 slot, fast rate
1887 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1888 // System Information command code
1889 cmd[1] = 0x2B;
1890 // UID may be optionally specified here
1891 // 64-bit UID
1892 cmd[2] = 0x32;
1893 cmd[3]= 0x4b;
1894 cmd[4] = 0x03;
1895 cmd[5] = 0x01;
1896 cmd[6] = 0x00;
1897 cmd[7] = 0x10;
1898 cmd[8] = 0x05;
1899 cmd[9]= 0xe0; // always e0 (not exactly unique)
1900 //Now the CRC
1901 crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1902 cmd[10] = crc & 0xff;
1903 cmd[11] = crc >> 8;
1904
1905 CodeIso15693AsReader(cmd, sizeof(cmd));
1906 }
1907
1908
1909 // do not use; has a fix UID
1910 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1911 {
1912 uint8_t cmd[14];
1913
1914 uint16_t crc;
1915 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1916 // followed by the block data
1917 // one sub-carrier, inventory, 1 slot, fast rate
1918 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1919 // READ Multi BLOCK command code
1920 cmd[1] = 0x23;
1921 // UID may be optionally specified here
1922 // 64-bit UID
1923 cmd[2] = 0x32;
1924 cmd[3]= 0x4b;
1925 cmd[4] = 0x03;
1926 cmd[5] = 0x01;
1927 cmd[6] = 0x00;
1928 cmd[7] = 0x10;
1929 cmd[8] = 0x05;
1930 cmd[9]= 0xe0; // always e0 (not exactly unique)
1931 // First Block number to read
1932 cmd[10] = 0x00;
1933 // Number of Blocks to read
1934 cmd[11] = 0x2f; // read quite a few
1935 //Now the CRC
1936 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1937 cmd[12] = crc & 0xff;
1938 cmd[13] = crc >> 8;
1939
1940 CodeIso15693AsReader(cmd, sizeof(cmd));
1941 }
1942
1943 // do not use; has a fix UID
1944 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1945 {
1946 uint8_t cmd[14];
1947
1948 uint16_t crc;
1949 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1950 // followed by the block data
1951 // one sub-carrier, inventory, 1 slot, fast rate
1952 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1953 // READ BLOCK command code
1954 cmd[1] = CmdCode;
1955 // UID may be optionally specified here
1956 // 64-bit UID
1957 cmd[2] = 0x32;
1958 cmd[3]= 0x4b;
1959 cmd[4] = 0x03;
1960 cmd[5] = 0x01;
1961 cmd[6] = 0x00;
1962 cmd[7] = 0x10;
1963 cmd[8] = 0x05;
1964 cmd[9]= 0xe0; // always e0 (not exactly unique)
1965 // Parameter
1966 cmd[10] = 0x00;
1967 cmd[11] = 0x0a;
1968
1969 // cmd[12] = 0x00;
1970 // cmd[13] = 0x00; //Now the CRC
1971 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1972 cmd[12] = crc & 0xff;
1973 cmd[13] = crc >> 8;
1974
1975 CodeIso15693AsReader(cmd, sizeof(cmd));
1976 }
1977
1978 // do not use; has a fix UID
1979 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1980 {
1981 uint8_t cmd[14];
1982
1983 uint16_t crc;
1984 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1985 // followed by the block data
1986 // one sub-carrier, inventory, 1 slot, fast rate
1987 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1988 // READ BLOCK command code
1989 cmd[1] = CmdCode;
1990 // UID may be optionally specified here
1991 // 64-bit UID
1992 cmd[2] = 0x32;
1993 cmd[3]= 0x4b;
1994 cmd[4] = 0x03;
1995 cmd[5] = 0x01;
1996 cmd[6] = 0x00;
1997 cmd[7] = 0x10;
1998 cmd[8] = 0x05;
1999 cmd[9]= 0xe0; // always e0 (not exactly unique)
2000 // Parameter
2001 cmd[10] = 0x05; // for custom codes this must be manufacturer code
2002 cmd[11] = 0x00;
2003
2004 // cmd[12] = 0x00;
2005 // cmd[13] = 0x00; //Now the CRC
2006 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
2007 cmd[12] = crc & 0xff;
2008 cmd[13] = crc >> 8;
2009
2010 CodeIso15693AsReader(cmd, sizeof(cmd));
2011 }
2012
2013
2014
2015
2016 */
2017
2018
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