1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
24 // + 22279: : 0c 03 e8 01
26 // ...with an incorrect answer...
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
30 // We still left the error signalling bytes in the traces like 0xbb
32 // A correct trace should look like this:
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
37 //-----------------------------------------------------------------------------
39 #include "proxmark3.h"
44 // Needed for CRC in emulation mode;
45 // same construction as in ISO 14443;
46 // different initial value (CRC_ICLASS)
47 #include "iso14443crc.h"
49 static int timeout
= 4096;
52 // Sequence D: 11110000 modulation with subcarrier during first half
53 // Sequence E: 00001111 modulation with subcarrier during second half
54 // Sequence F: 00000000 no modulation with subcarrier
56 // Sequence X: 00001100 drop after half a period
57 // Sequence Y: 00000000 no drop
58 // Sequence Z: 11000000 drop at start
63 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
);
65 //-----------------------------------------------------------------------------
66 // The software UART that receives commands from the reader, and its state
68 //-----------------------------------------------------------------------------
72 STATE_START_OF_COMMUNICATION
,
93 static RAMFUNC
int OutOfNDecoding(int bit
)
99 Uart
.bitBuffer
= bit
^ 0xFF0;
103 Uart
.bitBuffer
<<= 4;
104 Uart
.bitBuffer
^= bit
;
108 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
111 if(Uart.byteCnt > 15) { return TRUE; }
117 if(Uart
.state
!= STATE_UNSYNCD
) {
120 if((Uart
.bitBuffer
& Uart
.syncBit
) ^ Uart
.syncBit
) {
126 if(((Uart
.bitBuffer
<< 1) & Uart
.syncBit
) ^ Uart
.syncBit
) {
132 if(bit
!= bitright
) { bit
= bitright
; }
135 // So, now we only have to deal with *bit*, lets see...
136 if(Uart
.posCnt
== 1) {
137 // measurement first half bitperiod
139 // Drop in first half means that we are either seeing
142 if(Uart
.nOutOfCnt
== 1) {
143 // End of Communication
144 Uart
.state
= STATE_UNSYNCD
;
146 if(Uart
.byteCnt
== 0) {
147 // Its not straightforward to show single EOFs
148 // So just leave it and do not return TRUE
149 Uart
.output
[Uart
.byteCnt
] = 0xf0;
152 // Calculate the parity bit for the client...
159 else if(Uart
.state
!= STATE_START_OF_COMMUNICATION
) {
160 // When not part of SOF or EOF, it is an error
161 Uart
.state
= STATE_UNSYNCD
;
168 // measurement second half bitperiod
169 // Count the bitslot we are in... (ISO 15693)
173 if(Uart
.dropPosition
) {
174 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
180 // It is an error if we already have seen a drop in current frame
181 Uart
.state
= STATE_UNSYNCD
;
185 Uart
.dropPosition
= Uart
.nOutOfCnt
;
192 if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
&& Uart
.OutOfCnt
== 4) {
195 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
196 if(Uart
.dropPosition
== 4) {
197 Uart
.state
= STATE_RECEIVING
;
200 else if(Uart
.dropPosition
== 3) {
201 Uart
.state
= STATE_RECEIVING
;
203 //Uart.output[Uart.byteCnt] = 0xdd;
207 Uart
.state
= STATE_UNSYNCD
;
210 Uart
.dropPosition
= 0;
215 if(!Uart
.dropPosition
) {
216 Uart
.state
= STATE_UNSYNCD
;
225 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
226 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
228 Uart
.shiftReg
^= ((Uart
.dropPosition
& 0x03) << 6);
230 Uart
.dropPosition
= 0;
232 if(Uart
.bitCnt
== 8) {
233 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
& 0xff);
236 // Calculate the parity bit for the client...
237 Uart
.parityBits
<<= 1;
238 Uart
.parityBits
^= OddByteParity
[(Uart
.shiftReg
& 0xff)];
246 else if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
) {
249 if(!Uart
.dropPosition
) {
250 Uart
.state
= STATE_UNSYNCD
;
256 Uart
.output
[Uart
.byteCnt
] = (Uart
.dropPosition
& 0xff);
259 // Calculate the parity bit for the client...
260 Uart
.parityBits
<<= 1;
261 Uart
.parityBits
^= OddByteParity
[(Uart
.dropPosition
& 0xff)];
266 Uart
.dropPosition
= 0;
271 Uart.output[Uart.byteCnt] = 0xAA;
273 Uart.output[Uart.byteCnt] = error & 0xFF;
275 Uart.output[Uart.byteCnt] = 0xAA;
277 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
279 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
281 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
283 Uart.output[Uart.byteCnt] = 0xAA;
291 bit
= Uart
.bitBuffer
& 0xf0;
293 bit
^= 0x0F; // drops become 1s ;-)
295 // should have been high or at least (4 * 128) / fc
296 // according to ISO this should be at least (9 * 128 + 20) / fc
297 if(Uart
.highCnt
== 8) {
298 // we went low, so this could be start of communication
299 // it turns out to be safer to choose a less significant
300 // syncbit... so we check whether the neighbour also represents the drop
301 Uart
.posCnt
= 1; // apparently we are busy with our first half bit period
302 Uart
.syncBit
= bit
& 8;
304 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; }
305 else if(bit
& 4) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; bit
<<= 2; }
306 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; }
307 else if(bit
& 2) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; bit
<<= 1; }
308 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0;
309 if(Uart
.syncBit
&& (Uart
.bitBuffer
& 8)) {
312 // the first half bit period is expected in next sample
317 else if(bit
& 1) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0; }
320 Uart
.state
= STATE_START_OF_COMMUNICATION
;
325 Uart
.OutOfCnt
= 4; // Start at 1/4, could switch to 1/256
326 Uart
.dropPosition
= 0;
335 if(Uart
.highCnt
< 8) {
344 //=============================================================================
346 //=============================================================================
351 DEMOD_START_OF_COMMUNICATION
,
352 DEMOD_START_OF_COMMUNICATION2
,
353 DEMOD_START_OF_COMMUNICATION3
,
357 DEMOD_END_OF_COMMUNICATION
,
358 DEMOD_END_OF_COMMUNICATION2
,
382 static RAMFUNC
int ManchesterDecoding(int v
)
389 Demod
.buffer
= Demod
.buffer2
;
390 Demod
.buffer2
= Demod
.buffer3
;
398 if(Demod
.state
==DEMOD_UNSYNCD
) {
399 Demod
.output
[Demod
.len
] = 0xfa;
402 Demod
.posCount
= 1; // This is the first half bit period, so after syncing handle the second part
405 Demod
.syncBit
= 0x08;
412 Demod
.syncBit
= 0x04;
419 Demod
.syncBit
= 0x02;
422 if(bit
& 0x01 && Demod
.syncBit
) {
423 Demod
.syncBit
= 0x01;
428 Demod
.state
= DEMOD_START_OF_COMMUNICATION
;
429 Demod
.sub
= SUB_FIRST_HALF
;
432 Demod
.parityBits
= 0;
435 //if(trigger) LED_A_OFF(); // Not useful in this case...
436 switch(Demod
.syncBit
) {
437 case 0x08: Demod
.samples
= 3; break;
438 case 0x04: Demod
.samples
= 2; break;
439 case 0x02: Demod
.samples
= 1; break;
440 case 0x01: Demod
.samples
= 0; break;
442 // SOF must be long burst... otherwise stay unsynced!!!
443 if(!(Demod
.buffer
& Demod
.syncBit
) || !(Demod
.buffer2
& Demod
.syncBit
)) {
444 Demod
.state
= DEMOD_UNSYNCD
;
448 // SOF must be long burst... otherwise stay unsynced!!!
449 if(!(Demod
.buffer2
& Demod
.syncBit
) || !(Demod
.buffer3
& Demod
.syncBit
)) {
450 Demod
.state
= DEMOD_UNSYNCD
;
460 modulation
= bit
& Demod
.syncBit
;
461 modulation
|= ((bit
<< 1) ^ ((Demod
.buffer
& 0x08) >> 3)) & Demod
.syncBit
;
462 //modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
466 if(Demod
.posCount
==0) {
469 Demod
.sub
= SUB_FIRST_HALF
;
472 Demod
.sub
= SUB_NONE
;
477 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
478 if(Demod.state!=DEMOD_ERROR_WAIT) {
479 Demod.state = DEMOD_ERROR_WAIT;
480 Demod.output[Demod.len] = 0xaa;
484 //else if(modulation) {
486 if(Demod
.sub
== SUB_FIRST_HALF
) {
487 Demod
.sub
= SUB_BOTH
;
490 Demod
.sub
= SUB_SECOND_HALF
;
493 else if(Demod
.sub
== SUB_NONE
) {
494 if(Demod
.state
== DEMOD_SOF_COMPLETE
) {
495 Demod
.output
[Demod
.len
] = 0x0f;
497 Demod
.parityBits
<<= 1;
498 Demod
.parityBits
^= OddByteParity
[0x0f];
499 Demod
.state
= DEMOD_UNSYNCD
;
504 Demod
.state
= DEMOD_ERROR_WAIT
;
507 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
508 Demod.state = DEMOD_ERROR_WAIT;
509 Demod.output[Demod.len] = 0xaa;
514 switch(Demod
.state
) {
515 case DEMOD_START_OF_COMMUNICATION
:
516 if(Demod
.sub
== SUB_BOTH
) {
517 //Demod.state = DEMOD_MANCHESTER_D;
518 Demod
.state
= DEMOD_START_OF_COMMUNICATION2
;
520 Demod
.sub
= SUB_NONE
;
523 Demod
.output
[Demod
.len
] = 0xab;
524 Demod
.state
= DEMOD_ERROR_WAIT
;
528 case DEMOD_START_OF_COMMUNICATION2
:
529 if(Demod
.sub
== SUB_SECOND_HALF
) {
530 Demod
.state
= DEMOD_START_OF_COMMUNICATION3
;
533 Demod
.output
[Demod
.len
] = 0xab;
534 Demod
.state
= DEMOD_ERROR_WAIT
;
538 case DEMOD_START_OF_COMMUNICATION3
:
539 if(Demod
.sub
== SUB_SECOND_HALF
) {
540 // Demod.state = DEMOD_MANCHESTER_D;
541 Demod
.state
= DEMOD_SOF_COMPLETE
;
542 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
546 Demod
.output
[Demod
.len
] = 0xab;
547 Demod
.state
= DEMOD_ERROR_WAIT
;
551 case DEMOD_SOF_COMPLETE
:
552 case DEMOD_MANCHESTER_D
:
553 case DEMOD_MANCHESTER_E
:
554 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
555 // 00001111 = 1 (0 in 14443)
556 if(Demod
.sub
== SUB_SECOND_HALF
) { // SUB_FIRST_HALF
558 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) ^ 0x100;
559 Demod
.state
= DEMOD_MANCHESTER_D
;
561 else if(Demod
.sub
== SUB_FIRST_HALF
) { // SUB_SECOND_HALF
563 Demod
.shiftReg
>>= 1;
564 Demod
.state
= DEMOD_MANCHESTER_E
;
566 else if(Demod
.sub
== SUB_BOTH
) {
567 Demod
.state
= DEMOD_MANCHESTER_F
;
570 Demod
.state
= DEMOD_ERROR_WAIT
;
575 case DEMOD_MANCHESTER_F
:
576 // Tag response does not need to be a complete byte!
577 if(Demod
.len
> 0 || Demod
.bitCount
> 0) {
578 if(Demod
.bitCount
> 1) { // was > 0, do not interpret last closing bit, is part of EOF
579 Demod
.shiftReg
>>= (9 - Demod
.bitCount
);
580 Demod
.output
[Demod
.len
] = Demod
.shiftReg
& 0xff;
582 // No parity bit, so just shift a 0
583 Demod
.parityBits
<<= 1;
586 Demod
.state
= DEMOD_UNSYNCD
;
590 Demod
.output
[Demod
.len
] = 0xad;
591 Demod
.state
= DEMOD_ERROR_WAIT
;
596 case DEMOD_ERROR_WAIT
:
597 Demod
.state
= DEMOD_UNSYNCD
;
601 Demod
.output
[Demod
.len
] = 0xdd;
602 Demod
.state
= DEMOD_UNSYNCD
;
606 /*if(Demod.bitCount>=9) {
607 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
610 Demod.parityBits <<= 1;
611 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
616 if(Demod
.bitCount
>=8) {
617 Demod
.shiftReg
>>= 1;
618 Demod
.output
[Demod
.len
] = (Demod
.shiftReg
& 0xff);
621 // FOR ISO15639 PARITY NOT SEND OTA, JUST CALCULATE IT FOR THE CLIENT
622 Demod
.parityBits
<<= 1;
623 Demod
.parityBits
^= OddByteParity
[(Demod
.shiftReg
& 0xff)];
630 Demod
.output
[Demod
.len
] = 0xBB;
632 Demod
.output
[Demod
.len
] = error
& 0xFF;
634 Demod
.output
[Demod
.len
] = 0xBB;
636 Demod
.output
[Demod
.len
] = bit
& 0xFF;
638 Demod
.output
[Demod
.len
] = Demod
.buffer
& 0xFF;
641 Demod
.output
[Demod
.len
] = Demod
.buffer2
& 0xFF;
643 Demod
.output
[Demod
.len
] = Demod
.syncBit
& 0xFF;
645 Demod
.output
[Demod
.len
] = 0xBB;
652 } // end (state != UNSYNCED)
657 //=============================================================================
658 // Finally, a `sniffer' for iClass communication
659 // Both sides of communication!
660 //=============================================================================
662 //-----------------------------------------------------------------------------
663 // Record the sequence of commands sent by the reader to the tag, with
664 // triggering so that we start recording at the point that the tag is moved
666 //-----------------------------------------------------------------------------
667 void RAMFUNC
SnoopIClass(void)
671 // We won't start recording the frames that we acquire until we trigger;
672 // a good trigger condition to get started is probably when we see a
673 // response from the tag.
674 //int triggered = FALSE; // FALSE to wait first for card
676 // The command (reader -> tag) that we're receiving.
677 // The length of a received command will in most cases be no more than 18 bytes.
678 // So 32 should be enough!
679 uint8_t *readerToTagCmd
= (((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
);
680 // The response (tag -> reader) that we're receiving.
681 uint8_t *tagToReaderResponse
= (((uint8_t *)BigBuf
) + RECV_RES_OFFSET
);
683 // reset traceLen to 0
684 iso14a_set_tracing(TRUE
);
685 iso14a_clear_trace();
686 iso14a_set_trigger(FALSE
);
688 // The DMA buffer, used to stream samples from the FPGA
689 int8_t *dmaBuf
= ((int8_t *)BigBuf
) + DMA_BUFFER_OFFSET
;
695 // Count of samples received so far, so that we can include timing
696 // information in the trace buffer.
700 memset(trace
, 0x44, RECV_CMD_OFFSET
);
702 // Set up the demodulator for tag -> reader responses.
703 Demod
.output
= tagToReaderResponse
;
705 Demod
.state
= DEMOD_UNSYNCD
;
707 // Setup for the DMA.
710 lastRxCounter
= DMA_BUFFER_SIZE
;
711 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
713 // And the reader -> tag commands
714 memset(&Uart
, 0, sizeof(Uart
));
715 Uart
.output
= readerToTagCmd
;
716 Uart
.byteCntMax
= 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
717 Uart
.state
= STATE_UNSYNCD
;
719 // And put the FPGA in the appropriate mode
720 // Signal field is off with the appropriate LED
722 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_SNIFFER
);
723 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
730 // And now we loop, receiving samples.
734 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
736 if(behindBy
> maxBehindBy
) {
737 maxBehindBy
= behindBy
;
739 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy
);
743 if(behindBy
< 1) continue;
749 if(upTo
- dmaBuf
> DMA_BUFFER_SIZE
) {
750 upTo
-= DMA_BUFFER_SIZE
;
751 lastRxCounter
+= DMA_BUFFER_SIZE
;
752 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
753 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
760 decbyte
^= (1 << (3 - div
));
763 // FOR READER SIDE COMMUMICATION...
766 decbyter
^= (smpl
& 0x30);
770 if((div
+ 1) % 2 == 0) {
772 if(OutOfNDecoding((smpl
& 0xF0) >> 4)) {
773 rsamples
= samples
- Uart
.samples
;
776 if(!LogTrace(readerToTagCmd
,Uart
.byteCnt
, rsamples
, Uart
.parityBits
,TRUE
)) break;
777 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
779 /* And ready to receive another command. */
780 Uart
.state
= STATE_UNSYNCD
;
781 /* And also reset the demod code, which might have been */
782 /* false-triggered by the commands from the reader. */
783 Demod
.state
= DEMOD_UNSYNCD
;
792 if(ManchesterDecoding(smpl
& 0x0F)) {
793 rsamples
= samples
- Demod
.samples
;
796 if(!LogTrace(tagToReaderResponse
,Demod
.len
, rsamples
, Demod
.parityBits
,FALSE
)) break;
797 //if (!LogTrace(NULL, 0, Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, 0, FALSE)) break;
800 // And ready to receive another response.
801 memset(&Demod
, 0, sizeof(Demod
));
802 Demod
.output
= tagToReaderResponse
;
803 Demod
.state
= DEMOD_UNSYNCD
;
813 DbpString("cancelled_a");
818 DbpString("COMMAND FINISHED");
820 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
821 Dbprintf("%x %x %x", Uart
.byteCntMax
, traceLen
, (int)Uart
.output
[0]);
824 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
825 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
826 Dbprintf("%x %x %x", Uart
.byteCntMax
, traceLen
, (int)Uart
.output
[0]);
833 void rotateCSN(uint8_t* originalCSN
, uint8_t* rotatedCSN
) {
835 for(i
= 0; i
< 8; i
++) {
836 rotatedCSN
[i
] = (originalCSN
[i
] >> 3) | (originalCSN
[(i
+1)%8] << 5);
840 //-----------------------------------------------------------------------------
841 // Wait for commands from reader
842 // Stop when button is pressed
843 // Or return TRUE when command is captured
844 //-----------------------------------------------------------------------------
845 static int GetIClassCommandFromReader(uint8_t *received
, int *len
, int maxLen
)
847 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
848 // only, since we are receiving, not transmitting).
849 // Signal field is off with the appropriate LED
851 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
853 // Now run a `software UART' on the stream of incoming samples.
854 Uart
.output
= received
;
855 Uart
.byteCntMax
= maxLen
;
856 Uart
.state
= STATE_UNSYNCD
;
861 if(BUTTON_PRESS()) return FALSE
;
863 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
864 AT91C_BASE_SSC
->SSC_THR
= 0x00;
866 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
867 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
868 /*if(OutOfNDecoding((b & 0xf0) >> 4)) {
872 if(OutOfNDecoding(b
& 0x0f)) {
881 //-----------------------------------------------------------------------------
882 // Prepare tag messages
883 //-----------------------------------------------------------------------------
884 static void CodeIClassTagAnswer(const uint8_t *cmd
, int len
)
891 ToSend
[++ToSendMax
] = 0x00;
892 ToSend
[++ToSendMax
] = 0x00;
893 ToSend
[++ToSendMax
] = 0x00;
894 ToSend
[++ToSendMax
] = 0xff;
895 ToSend
[++ToSendMax
] = 0xff;
896 ToSend
[++ToSendMax
] = 0xff;
897 ToSend
[++ToSendMax
] = 0x00;
898 ToSend
[++ToSendMax
] = 0xff;
900 for(i
= 0; i
< len
; i
++) {
905 for(j
= 0; j
< 8; j
++) {
907 ToSend
[++ToSendMax
] = 0x00;
908 ToSend
[++ToSendMax
] = 0xff;
910 ToSend
[++ToSendMax
] = 0xff;
911 ToSend
[++ToSendMax
] = 0x00;
918 ToSend
[++ToSendMax
] = 0xff;
919 ToSend
[++ToSendMax
] = 0x00;
920 ToSend
[++ToSendMax
] = 0xff;
921 ToSend
[++ToSendMax
] = 0xff;
922 ToSend
[++ToSendMax
] = 0xff;
923 ToSend
[++ToSendMax
] = 0x00;
924 ToSend
[++ToSendMax
] = 0x00;
925 ToSend
[++ToSendMax
] = 0x00;
927 // Convert from last byte pos to length
932 static void CodeIClassTagSOF()
937 ToSend
[++ToSendMax
] = 0x00;
938 ToSend
[++ToSendMax
] = 0x00;
939 ToSend
[++ToSendMax
] = 0x00;
940 ToSend
[++ToSendMax
] = 0xff;
941 ToSend
[++ToSendMax
] = 0xff;
942 ToSend
[++ToSendMax
] = 0xff;
943 ToSend
[++ToSendMax
] = 0x00;
944 ToSend
[++ToSendMax
] = 0xff;
946 // Convert from last byte pos to length
951 * @brief SimulateIClass simulates an iClass card.
952 * @param arg0 type of simulation
953 * - 0 uses the first 8 bytes in usb data as CSN
954 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
955 * in the usb data. This mode collects MAC from the reader, in order to do an offline
956 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
957 * - Other : Uses the default CSN (031fec8af7ff12e0)
958 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
962 void SimulateIClass(uint32_t arg0
, uint32_t arg1
, uint32_t arg2
, uint8_t *datain
)
964 uint32_t simType
= arg0
;
965 uint32_t numberOfCSNS
= arg1
;
967 // Enable and clear the trace
968 iso14a_set_tracing(TRUE
);
969 iso14a_clear_trace();
971 uint8_t csn_crc
[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
974 // Use the CSN from commandline
975 memcpy(csn_crc
, datain
, 8);
976 doIClassSimulation(csn_crc
,0);
977 }else if(simType
== 1)
979 doIClassSimulation(csn_crc
,0);
981 else if(simType
== 2)
983 Dbprintf("Going into attack mode");
984 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
985 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
986 // in order to obtain the keys, as in the "dismantling iclass"-paper.
987 for(int i
= 0 ; i
< numberOfCSNS
&& i
*8+8 < USB_CMD_DATA_SIZE
; i
++)
989 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
991 memcpy(csn_crc
, datain
+(i
*8), 8);
992 doIClassSimulation(csn_crc
,1);
995 // We may want a mode here where we hardcode the csns to use (from proxclone).
996 // That will speed things up a little, but not required just yet.
997 Dbprintf("The mode is not implemented, reserved for future use");
1002 * @brief Does the actual simulation
1003 * @param csn - csn to use
1004 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1006 void doIClassSimulation(uint8_t csn
[], int breakAfterMacReceived
)
1008 // CSN followed by two CRC bytes
1009 uint8_t response2
[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1010 uint8_t response3
[] = { 0,0,0,0,0,0,0,0,0,0};
1011 memcpy(response3
,csn
,sizeof(response3
));
1014 uint8_t response4
[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1016 // Construct anticollision-CSN
1017 rotateCSN(response3
,response2
);
1019 // Compute CRC on both CSNs
1020 ComputeCrc14443(CRC_ICLASS
, response2
, 8, &response2
[8], &response2
[9]);
1021 ComputeCrc14443(CRC_ICLASS
, response3
, 8, &response3
[8], &response3
[9]);
1027 // Tag anticoll. CSN
1028 // Reader 81 anticoll. CSN
1033 uint8_t* respdata
= NULL
;
1037 // Respond SOF -- takes 8 bytes
1038 uint8_t *resp1
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
);
1041 // Anticollision CSN (rotated CSN)
1042 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
1043 uint8_t *resp2
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 10);
1047 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
1048 uint8_t *resp3
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 190);
1052 // 144: Takes 16 bytes for SOF/EOF and 8 * 16 = 128 bytes (2 bytes/bit)
1053 uint8_t *resp4
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 370);
1057 uint8_t *receivedCmd
= (((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
);
1058 memset(receivedCmd
, 0x44, RECV_CMD_SIZE
);
1061 // Prepare card messages
1064 // First card answer: SOF
1066 memcpy(resp1
, ToSend
, ToSendMax
); resp1Len
= ToSendMax
;
1068 // Anticollision CSN
1069 CodeIClassTagAnswer(response2
, sizeof(response2
));
1070 memcpy(resp2
, ToSend
, ToSendMax
); resp2Len
= ToSendMax
;
1073 CodeIClassTagAnswer(response3
, sizeof(response3
));
1074 memcpy(resp3
, ToSend
, ToSendMax
); resp3Len
= ToSendMax
;
1077 CodeIClassTagAnswer(response4
, sizeof(response4
));
1078 memcpy(resp4
, ToSend
, ToSendMax
); resp4Len
= ToSendMax
;
1080 // We need to listen to the high-frequency, peak-detected path.
1081 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1084 // To control where we are in the protocol
1090 if(!GetIClassCommandFromReader(receivedCmd
, &len
, 100)) {
1091 DbpString("button press");
1095 // Okay, look at the command now.
1096 if(receivedCmd
[0] == 0x0a || receivedCmd
[0] == 0x26) {
1097 // Reader in anticollission phase
1098 resp
= resp1
; respLen
= resp1Len
; //order = 1;
1100 respsize
= sizeof(sof
);
1101 //resp = resp2; respLen = resp2Len; order = 2;
1102 Dbprintf("Hello request from reader, %02x, tracing=%d", receivedCmd
[0], tracing
);
1103 } else if(receivedCmd
[0] == 0x0c) {
1104 // Reader asks for anticollission CSN
1105 resp
= resp2
; respLen
= resp2Len
; //order = 2;
1106 respdata
= response2
;
1107 respsize
= sizeof(response2
);
1108 //DbpString("Reader requests anticollission CSN:");
1109 } else if(receivedCmd
[0] == 0x81) {
1110 // Reader selects anticollission CSN.
1111 // Tag sends the corresponding real CSN
1112 resp
= resp3
; respLen
= resp3Len
; //order = 3;
1113 respdata
= response3
;
1114 respsize
= sizeof(response3
);
1115 //DbpString("Reader selects anticollission CSN:");
1116 } else if(receivedCmd
[0] == 0x88) {
1117 // Read e-purse (88 02)
1118 resp
= resp4
; respLen
= resp4Len
; //order = 4;
1119 respdata
= response4
;
1120 respsize
= sizeof(response4
);
1122 } else if(receivedCmd
[0] == 0x05) {
1123 // Reader random and reader MAC!!!
1125 // We do not know what to answer, so lets keep quit
1126 resp
= resp1
; respLen
= 0; //order = 5;
1129 if (breakAfterMacReceived
){
1130 // TODO, actually return this to the caller instead of just
1132 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x");
1133 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len
,
1134 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1135 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1136 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1139 } else if(receivedCmd
[0] == 0x00 && len
== 1) {
1140 // Reader ends the session
1141 resp
= resp1
; respLen
= 0; //order = 0;
1145 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1146 // Never seen this command before
1147 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1149 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1150 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1151 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1153 resp
= resp1
; respLen
= 0; //order = 0;
1158 if(cmdsRecvd
> 999) {
1159 DbpString("1000 commands later...");
1167 SendIClassAnswer(resp
, respLen
, 21);
1171 //LogTrace(receivedCmd,len, rsamples, Uart.parityBits, TRUE);
1172 if(!LogTrace(receivedCmd
,len
, rsamples
, Uart
.parityBits
,TRUE
))
1174 DbpString("Trace full");
1178 if (respdata
!= NULL
) {
1179 //LogTrace(respdata,respsize, rsamples, SwapBits(GetParity(respdata,respsize),respsize), FALSE);
1180 if(!LogTrace(respdata
,respsize
, rsamples
,SwapBits(GetParity(respdata
,respsize
),respsize
),FALSE
))
1182 DbpString("Trace full");
1187 memset(receivedCmd
, 0x44, RECV_CMD_SIZE
);
1190 Dbprintf("%x", cmdsRecvd
);
1195 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
)
1197 int i
= 0, u
= 0, d
= 0;
1200 // Modulate Manchester
1201 // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD424);
1202 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1203 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1208 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1209 volatile uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1212 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1217 else if(i
>= respLen
) {
1223 if(u
> 1) { i
++; u
= 0; }
1225 AT91C_BASE_SSC
->SSC_THR
= b
;
1229 if(BUTTON_PRESS()) {
1239 //-----------------------------------------------------------------------------
1240 // Transmit the command (to the tag) that was placed in ToSend[].
1241 //-----------------------------------------------------------------------------
1242 static void TransmitIClassCommand(const uint8_t *cmd
, int len
, int *samples
, int *wait
)
1246 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1247 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1254 for(c
= 0; c
< *wait
;) {
1255 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1256 AT91C_BASE_SSC
->SSC_THR
= 0x00; // For exact timing!
1259 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1260 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1267 bool firstpart
= TRUE
;
1270 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1272 // DOUBLE THE SAMPLES!
1274 sendbyte
= (cmd
[c
] & 0xf0) | (cmd
[c
] >> 4);
1277 sendbyte
= (cmd
[c
] & 0x0f) | (cmd
[c
] << 4);
1280 if(sendbyte
== 0xff) {
1283 AT91C_BASE_SSC
->SSC_THR
= sendbyte
;
1284 firstpart
= !firstpart
;
1290 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1291 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1296 if (samples
) *samples
= (c
+ *wait
) << 3;
1300 //-----------------------------------------------------------------------------
1301 // Prepare iClass reader command to send to FPGA
1302 //-----------------------------------------------------------------------------
1303 void CodeIClassCommand(const uint8_t * cmd
, int len
)
1310 // Start of Communication: 1 out of 4
1311 ToSend
[++ToSendMax
] = 0xf0;
1312 ToSend
[++ToSendMax
] = 0x00;
1313 ToSend
[++ToSendMax
] = 0x0f;
1314 ToSend
[++ToSendMax
] = 0x00;
1316 // Modulate the bytes
1317 for (i
= 0; i
< len
; i
++) {
1319 for(j
= 0; j
< 4; j
++) {
1320 for(k
= 0; k
< 4; k
++) {
1322 ToSend
[++ToSendMax
] = 0x0f;
1325 ToSend
[++ToSendMax
] = 0x00;
1332 // End of Communication
1333 ToSend
[++ToSendMax
] = 0x00;
1334 ToSend
[++ToSendMax
] = 0x00;
1335 ToSend
[++ToSendMax
] = 0xf0;
1336 ToSend
[++ToSendMax
] = 0x00;
1338 // Convert from last character reference to length
1342 void ReaderTransmitIClass(uint8_t* frame
, int len
)
1348 // This is tied to other size changes
1349 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1350 CodeIClassCommand(frame
,len
);
1353 TransmitIClassCommand(ToSend
, ToSendMax
, &samples
, &wait
);
1357 // Store reader command in buffer
1358 if (tracing
) LogTrace(frame
,len
,rsamples
,par
,TRUE
);
1361 //-----------------------------------------------------------------------------
1362 // Wait a certain time for tag response
1363 // If a response is captured return TRUE
1364 // If it takes too long return FALSE
1365 //-----------------------------------------------------------------------------
1366 static int GetIClassAnswer(uint8_t *receivedResponse
, int maxLen
, int *samples
, int *elapsed
) //uint8_t *buffer
1368 // buffer needs to be 512 bytes
1371 // Set FPGA mode to "reader listen mode", no modulation (listen
1372 // only, since we are receiving, not transmitting).
1373 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1375 // Now get the answer from the card
1376 Demod
.output
= receivedResponse
;
1378 Demod
.state
= DEMOD_UNSYNCD
;
1381 if (elapsed
) *elapsed
= 0;
1389 if(BUTTON_PRESS()) return FALSE
;
1391 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1392 AT91C_BASE_SSC
->SSC_THR
= 0x00; // To make use of exact timing of next command from reader!!
1393 if (elapsed
) (*elapsed
)++;
1395 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1396 if(c
< timeout
) { c
++; } else { return FALSE
; }
1397 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1400 /*if(ManchesterDecoding((b>>4) & 0xf)) {
1401 *samples = ((c - 1) << 3) + 4;
1404 if(ManchesterDecoding(b
& 0x0f)) {
1412 int ReaderReceiveIClass(uint8_t* receivedAnswer
)
1415 if (!GetIClassAnswer(receivedAnswer
,160,&samples
,0)) return FALSE
;
1416 rsamples
+= samples
;
1417 if (tracing
) LogTrace(receivedAnswer
,Demod
.len
,rsamples
,Demod
.parityBits
,FALSE
);
1418 if(samples
== 0) return FALSE
;
1422 // Reader iClass Anticollission
1423 void ReaderIClass(uint8_t arg0
) {
1424 uint8_t act_all
[] = { 0x0a };
1425 uint8_t identify
[] = { 0x0c };
1426 uint8_t select
[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1428 uint8_t* resp
= (((uint8_t *)BigBuf
) + 3560); // was 3560 - tied to other size changes
1430 // Reset trace buffer
1431 memset(trace
, 0x44, RECV_CMD_OFFSET
);
1436 // Start from off (no field generated)
1437 // Signal field is off with the appropriate LED
1439 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1442 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1444 // Now give it time to spin up.
1445 // Signal field is on with the appropriate LED
1446 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1453 if(traceLen
> TRACE_SIZE
) {
1454 DbpString("Trace full");
1458 if (BUTTON_PRESS()) break;
1461 ReaderTransmitIClass(act_all
, 1);
1463 if(ReaderReceiveIClass(resp
)) {
1464 ReaderTransmitIClass(identify
, 1);
1465 if(ReaderReceiveIClass(resp
) == 10) {
1467 memcpy(&select
[1],resp
,8);
1468 ReaderTransmitIClass(select
, sizeof(select
));
1470 if(ReaderReceiveIClass(resp
) == 10) {
1471 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1472 resp
[0], resp
[1], resp
[2],
1473 resp
[3], resp
[4], resp
[5],
1476 // Card selected, whats next... ;-)