1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, Sept 2005
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
7 //-----------------------------------------------------------------------------
8 // Utility functions used in many places, not specific to any piece of code.
9 //-----------------------------------------------------------------------------
11 #include "proxmark3.h"
19 void print_result(char *name
, uint8_t *buf
, size_t len
) {
22 if ( len
% 16 == 0 ) {
23 for(; p
-buf
< len
; p
+= 16)
24 Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
28 p
[0], p
[1], p
[2], p
[3], p
[4], p
[5], p
[6], p
[7],p
[8], p
[9], p
[10], p
[11], p
[12], p
[13], p
[14], p
[15]
32 for(; p
-buf
< len
; p
+= 8)
33 Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x", name
, p
-buf
, len
, p
[0], p
[1], p
[2], p
[3], p
[4], p
[5], p
[6], p
[7]);
37 size_t nbytes(size_t nbits
) {
38 return (nbits
>> 3)+((nbits
% 8) > 0);
41 uint32_t SwapBits(uint32_t value
, int nrbits
) {
42 uint32_t newvalue
= 0;
43 for(int i
= 0; i
< nrbits
; i
++) {
44 newvalue
^= ((value
>> i
) & 1) << (nrbits
- 1 - i
);
49 void num_to_bytes(uint64_t n
, size_t len
, uint8_t* dest
)
52 dest
[len
] = (uint8_t) n
;
57 uint64_t bytes_to_num(uint8_t* src
, size_t len
)
61 num
= (num
<< 8) | (*src
);
67 // RotateLeft - Ultralight, Desfire
68 void rol(uint8_t *data
, const size_t len
){
69 uint8_t first
= data
[0];
70 for (size_t i
= 0; i
< len
-1; i
++) {
76 void lsl (uint8_t *data
, size_t len
) {
77 for (size_t n
= 0; n
< len
- 1; n
++) {
78 data
[n
] = (data
[n
] << 1) | (data
[n
+1] >> 7);
83 int32_t le24toh (uint8_t data
[3])
85 return (data
[2] << 16) | (data
[1] << 8) | data
[0];
96 // LEDs: R(C) O(A) G(B) -- R(D) [1, 2, 4 and 8]
97 void LED(int led
, int ms
)
101 if (led
& LED_ORANGE
)
115 if (led
& LED_ORANGE
)
124 // Determine if a button is double clicked, single clicked,
125 // not clicked, or held down (for ms || 1sec)
126 // In general, don't use this function unless you expect a
127 // double click, otherwise it will waste 500ms -- use BUTTON_HELD instead
128 int BUTTON_CLICKED(int ms
)
130 // Up to 500ms in between clicks to mean a double click
131 int ticks
= (48000 * (ms
? ms
: 1000)) >> 10;
133 // If we're not even pressed, forget about it!
135 return BUTTON_NO_CLICK
;
137 // Borrow a PWM unit for my real-time clock
138 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
139 // 48 MHz / 1024 gives 46.875 kHz
140 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
141 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
142 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
144 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
149 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
151 // We haven't let off the button yet
154 // We just let it off!
159 // reset our timer for 500ms
160 start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
161 ticks
= (48000 * (500)) >> 10;
164 // Still haven't let it off
166 // Have we held down a full second?
167 if (now
== (uint16_t)(start
+ ticks
))
171 // We already let off, did we click again?
173 // Sweet, double click!
175 return BUTTON_DOUBLE_CLICK
;
177 // Have we ran out of time to double click?
179 if (now
== (uint16_t)(start
+ ticks
))
180 // At least we did a single click
181 return BUTTON_SINGLE_CLICK
;
186 // We should never get here
190 // Determine if a button is held down
191 int BUTTON_HELD(int ms
)
193 // If button is held for one second
194 int ticks
= (48000 * (ms
? ms
: 1000)) >> 10;
196 // If we're not even pressed, forget about it!
198 return BUTTON_NO_CLICK
;
200 // Borrow a PWM unit for my real-time clock
201 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
202 // 48 MHz / 1024 gives 46.875 kHz
203 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
204 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
205 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
207 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
211 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
213 // As soon as our button let go, we didn't hold long enough
215 return BUTTON_SINGLE_CLICK
;
217 // Have we waited the full second?
219 if (now
== (uint16_t)(start
+ ticks
))
225 // We should never get here
229 // attempt at high resolution microsecond timer
230 // beware: timer counts in 21.3uS increments (1024/48Mhz)
231 void SpinDelayUs(int us
)
233 int ticks
= (48*us
) >> 10;
235 // Borrow a PWM unit for my real-time clock
236 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
237 // 48 MHz / 1024 gives 46.875 kHz
238 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
239 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
240 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
242 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
245 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
246 if (now
== (uint16_t)(start
+ ticks
))
253 void SpinDelay(int ms
)
255 // convert to uS and call microsecond delay function
256 SpinDelayUs(ms
*1000);
259 /* Similar to FpgaGatherVersion this formats stored version information
260 * into a string representation. It takes a pointer to the struct version_information,
261 * verifies the magic properties, then stores a formatted string, prefixed by
264 void FormatVersionInformation(char *dst
, int len
, const char *prefix
, void *version_information
)
266 struct version_information
*v
= (struct version_information
*)version_information
;
268 strncat(dst
, prefix
, len
-1);
269 if(v
->magic
!= VERSION_INFORMATION_MAGIC
) {
270 strncat(dst
, "Missing/Invalid version information\n", len
- strlen(dst
) - 1);
273 if(v
->versionversion
!= 1) {
274 strncat(dst
, "Version information not understood\n", len
- strlen(dst
) - 1);
278 strncat(dst
, "Version information not available\n", len
- strlen(dst
) - 1);
282 strncat(dst
, v
->gitversion
, len
- strlen(dst
) - 1);
284 strncat(dst
, "-unclean", len
- strlen(dst
) - 1);
285 } else if(v
->clean
== 2) {
286 strncat(dst
, "-suspect", len
- strlen(dst
) - 1);
289 strncat(dst
, " ", len
- strlen(dst
) - 1);
290 strncat(dst
, v
->buildtime
, len
- strlen(dst
) - 1);
291 strncat(dst
, "\n", len
- strlen(dst
) - 1);
294 // -------------------------------------------------------------------------
296 // -------------------------------------------------------------------------
299 // ti = GetTickCount();
301 // ti = GetTickCount() - ti;
302 // Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
304 void StartTickCount()
306 // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
307 // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
308 uint16_t mainf
= AT91C_BASE_PMC
->PMC_MCFR
& 0xffff; // = 16 * main clock frequency (16MHz) / slow clock frequency
309 // set RealTimeCounter divider to count at 1kHz:
310 AT91C_BASE_RTTC
->RTTC_RTMR
= AT91C_RTTC_RTTRST
| ((256000 + (mainf
/2)) / mainf
);
311 // note: worst case precision is approx 2.5%
315 * Get the current count.
317 uint32_t RAMFUNC
GetTickCount(){
318 return AT91C_BASE_RTTC
->RTTC_RTVR
;// was * 2;
321 // -------------------------------------------------------------------------
322 // microseconds timer
323 // -------------------------------------------------------------------------
326 AT91C_BASE_PMC
->PMC_PCER
|= (0x1 << 12) | (0x1 << 13) | (0x1 << 14);
327 // AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC1XC1S_TIOA0;
328 AT91C_BASE_TCB
->TCB_BMR
= AT91C_TCB_TC0XC0S_NONE
| AT91C_TCB_TC1XC1S_TIOA0
| AT91C_TCB_TC2XC2S_NONE
;
331 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
; // timer disable
332 AT91C_BASE_TC0
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV3_CLOCK
| // MCK(48MHz)/32 -- tick=1.5mks
333 AT91C_TC_WAVE
| AT91C_TC_WAVESEL_UP_AUTO
| AT91C_TC_ACPA_CLEAR
|
334 AT91C_TC_ACPC_SET
| AT91C_TC_ASWTRG_SET
;
335 AT91C_BASE_TC0
->TC_RA
= 1;
336 AT91C_BASE_TC0
->TC_RC
= 0xBFFF + 1; // 0xC000
338 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
; // timer disable
339 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_XC1
; // from timer 0
341 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
;
342 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
;
343 AT91C_BASE_TCB
->TCB_BCR
= 1;
346 uint32_t RAMFUNC
GetCountUS(){
347 //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
348 // By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
349 return (AT91C_BASE_TC1
->TC_CV
* 0x8000) + ((AT91C_BASE_TC0
->TC_CV
* 2) / 3);
352 static uint32_t GlobalUsCounter
= 0;
354 uint32_t RAMFUNC
GetDeltaCountUS(){
355 uint32_t g_cnt
= GetCountUS();
356 uint32_t g_res
= g_cnt
- GlobalUsCounter
;
357 GlobalUsCounter
= g_cnt
;
362 // -------------------------------------------------------------------------
363 // Timer for iso14443 commands. Uses ssp_clk from FPGA
364 // -------------------------------------------------------------------------
365 void StartCountSspClk()
367 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC0
) | (1 << AT91C_ID_TC1
) | (1 << AT91C_ID_TC2
); // Enable Clock to all timers
368 AT91C_BASE_TCB
->TCB_BMR
= AT91C_TCB_TC0XC0S_TIOA1
// XC0 Clock = TIOA1
369 | AT91C_TCB_TC1XC1S_NONE
// XC1 Clock = none
370 | AT91C_TCB_TC2XC2S_TIOA0
; // XC2 Clock = TIOA0
372 // configure TC1 to create a short pulse on TIOA1 when a rising edge on TIOB1 (= ssp_clk from FPGA) occurs:
373 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC1
374 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV1_CLOCK
// TC1 Clock = MCK(48MHz)/2 = 24MHz
375 | AT91C_TC_CPCSTOP
// Stop clock on RC compare
376 | AT91C_TC_EEVTEDG_RISING
// Trigger on rising edge of Event
377 | AT91C_TC_EEVT_TIOB
// Event-Source: TIOB1 (= ssp_clk from FPGA = 13,56MHz/16)
378 | AT91C_TC_ENETRG
// Enable external trigger event
379 | AT91C_TC_WAVESEL_UP
// Upmode without automatic trigger on RC compare
380 | AT91C_TC_WAVE
// Waveform Mode
381 | AT91C_TC_AEEVT_SET
// Set TIOA1 on external event
382 | AT91C_TC_ACPC_CLEAR
; // Clear TIOA1 on RC Compare
383 AT91C_BASE_TC1
->TC_RC
= 0x04; // RC Compare value = 0x04
385 // use TC0 to count TIOA1 pulses
386 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC0
387 AT91C_BASE_TC0
->TC_CMR
= AT91C_TC_CLKS_XC0
// TC0 clock = XC0 clock = TIOA1
388 | AT91C_TC_WAVE
// Waveform Mode
389 | AT91C_TC_WAVESEL_UP
// just count
390 | AT91C_TC_ACPA_CLEAR
// Clear TIOA0 on RA Compare
391 | AT91C_TC_ACPC_SET
; // Set TIOA0 on RC Compare
392 AT91C_BASE_TC0
->TC_RA
= 1; // RA Compare value = 1; pulse width to TC2
393 AT91C_BASE_TC0
->TC_RC
= 0; // RC Compare value = 0; increment TC2 on overflow
395 // use TC2 to count TIOA0 pulses (giving us a 32bit counter (TC0/TC2) clocked by ssp_clk)
396 AT91C_BASE_TC2
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC2
397 AT91C_BASE_TC2
->TC_CMR
= AT91C_TC_CLKS_XC2
// TC2 clock = XC2 clock = TIOA0
398 | AT91C_TC_WAVE
// Waveform Mode
399 | AT91C_TC_WAVESEL_UP
; // just count
401 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC0
402 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC1
403 AT91C_BASE_TC2
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC2
406 // synchronize the counter with the ssp_frame signal. Note: FPGA must be in any iso14446 mode, otherwise the frame signal would not be present
408 while(!(AT91C_BASE_PIOA
->PIO_PDSR
& GPIO_SSC_FRAME
)); // wait for ssp_frame to go high (start of frame)
409 while(AT91C_BASE_PIOA
->PIO_PDSR
& GPIO_SSC_FRAME
); // wait for ssp_frame to be low
410 while(!(AT91C_BASE_PIOA
->PIO_PDSR
& GPIO_SSC_CLK
)); // wait for ssp_clk to go high
411 // note: up to now two ssp_clk rising edges have passed since the rising edge of ssp_frame
412 // it is now safe to assert a sync signal. This sets all timers to 0 on next active clock edge
413 AT91C_BASE_TCB
->TCB_BCR
= 1; // assert Sync (set all timers to 0 on next active clock edge)
414 // at the next (3rd) ssp_clk rising edge, TC1 will be reset (and not generate a clock signal to TC0)
415 // at the next (4th) ssp_clk rising edge, TC0 (the low word of our counter) will be reset. From now on,
416 // whenever the last three bits of our counter go 0, we can be sure to be in the middle of a frame transfer.
417 // (just started with the transfer of the 4th Bit).
418 // The high word of the counter (TC2) will not reset until the low word (TC0) overflows. Therefore need to wait quite some time before
419 // we can use the counter.
420 while (AT91C_BASE_TC0
->TC_CV
< 0xFFF0);
423 uint32_t RAMFUNC
GetCountSspClk(){
424 uint32_t tmp_count
= (AT91C_BASE_TC2
->TC_CV
<< 16) | AT91C_BASE_TC0
->TC_CV
;
425 if ((tmp_count
& 0x0000ffff) == 0) //small chance that we may have missed an increment in TC2
426 return (AT91C_BASE_TC2
->TC_CV
<< 16);