cvs.zerfleddert.de Git - proxmark3-svn/blob - fpga/lo_simulate.v

   1 //-----------------------------------------------------------------------------
   2 // The way that we connect things in low-frequency simulation mode. In this
   3 // case just pass everything through to the ARM, which can bit-bang this
   4 // (because it is so slow).
   5 //
   6 // Jonathan Westhues, April 2006
   7 //-----------------------------------------------------------------------------
   8
   9 module lo_simulate(
  10     pck0, ck_1356meg, ck_1356megb,
  11     pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
  12     adc_d, adc_clk,
  13     ssp_frame, ssp_din, ssp_dout, ssp_clk,
  14     cross_hi, cross_lo,
  15     dbg
  16 );
  17     input pck0, ck_1356meg, ck_1356megb;
  18     output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
  19     input [7:0] adc_d;
  20     output adc_clk;
  21     input ssp_dout;
  22     output ssp_frame, ssp_din, ssp_clk;
  23     input cross_hi, cross_lo;
  24     output dbg;
  25
  26 // No logic, straight through.
  27 assign pwr_oe3 = 1'b0;
  28 assign pwr_oe1 = ssp_dout;
  29 assign pwr_oe2 = ssp_dout;
  30 assign pwr_oe4 = ssp_dout;
  31 assign ssp_clk = cross_lo;
  32 assign pwr_lo = 1'b0;
  33 assign adc_clk = 1'b0;
  34 assign pwr_hi = 1'b0;
  35 assign dbg = cross_lo;
  36
  37 endmodule