1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, Sept 2005
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
7 //-----------------------------------------------------------------------------
8 // Utility functions used in many places, not specific to any piece of code.
9 //-----------------------------------------------------------------------------
11 #include "proxmark3.h"
15 size_t nbytes(size_t nbits
) {
16 return (nbits
/8)+((nbits
%8)>0);
19 uint32_t SwapBits(uint32_t value
, int nrbits
) {
21 uint32_t newvalue
= 0;
22 for(i
= 0; i
< nrbits
; i
++) {
23 newvalue
^= ((value
>> i
) & 1) << (nrbits
- 1 - i
);
28 void num_to_bytes(uint64_t n
, size_t len
, uint8_t* dest
)
31 dest
[len
] = (uint8_t) n
;
36 uint64_t bytes_to_num(uint8_t* src
, size_t len
)
41 num
= (num
<< 8) | (*src
);
55 // LEDs: R(C) O(A) G(B) -- R(D) [1, 2, 4 and 8]
56 void LED(int led
, int ms
)
83 // Determine if a button is double clicked, single clicked,
84 // not clicked, or held down (for ms || 1sec)
85 // In general, don't use this function unless you expect a
86 // double click, otherwise it will waste 500ms -- use BUTTON_HELD instead
87 int BUTTON_CLICKED(int ms
)
89 // Up to 500ms in between clicks to mean a double click
90 int ticks
= (48000 * (ms
? ms
: 1000)) >> 10;
92 // If we're not even pressed, forget about it!
94 return BUTTON_NO_CLICK
;
96 // Borrow a PWM unit for my real-time clock
97 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
98 // 48 MHz / 1024 gives 46.875 kHz
99 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
100 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
101 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
103 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
108 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
110 // We haven't let off the button yet
113 // We just let it off!
118 // reset our timer for 500ms
119 start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
120 ticks
= (48000 * (500)) >> 10;
123 // Still haven't let it off
125 // Have we held down a full second?
126 if (now
== (uint16_t)(start
+ ticks
))
130 // We already let off, did we click again?
132 // Sweet, double click!
134 return BUTTON_DOUBLE_CLICK
;
136 // Have we ran out of time to double click?
138 if (now
== (uint16_t)(start
+ ticks
))
139 // At least we did a single click
140 return BUTTON_SINGLE_CLICK
;
145 // We should never get here
149 // Determine if a button is held down
150 int BUTTON_HELD(int ms
)
152 // If button is held for one second
153 int ticks
= (48000 * (ms
? ms
: 1000)) >> 10;
155 // If we're not even pressed, forget about it!
157 return BUTTON_NO_CLICK
;
159 // Borrow a PWM unit for my real-time clock
160 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
161 // 48 MHz / 1024 gives 46.875 kHz
162 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
163 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
164 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
166 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
170 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
172 // As soon as our button let go, we didn't hold long enough
174 return BUTTON_SINGLE_CLICK
;
176 // Have we waited the full second?
178 if (now
== (uint16_t)(start
+ ticks
))
184 // We should never get here
188 // attempt at high resolution microsecond timer
189 // beware: timer counts in 21.3uS increments (1024/48Mhz)
190 void SpinDelayUs(int us
)
192 int ticks
= (48*us
) >> 10;
194 // Borrow a PWM unit for my real-time clock
195 AT91C_BASE_PWMC
->PWMC_ENA
= PWM_CHANNEL(0);
196 // 48 MHz / 1024 gives 46.875 kHz
197 AT91C_BASE_PWMC_CH0
->PWMC_CMR
= PWM_CH_MODE_PRESCALER(10);
198 AT91C_BASE_PWMC_CH0
->PWMC_CDTYR
= 0;
199 AT91C_BASE_PWMC_CH0
->PWMC_CPRDR
= 0xffff;
201 uint16_t start
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
204 uint16_t now
= AT91C_BASE_PWMC_CH0
->PWMC_CCNTR
;
205 if (now
== (uint16_t)(start
+ ticks
))
212 void SpinDelay(int ms
)
214 // convert to uS and call microsecond delay function
215 SpinDelayUs(ms
*1000);
218 /* Similar to FpgaGatherVersion this formats stored version information
219 * into a string representation. It takes a pointer to the struct version_information,
220 * verifies the magic properties, then stores a formatted string, prefixed by
223 void FormatVersionInformation(char *dst
, int len
, const char *prefix
, void *version_information
)
225 struct version_information
*v
= (struct version_information
*)version_information
;
227 strncat(dst
, prefix
, len
);
228 if(v
->magic
!= VERSION_INFORMATION_MAGIC
) {
229 strncat(dst
, "Missing/Invalid version information", len
);
232 if(v
->versionversion
!= 1) {
233 strncat(dst
, "Version information not understood", len
);
237 strncat(dst
, "Version information not available", len
);
241 strncat(dst
, v
->svnversion
, len
);
243 strncat(dst
, "-unclean", len
);
244 } else if(v
->clean
== 2) {
245 strncat(dst
, "-suspect", len
);
248 strncat(dst
, " ", len
);
249 strncat(dst
, v
->buildtime
, len
);
252 // -------------------------------------------------------------------------
254 // -------------------------------------------------------------------------
257 // ti = GetTickCount();
259 // ti = GetTickCount() - ti;
260 // Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
262 void StartTickCount()
264 // must be 0x40, but on my cpu - included divider is optimal
268 AT91C_BASE_RTTC
->RTTC_RTMR
= AT91C_RTTC_RTTRST
+ 0x001D; // was 0x003B
272 * Get the current count.
274 uint32_t RAMFUNC
GetTickCount(){
275 return AT91C_BASE_RTTC
->RTTC_RTVR
;// was * 2;
278 // -------------------------------------------------------------------------
279 // microseconds timer
280 // -------------------------------------------------------------------------
283 AT91C_BASE_PMC
->PMC_PCER
|= (0x1 << 12) | (0x1 << 13) | (0x1 << 14);
284 // AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC1XC1S_TIOA0;
285 AT91C_BASE_TCB
->TCB_BMR
= AT91C_TCB_TC0XC0S_NONE
| AT91C_TCB_TC1XC1S_TIOA0
| AT91C_TCB_TC2XC2S_NONE
;
288 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
; // timer disable
289 AT91C_BASE_TC0
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV3_CLOCK
| // MCK(48MHz)/32 -- tick=1.5mks
290 AT91C_TC_WAVE
| AT91C_TC_WAVESEL_UP_AUTO
| AT91C_TC_ACPA_CLEAR
|
291 AT91C_TC_ACPC_SET
| AT91C_TC_ASWTRG_SET
;
292 AT91C_BASE_TC0
->TC_RA
= 1;
293 AT91C_BASE_TC0
->TC_RC
= 0xBFFF + 1; // 0xC000
295 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
; // timer disable
296 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_XC1
; // from timer 0
298 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
;
299 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
;
300 AT91C_BASE_TCB
->TCB_BCR
= 1;
303 uint32_t RAMFUNC
GetCountUS(){
304 return (AT91C_BASE_TC1
->TC_CV
* 0x8000) + ((AT91C_BASE_TC0
->TC_CV
/ 15) * 10);
307 static uint32_t GlobalUsCounter
= 0;
309 uint32_t RAMFUNC
GetDeltaCountUS(){
310 uint32_t g_cnt
= GetCountUS();
311 uint32_t g_res
= g_cnt
- GlobalUsCounter
;
312 GlobalUsCounter
= g_cnt
;
317 // -------------------------------------------------------------------------
318 // Mifare timer. Uses ssp_clk from FPGA
319 // -------------------------------------------------------------------------
320 void StartCountMifare()
322 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC0
) | (1 << AT91C_ID_TC1
) | (1 << AT91C_ID_TC2
); // Enable Clock to all timers
323 AT91C_BASE_TCB
->TCB_BMR
= AT91C_TCB_TC0XC0S_TIOA1
// XC0 Clock = TIOA1
324 | AT91C_TCB_TC1XC1S_NONE
// XC1 Clock = none
325 | AT91C_TCB_TC2XC2S_TIOA0
; // XC2 Clock = TIOA0
327 // configure TC1 to create a short pulse on TIOA1 when a rising edge on TIOB1 (= ssp_clk from FPGA) occurs:
328 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC1
329 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV1_CLOCK
// TC1 Clock = MCK(48MHz)/2 = 24MHz
330 | AT91C_TC_CPCSTOP
// Stop clock on RC compare
331 | AT91C_TC_EEVTEDG_RISING
// Trigger on rising edge of Event
332 | AT91C_TC_EEVT_TIOB
// Event-Source: TIOB1 (= ssc_clk from FPGA = 13,56MHz / 16)
333 | AT91C_TC_ENETRG
// Enable external trigger event
334 | AT91C_TC_WAVESEL_UP
// Upmode without automatic trigger on RC compare
335 | AT91C_TC_WAVE
// Waveform Mode
336 | AT91C_TC_AEEVT_SET
// Set TIOA1 on external event
337 | AT91C_TC_ACPC_CLEAR
; // Clear TIOA1 on RC Compare
338 AT91C_BASE_TC1
->TC_RC
= 0x04; // RC Compare value = 0x04
340 // use TC0 to count TIOA1 pulses
341 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC0
342 AT91C_BASE_TC0
->TC_CMR
= AT91C_TC_CLKS_XC0
// TC0 clock = XC0 clock = TIOA1
343 | AT91C_TC_WAVE
// Waveform Mode
344 | AT91C_TC_WAVESEL_UP
// just count
345 | AT91C_TC_ACPA_CLEAR
// Clear TIOA0 on RA Compare
346 | AT91C_TC_ACPC_SET
; // Set TIOA0 on RC Compare
347 AT91C_BASE_TC0
->TC_RA
= 1; // RA Compare value = 1; pulse width to TC2
348 AT91C_BASE_TC0
->TC_RC
= 0; // RC Compare value = 0; increment TC2 on overflow
350 // use TC2 to count TIOA0 pulses (giving us a 32bit counter (TC0/TC2) clocked by ssp_clk)
351 AT91C_BASE_TC2
->TC_CCR
= AT91C_TC_CLKDIS
; // disable TC2
352 AT91C_BASE_TC2
->TC_CMR
= AT91C_TC_CLKS_XC2
// TC2 clock = XC2 clock = TIOA0
353 | AT91C_TC_WAVE
// Waveform Mode
354 | AT91C_TC_WAVESEL_UP
; // just count
357 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC0
358 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC1
359 AT91C_BASE_TC2
->TC_CCR
= AT91C_TC_CLKEN
; // enable TC2
360 AT91C_BASE_TCB
->TCB_BCR
= 1; // assert Sync (set all timers to 0 on next active clock edge)
364 uint32_t RAMFUNC
GetCountMifare(){
366 tmp_count
= (AT91C_BASE_TC2
->TC_CV
<< 16) | AT91C_BASE_TC0
->TC_CV
;
367 if ((tmp_count
& 0xffff) == 0) { //small chance that we may have missed an increment in TC2
368 return (AT91C_BASE_TC2
->TC_CV
<< 16);