1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
7 //-----------------------------------------------------------------------------
8 // Routines to support ISO 14443B. This includes both the reader software and
9 // the `fake tag' modes.
10 //-----------------------------------------------------------------------------
12 #include "proxmark3.h"
17 #include "iso14443crc.h"
19 #define RECEIVE_SAMPLES_TIMEOUT 2000
21 //=============================================================================
22 // An ISO 14443 Type B tag. We listen for commands from the reader, using
23 // a UART kind of thing that's implemented in software. When we get a
24 // frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
25 // If it's good, then we can do something appropriate with it, and send
27 //=============================================================================
29 //-----------------------------------------------------------------------------
30 // Code up a string of octets at layer 2 (including CRC, we don't generate
31 // that here) so that they can be transmitted to the reader. Doesn't transmit
32 // them yet, just leaves them ready to send in ToSend[].
33 //-----------------------------------------------------------------------------
34 static void CodeIso14443bAsTag(const uint8_t *cmd
, int len
)
40 // Transmit a burst of ones, as the initial thing that lets the
41 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
42 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
44 for(i
= 0; i
< 20; i
++) {
52 for(i
= 0; i
< 10; i
++) {
58 for(i
= 0; i
< 2; i
++) {
65 for(i
= 0; i
< len
; i
++) {
76 for(j
= 0; j
< 8; j
++) {
99 for(i
= 0; i
< 10; i
++) {
105 for(i
= 0; i
< 2; i
++) {
112 // Convert from last byte pos to length
116 //-----------------------------------------------------------------------------
117 // The software UART that receives commands from the reader, and its state
119 //-----------------------------------------------------------------------------
123 STATE_GOT_FALLING_EDGE_OF_SOF
,
124 STATE_AWAITING_START_BIT
,
135 /* Receive & handle a bit coming from the reader.
137 * This function is called 4 times per bit (every 2 subcarrier cycles).
138 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
141 * LED A -> ON once we have received the SOF and are expecting the rest.
142 * LED A -> OFF once we have received EOF or are in error state or unsynced
144 * Returns: true if we received a EOF
145 * false if we are still waiting for some more
147 static RAMFUNC
int Handle14443bUartBit(uint8_t bit
)
152 // we went low, so this could be the beginning
154 Uart
.state
= STATE_GOT_FALLING_EDGE_OF_SOF
;
160 case STATE_GOT_FALLING_EDGE_OF_SOF
:
162 if(Uart
.posCnt
== 2) { // sample every 4 1/fs in the middle of a bit
164 if(Uart
.bitCnt
> 9) {
165 // we've seen enough consecutive
166 // zeros that it's a valid SOF
169 Uart
.state
= STATE_AWAITING_START_BIT
;
170 LED_A_ON(); // Indicate we got a valid SOF
172 // didn't stay down long enough
173 // before going high, error
174 Uart
.state
= STATE_UNSYNCD
;
177 // do nothing, keep waiting
181 if(Uart
.posCnt
>= 4) Uart
.posCnt
= 0;
182 if(Uart
.bitCnt
> 12) {
183 // Give up if we see too many zeros without
186 Uart
.state
= STATE_UNSYNCD
;
190 case STATE_AWAITING_START_BIT
:
193 if(Uart
.posCnt
> 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
194 // stayed high for too long between
196 Uart
.state
= STATE_UNSYNCD
;
199 // falling edge, this starts the data byte
203 Uart
.state
= STATE_RECEIVING_DATA
;
207 case STATE_RECEIVING_DATA
:
209 if(Uart
.posCnt
== 2) {
210 // time to sample a bit
213 Uart
.shiftReg
|= 0x200;
217 if(Uart
.posCnt
>= 4) {
220 if(Uart
.bitCnt
== 10) {
221 if((Uart
.shiftReg
& 0x200) && !(Uart
.shiftReg
& 0x001))
223 // this is a data byte, with correct
224 // start and stop bits
225 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
>> 1) & 0xff;
228 if(Uart
.byteCnt
>= Uart
.byteCntMax
) {
229 // Buffer overflowed, give up
231 Uart
.state
= STATE_UNSYNCD
;
233 // so get the next byte now
235 Uart
.state
= STATE_AWAITING_START_BIT
;
237 } else if(Uart
.shiftReg
== 0x000) {
238 // this is an EOF byte
239 LED_A_OFF(); // Finished receiving
240 Uart
.state
= STATE_UNSYNCD
;
241 if (Uart
.byteCnt
!= 0) {
247 Uart
.state
= STATE_UNSYNCD
;
254 Uart
.state
= STATE_UNSYNCD
;
262 static void UartReset()
264 Uart
.byteCntMax
= MAX_FRAME_SIZE
;
265 Uart
.state
= STATE_UNSYNCD
;
271 static void UartInit(uint8_t *data
)
278 //-----------------------------------------------------------------------------
279 // Receive a command (from the reader to us, where we are the simulated tag),
280 // and store it in the given buffer, up to the given maximum length. Keeps
281 // spinning, waiting for a well-framed command, until either we get one
282 // (returns TRUE) or someone presses the pushbutton on the board (FALSE).
284 // Assume that we're called with the SSC (to the FPGA) and ADC path set
286 //-----------------------------------------------------------------------------
287 static int GetIso14443bCommandFromReader(uint8_t *received
, uint16_t *len
)
289 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
290 // only, since we are receiving, not transmitting).
291 // Signal field is off with the appropriate LED
293 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_NO_MODULATION
);
295 // Now run a `software UART' on the stream of incoming samples.
301 if(BUTTON_PRESS()) return FALSE
;
303 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
304 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
305 for(uint8_t mask
= 0x80; mask
!= 0x00; mask
>>= 1) {
306 if(Handle14443bUartBit(b
& mask
)) {
317 //-----------------------------------------------------------------------------
318 // Main loop of simulated tag: receive commands from reader, decide what
319 // response to send, and send it.
320 //-----------------------------------------------------------------------------
321 void SimulateIso14443bTag(void)
323 // the only commands we understand is REQB, AFI=0, Select All, N=0:
324 static const uint8_t cmd1
[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
325 // ... and REQB, AFI=0, Normal Request, N=0:
326 static const uint8_t cmd2
[] = { 0x05, 0x00, 0x00, 0x71, 0xFF };
328 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
329 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
330 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
331 static const uint8_t response1
[] = {
332 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
333 0x00, 0x21, 0x85, 0x5e, 0xd7
341 uint16_t respLen
, respCodeLen
;
343 // allocate command receive buffer
345 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
348 uint16_t cmdsRecvd
= 0;
350 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
352 // prepare the (only one) tag answer:
353 CodeIso14443bAsTag(response1
, sizeof(response1
));
354 uint8_t *resp1Code
= BigBuf_malloc(ToSendMax
);
355 memcpy(resp1Code
, ToSend
, ToSendMax
);
356 uint16_t resp1CodeLen
= ToSendMax
;
358 // We need to listen to the high-frequency, peak-detected path.
359 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
366 if(!GetIso14443bCommandFromReader(receivedCmd
, &len
)) {
367 Dbprintf("button pressed, received %d commands", cmdsRecvd
);
372 uint8_t parity
[MAX_PARITY_SIZE
];
373 LogTrace(receivedCmd
, len
, 0, 0, parity
, TRUE
);
376 // Good, look at the command now.
377 if ( (len
== sizeof(cmd1
) && memcmp(receivedCmd
, cmd1
, len
) == 0)
378 || (len
== sizeof(cmd2
) && memcmp(receivedCmd
, cmd2
, len
) == 0) ) {
380 respLen
= sizeof(response1
);
381 respCode
= resp1Code
;
382 respCodeLen
= resp1CodeLen
;
384 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len
, cmdsRecvd
);
385 // And print whether the CRC fails, just for good measure
387 ComputeCrc14443(CRC_14443_B
, receivedCmd
, len
-2, &b1
, &b2
);
388 if(b1
!= receivedCmd
[len
-2] || b2
!= receivedCmd
[len
-1]) {
389 // Not so good, try again.
390 DbpString("+++CRC fail");
392 DbpString("CRC passes");
399 if(cmdsRecvd
> 0x30) {
400 DbpString("many commands later...");
404 if(respCodeLen
<= 0) continue;
407 // Signal field is off with the appropriate LED
409 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_MODULATE_BPSK
);
410 AT91C_BASE_SSC
->SSC_THR
= 0xff;
413 // Transmit the response.
416 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
417 uint8_t b
= respCode
[i
];
419 AT91C_BASE_SSC
->SSC_THR
= b
;
422 if(i
> respCodeLen
) {
426 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
427 volatile uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
432 // trace the response:
434 uint8_t parity
[MAX_PARITY_SIZE
];
435 LogTrace(resp
, respLen
, 0, 0, parity
, FALSE
);
441 //=============================================================================
442 // An ISO 14443 Type B reader. We take layer two commands, code them
443 // appropriately, and then send them to the tag. We then listen for the
444 // tag's response, which we leave in the buffer to be demodulated on the
446 //=============================================================================
451 DEMOD_PHASE_REF_TRAINING
,
452 DEMOD_AWAITING_FALLING_EDGE_OF_SOF
,
453 DEMOD_GOT_FALLING_EDGE_OF_SOF
,
454 DEMOD_AWAITING_START_BIT
,
460 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
472 * Handles reception of a bit from the tag
474 * This function is called 2 times per bit (every 4 subcarrier cycles).
475 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
478 * LED C -> ON once we have received the SOF and are expecting the rest.
479 * LED C -> OFF once we have received EOF or are unsynced
481 * Returns: true if we received a EOF
482 * false if we are still waiting for some more
485 static RAMFUNC
int Handle14443bSamplesDemod(int ci
, int cq
)
489 // The soft decision on the bit uses an estimate of just the
490 // quadrant of the reference angle, not the exact angle.
491 #define MAKE_SOFT_DECISION() { \
492 if(Demod.sumI > 0) { \
497 if(Demod.sumQ > 0) { \
504 #define SUBCARRIER_DETECT_THRESHOLD 8
506 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
507 /* #define CHECK_FOR_SUBCARRIER() { \
517 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
518 #define CHECK_FOR_SUBCARRIER() { \
520 if(cq < 0) { /* ci < 0, cq < 0 */ \
522 v = -cq - (ci >> 1); \
524 v = -ci - (cq >> 1); \
526 } else { /* ci < 0, cq >= 0 */ \
528 v = -ci + (cq >> 1); \
530 v = cq - (ci >> 1); \
534 if(cq < 0) { /* ci >= 0, cq < 0 */ \
536 v = ci - (cq >> 1); \
538 v = -cq + (ci >> 1); \
540 } else { /* ci >= 0, cq >= 0 */ \
542 v = ci + (cq >> 1); \
544 v = cq + (ci >> 1); \
550 switch(Demod
.state
) {
552 CHECK_FOR_SUBCARRIER();
553 if(v
> SUBCARRIER_DETECT_THRESHOLD
) { // subcarrier detected
554 Demod
.state
= DEMOD_PHASE_REF_TRAINING
;
561 case DEMOD_PHASE_REF_TRAINING
:
562 if(Demod
.posCount
< 8) {
563 CHECK_FOR_SUBCARRIER();
564 if (v
> SUBCARRIER_DETECT_THRESHOLD
) {
565 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
566 // note: synchronization time > 80 1/fs
570 } else { // subcarrier lost
571 Demod
.state
= DEMOD_UNSYNCD
;
574 Demod
.state
= DEMOD_AWAITING_FALLING_EDGE_OF_SOF
;
578 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF
:
579 MAKE_SOFT_DECISION();
580 if(v
< 0) { // logic '0' detected
581 Demod
.state
= DEMOD_GOT_FALLING_EDGE_OF_SOF
;
582 Demod
.posCount
= 0; // start of SOF sequence
584 if(Demod
.posCount
> 200/4) { // maximum length of TR1 = 200 1/fs
585 Demod
.state
= DEMOD_UNSYNCD
;
591 case DEMOD_GOT_FALLING_EDGE_OF_SOF
:
593 MAKE_SOFT_DECISION();
595 if(Demod
.posCount
< 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
596 Demod
.state
= DEMOD_UNSYNCD
;
598 LED_C_ON(); // Got SOF
599 Demod
.state
= DEMOD_AWAITING_START_BIT
;
602 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
608 if(Demod
.posCount
> 12*2) { // low phase of SOF too long (> 12 etu)
609 Demod
.state
= DEMOD_UNSYNCD
;
615 case DEMOD_AWAITING_START_BIT
:
617 MAKE_SOFT_DECISION();
619 if(Demod
.posCount
> 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
620 Demod
.state
= DEMOD_UNSYNCD
;
623 } else { // start bit detected
625 Demod
.posCount
= 1; // this was the first half
628 Demod
.state
= DEMOD_RECEIVING_DATA
;
632 case DEMOD_RECEIVING_DATA
:
633 MAKE_SOFT_DECISION();
634 if(Demod
.posCount
== 0) { // first half of bit
637 } else { // second half of bit
640 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
641 if(Demod.thisBit > 0) {
642 Demod.metric += Demod.thisBit;
644 Demod.metric -= Demod.thisBit;
649 Demod
.shiftReg
>>= 1;
650 if(Demod
.thisBit
> 0) { // logic '1'
651 Demod
.shiftReg
|= 0x200;
655 if(Demod
.bitCount
== 10) {
656 uint16_t s
= Demod
.shiftReg
;
657 if((s
& 0x200) && !(s
& 0x001)) { // stop bit == '1', start bit == '0'
658 uint8_t b
= (s
>> 1);
659 Demod
.output
[Demod
.len
] = b
;
661 Demod
.state
= DEMOD_AWAITING_START_BIT
;
663 Demod
.state
= DEMOD_UNSYNCD
;
666 // This is EOF (start, stop and all data bits == '0'
676 Demod
.state
= DEMOD_UNSYNCD
;
685 static void DemodReset()
687 // Clear out the state of the "UART" that receives from the tag.
689 Demod
.state
= DEMOD_UNSYNCD
;
691 memset(Demod
.output
, 0x00, MAX_FRAME_SIZE
);
695 static void DemodInit(uint8_t *data
)
703 * Demodulate the samples we received from the tag, also log to tracebuffer
704 * quiet: set to 'TRUE' to disable debug output
706 static void GetSamplesFor14443bDemod(int n
, bool quiet
)
709 bool gotFrame
= FALSE
;
710 int lastRxCounter
, ci
, cq
, samples
= 0;
712 // Allocate memory from BigBuf for some buffers
713 // free all previous allocations first
716 // The response (tag -> reader) that we're receiving.
717 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
719 // The DMA buffer, used to stream samples from the FPGA
720 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE
);
722 // Set up the demodulator for tag -> reader responses.
723 DemodInit(receivedResponse
);
725 // Setup and start DMA.
726 FpgaSetupSscDma((uint8_t*) dmaBuf
, DMA_BUFFER_SIZE
);
728 int8_t *upTo
= dmaBuf
;
729 lastRxCounter
= DMA_BUFFER_SIZE
;
731 // Signal field is ON with the appropriate LED:
733 // And put the FPGA in the appropriate mode
734 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
737 int behindBy
= lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
738 if(behindBy
> max
) max
= behindBy
;
740 while(((lastRxCounter
-AT91C_BASE_PDC_SSC
->PDC_RCR
) & (DMA_BUFFER_SIZE
-1)) > 2) {
744 if(upTo
>= dmaBuf
+ DMA_BUFFER_SIZE
) {
746 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
747 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
750 if(lastRxCounter
<= 0) {
751 lastRxCounter
+= DMA_BUFFER_SIZE
;
756 if(Handle14443bSamplesDemod(ci
, cq
)) {
762 if(samples
> n
|| gotFrame
) {
767 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
769 if (!quiet
) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max
, samples
, gotFrame
, Demod
.len
, Demod
.sumI
, Demod
.sumQ
);
771 if (tracing
&& Demod
.len
> 0) {
772 uint8_t parity
[MAX_PARITY_SIZE
];
773 //GetParity(Demod.output, Demod.len, parity);
774 LogTrace(Demod
.output
, Demod
.len
, 0, 0, parity
, FALSE
);
779 //-----------------------------------------------------------------------------
780 // Transmit the command (to the tag) that was placed in ToSend[].
781 //-----------------------------------------------------------------------------
782 static void TransmitFor14443b(void)
788 while(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
789 AT91C_BASE_SSC
->SSC_THR
= 0xff;
792 // Signal field is ON with the appropriate Red LED
794 // Signal we are transmitting with the Green LED
796 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX
| FPGA_HF_READER_TX_SHALLOW_MOD
);
798 for(c
= 0; c
< 10;) {
799 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
800 AT91C_BASE_SSC
->SSC_THR
= 0xff;
803 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
804 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
812 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
813 AT91C_BASE_SSC
->SSC_THR
= ToSend
[c
];
819 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
820 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
825 LED_B_OFF(); // Finished sending
829 //-----------------------------------------------------------------------------
830 // Code a layer 2 command (string of octets, including CRC) into ToSend[],
831 // so that it is ready to transmit to the tag using TransmitFor14443b().
832 //-----------------------------------------------------------------------------
833 static void CodeIso14443bAsReader(const uint8_t *cmd
, int len
)
840 // Establish initial reference level
841 for(i
= 0; i
< 40; i
++) {
845 for(i
= 0; i
< 10; i
++) {
849 for(i
= 0; i
< len
; i
++) {
857 for(j
= 0; j
< 8; j
++) {
868 for(i
= 0; i
< 10; i
++) {
871 for(i
= 0; i
< 8; i
++) {
875 // And then a little more, to make sure that the last character makes
876 // it out before we switch to rx mode.
877 for(i
= 0; i
< 24; i
++) {
881 // Convert from last character reference to length
887 Convenience function to encode, transmit and trace iso 14443b comms
889 static void CodeAndTransmit14443bAsReader(const uint8_t *cmd
, int len
)
891 CodeIso14443bAsReader(cmd
, len
);
894 uint8_t parity
[MAX_PARITY_SIZE
];
895 GetParity(cmd
, len
, parity
);
896 LogTrace(cmd
,len
, 0, 0, parity
, TRUE
);
901 //-----------------------------------------------------------------------------
902 // Read a SRI512 ISO 14443B tag.
904 // SRI512 tags are just simple memory tags, here we're looking at making a dump
905 // of the contents of the memory. No anticollision algorithm is done, we assume
906 // we have a single tag in the field.
908 // I tried to be systematic and check every answer of the tag, every CRC, etc...
909 //-----------------------------------------------------------------------------
910 void ReadSTMemoryIso14443b(uint32_t dwLast
)
917 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
918 // Make sure that we start from off, since the tags are stateful;
919 // confusing things will happen if we don't reset them between reads.
921 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
924 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
927 // Now give it time to spin up.
928 // Signal field is on with the appropriate LED
930 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
933 // First command: wake up the tag using the INITIATE command
934 uint8_t cmd1
[] = { 0x06, 0x00, 0x97, 0x5b};
936 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
938 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
941 if (Demod
.len
== 0) {
942 DbpString("No response from tag");
945 Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %02x %02x %02x",
946 Demod
.output
[0], Demod
.output
[1],Demod
.output
[2]);
948 // There is a response, SELECT the uid
949 DbpString("Now SELECT tag:");
950 cmd1
[0] = 0x0E; // 0x0E is SELECT
951 cmd1
[1] = Demod
.output
[0];
952 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
953 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
956 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
958 if (Demod
.len
!= 3) {
959 Dbprintf("Expected 3 bytes from tag, got %d", Demod
.len
);
962 // Check the CRC of the answer:
963 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 1 , &cmd1
[2], &cmd1
[3]);
964 if(cmd1
[2] != Demod
.output
[1] || cmd1
[3] != Demod
.output
[2]) {
965 DbpString("CRC Error reading select response.");
968 // Check response from the tag: should be the same UID as the command we just sent:
969 if (cmd1
[1] != Demod
.output
[0]) {
970 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1
[1], Demod
.output
[0]);
973 // Tag is now selected,
974 // First get the tag's UID:
976 ComputeCrc14443(CRC_14443_B
, cmd1
, 1 , &cmd1
[1], &cmd1
[2]);
977 CodeAndTransmit14443bAsReader(cmd1
, 3); // Only first three bytes for this one
980 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
982 if (Demod
.len
!= 10) {
983 Dbprintf("Expected 10 bytes from tag, got %d", Demod
.len
);
986 // The check the CRC of the answer (use cmd1 as temporary variable):
987 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 8, &cmd1
[2], &cmd1
[3]);
988 if(cmd1
[2] != Demod
.output
[8] || cmd1
[3] != Demod
.output
[9]) {
989 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
990 (cmd1
[2]<<8)+cmd1
[3],
991 (Demod
.output
[8]<<8)+Demod
.output
[9]
993 // Do not return;, let's go on... (we should retry, maybe ?)
995 Dbprintf("Tag UID (64 bits): %08x %08x",
996 (Demod
.output
[7]<<24) + (Demod
.output
[6]<<16) + (Demod
.output
[5]<<8) + Demod
.output
[4],
997 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0]);
999 // Now loop to read all 16 blocks, address from 0 to last block
1000 Dbprintf("Tag memory dump, block 0 to %d",dwLast
);
1006 DbpString("System area block (0xff):");
1010 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
1011 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
1014 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
1016 if (Demod
.len
!= 6) { // Check if we got an answer from the tag
1017 DbpString("Expected 6 bytes from tag, got less...");
1020 // The check the CRC of the answer (use cmd1 as temporary variable):
1021 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 4, &cmd1
[2], &cmd1
[3]);
1022 if(cmd1
[2] != Demod
.output
[4] || cmd1
[3] != Demod
.output
[5]) {
1023 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1024 (cmd1
[2]<<8)+cmd1
[3],
1025 (Demod
.output
[4]<<8)+Demod
.output
[5]
1027 // Do not return;, let's go on... (we should retry, maybe ?)
1029 // Now print out the memory location:
1030 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i
,
1031 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0],
1032 (Demod
.output
[4]<<8)+Demod
.output
[5]
1034 if (i
== 0xff) break;
1040 //=============================================================================
1041 // Finally, the `sniffer' combines elements from both the reader and
1042 // simulated tag, to show both sides of the conversation.
1043 //=============================================================================
1045 //-----------------------------------------------------------------------------
1046 // Record the sequence of commands sent by the reader to the tag, with
1047 // triggering so that we start recording at the point that the tag is moved
1049 //-----------------------------------------------------------------------------
1051 * Memory usage for this function, (within BigBuf)
1052 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1053 * Last Received command (tag->reader) - MAX_FRAME_SIZE
1054 * DMA Buffer - DMA_BUFFER_SIZE
1055 * Demodulated samples received - all the rest
1057 void RAMFUNC
SnoopIso14443b(void)
1059 // We won't start recording the frames that we acquire until we trigger;
1060 // a good trigger condition to get started is probably when we see a
1061 // response from the tag.
1062 int triggered
= TRUE
; // TODO: set and evaluate trigger condition
1064 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1070 // The DMA buffer, used to stream samples from the FPGA
1071 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE
);
1075 int maxBehindBy
= 0;
1077 // Count of samples received so far, so that we can include timing
1078 // information in the trace buffer.
1081 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1082 UartInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1084 // Print some debug information about the buffer sizes
1085 Dbprintf("Snooping buffers initialized:");
1086 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1087 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE
);
1088 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE
);
1089 Dbprintf(" DMA: %i bytes", DMA_BUFFER_SIZE
);
1091 // Signal field is off, no reader signal, no tag signal
1094 // And put the FPGA in the appropriate mode
1095 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
| FPGA_HF_READER_RX_XCORR_SNOOP
);
1096 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1098 // Setup for the DMA.
1101 lastRxCounter
= DMA_BUFFER_SIZE
;
1102 FpgaSetupSscDma((uint8_t*) dmaBuf
, DMA_BUFFER_SIZE
);
1103 uint8_t parity
[MAX_PARITY_SIZE
];
1105 bool TagIsActive
= FALSE
;
1106 bool ReaderIsActive
= FALSE
;
1108 // And now we loop, receiving samples.
1110 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
1111 (DMA_BUFFER_SIZE
-1);
1112 if(behindBy
> maxBehindBy
) {
1113 maxBehindBy
= behindBy
;
1116 if(behindBy
< 2) continue;
1122 if(upTo
>= dmaBuf
+ DMA_BUFFER_SIZE
) {
1124 lastRxCounter
+= DMA_BUFFER_SIZE
;
1125 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
1126 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
1128 if(behindBy
> (9*DMA_BUFFER_SIZE
/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1129 Dbprintf("blew circular buffer! behindBy=%d", behindBy
);
1133 DbpString("Reached trace limit");
1136 if(BUTTON_PRESS()) {
1137 DbpString("cancelled");
1144 if (!TagIsActive
) { // no need to try decoding reader data if the tag is sending
1145 if(Handle14443bUartBit(ci
& 0x01)) {
1146 if(triggered
&& tracing
) {
1147 //GetParity(Uart.output, Uart.byteCnt, parity);
1148 LogTrace(Uart
.output
,Uart
.byteCnt
,samples
, samples
,parity
,TRUE
);
1150 /* And ready to receive another command. */
1152 /* And also reset the demod code, which might have been */
1153 /* false-triggered by the commands from the reader. */
1156 if(Handle14443bUartBit(cq
& 0x01)) {
1157 if(triggered
&& tracing
) {
1158 //GetParity(Uart.output, Uart.byteCnt, parity);
1159 LogTrace(Uart
.output
,Uart
.byteCnt
,samples
, samples
, parity
, TRUE
);
1161 /* And ready to receive another command. */
1163 /* And also reset the demod code, which might have been */
1164 /* false-triggered by the commands from the reader. */
1167 ReaderIsActive
= (Uart
.state
> STATE_GOT_FALLING_EDGE_OF_SOF
);
1170 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
1171 if(Handle14443bSamplesDemod(ci
| 0x01, cq
| 0x01)) {
1173 //Use samples as a time measurement
1176 uint8_t parity
[MAX_PARITY_SIZE
];
1177 //GetParity(Demod.output, Demod.len, parity);
1178 LogTrace(Demod
.output
, Demod
.len
,samples
, samples
, parity
, FALSE
);
1182 // And ready to receive another response.
1185 TagIsActive
= (Demod
.state
> DEMOD_GOT_FALLING_EDGE_OF_SOF
);
1190 FpgaDisableSscDma();
1192 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
1193 DbpString("Snoop statistics:");
1194 Dbprintf(" Max behind by: %i", maxBehindBy
);
1195 Dbprintf(" Uart State: %x", Uart
.state
);
1196 Dbprintf(" Uart ByteCnt: %i", Uart
.byteCnt
);
1197 Dbprintf(" Uart ByteCntMax: %i", Uart
.byteCntMax
);
1198 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
1203 * Send raw command to tag ISO14443B
1205 * datalen len of buffer data
1206 * recv bool when true wait for data from tag and send to client
1207 * powerfield bool leave the field on when true
1208 * data buffer with byte to send
1214 void SendRawCommand14443B(uint32_t datalen
, uint32_t recv
, uint8_t powerfield
, uint8_t data
[])
1216 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1217 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1222 /* if(!powerfield) {
1223 // Make sure that we start from off, since the tags are stateful;
1224 // confusing things will happen if we don't reset them between reads.
1225 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1231 // if(!GETBIT(GPIO_LED_D)) { // if field is off
1232 // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
1233 // // Signal field is on with the appropriate LED
1238 CodeAndTransmit14443bAsReader(data
, datalen
);
1241 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
1242 uint16_t iLen
= MIN(Demod
.len
,USB_CMD_DATA_SIZE
);
1243 cmd_send(CMD_ACK
,iLen
,0,0,Demod
.output
,iLen
);
1247 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);