1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "proxmark3.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "iso14443b.h"
22 #include "mifareutil.h"
26 static uint32_t iso14a_timeout
;
29 // the block number for the ISO14443-4 PCB
30 static uint8_t iso14_pcb_blocknum
= 0;
35 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36 #define REQUEST_GUARD_TIME (7000/16 + 1)
37 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39 // bool LastCommandWasRequest = FALSE;
42 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 // When the PM acts as reader and is receiving tag data, it takes
45 // 3 ticks delay in the AD converter
46 // 16 ticks until the modulation detector completes and sets curbit
47 // 8 ticks until bit_to_arm is assigned from curbit
48 // 8*16 ticks for the transfer from FPGA to ARM
49 // 4*16 ticks until we measure the time
50 // - 8*16 ticks because we measure the time of the previous transfer
51 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
53 // When the PM acts as a reader and is sending, it takes
54 // 4*16 ticks until we can write data to the sending hold register
55 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
56 // 8 ticks until the first transfer starts
57 // 8 ticks later the FPGA samples the data
58 // 1 tick to assign mod_sig_coil
59 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61 // When the PM acts as tag and is receiving it takes
62 // 2 ticks delay in the RF part (for the first falling edge),
63 // 3 ticks for the A/D conversion,
64 // 8 ticks on average until the start of the SSC transfer,
65 // 8 ticks until the SSC samples the first data
66 // 7*16 ticks to complete the transfer from FPGA to ARM
67 // 8 ticks until the next ssp_clk rising edge
68 // 4*16 ticks until we measure the time
69 // - 8*16 ticks because we measure the time of the previous transfer
70 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
72 // The FPGA will report its internal sending delay in
73 uint16_t FpgaSendQueueDelay
;
74 // the 5 first bits are the number of bits buffered in mod_sig_buf
75 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78 // When the PM acts as tag and is sending, it takes
79 // 4*16 ticks until we can write data to the sending hold register
80 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
81 // 8 ticks until the first transfer starts
82 // 8 ticks later the FPGA samples the data
83 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84 // + 1 tick to assign mod_sig_coil
85 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
87 // When the PM acts as sniffer and is receiving tag data, it takes
88 // 3 ticks A/D conversion
89 // 14 ticks to complete the modulation detection
90 // 8 ticks (on average) until the result is stored in to_arm
91 // + the delays in transferring data - which is the same for
92 // sniffing reader and tag data and therefore not relevant
93 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
95 // When the PM acts as sniffer and is receiving reader data, it takes
96 // 2 ticks delay in analogue RF receiver (for the falling edge of the
97 // start bit, which marks the start of the communication)
98 // 3 ticks A/D conversion
99 // 8 ticks on average until the data is stored in to_arm.
100 // + the delays in transferring data - which is the same for
101 // sniffing reader and tag data and therefore not relevant
102 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
104 //variables used for timing purposes:
105 //these are in ssp_clk cycles:
106 static uint32_t NextTransferTime
;
107 static uint32_t LastTimeProxToAirStart
;
108 static uint32_t LastProxToAirDuration
;
110 // CARD TO READER - manchester
111 // Sequence D: 11110000 modulation with subcarrier during first half
112 // Sequence E: 00001111 modulation with subcarrier during second half
113 // Sequence F: 00000000 no modulation with subcarrier
114 // READER TO CARD - miller
115 // Sequence X: 00001100 drop after half a period
116 // Sequence Y: 00000000 no drop
117 // Sequence Z: 11000000 drop at start
125 void iso14a_set_trigger(bool enable
) {
129 void iso14a_set_timeout(uint32_t timeout
) {
130 iso14a_timeout
= timeout
;
131 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout
, iso14a_timeout
/ 106);
134 void iso14a_set_ATS_timeout(uint8_t *ats
) {
140 if (ats
[0] > 1) { // there is a format byte T0
141 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
143 if ((ats
[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
148 fwi
= (tb1
& 0xf0) >> 4; // frame waiting indicator (FWI)
149 //fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
150 fwt
= 4096 * (1 << fwi
);
152 //iso14a_set_timeout(fwt/(8*16));
153 iso14a_set_timeout(fwt
/128);
158 //-----------------------------------------------------------------------------
159 // Generate the parity value for a byte sequence
161 //-----------------------------------------------------------------------------
162 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
164 uint16_t paritybit_cnt
= 0;
165 uint16_t paritybyte_cnt
= 0;
166 uint8_t parityBits
= 0;
168 for (uint16_t i
= 0; i
< iLen
; i
++) {
169 // Generate the parity bits
170 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
171 if (paritybit_cnt
== 7) {
172 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
173 parityBits
= 0; // and advance to next Parity Byte
181 // save remaining parity bits
182 par
[paritybyte_cnt
] = parityBits
;
186 void AppendCrc14443a(uint8_t* data
, int len
)
188 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
191 //=============================================================================
192 // ISO 14443 Type A - Miller decoder
193 //=============================================================================
195 // This decoder is used when the PM3 acts as a tag.
196 // The reader will generate "pauses" by temporarily switching of the field.
197 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
198 // The FPGA does a comparison with a threshold and would deliver e.g.:
199 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
200 // The Miller decoder needs to identify the following sequences:
201 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
202 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
203 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
204 // Note 1: the bitstream may start at any time. We therefore need to sync.
205 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
206 //-----------------------------------------------------------------------------
209 // Lookup-Table to decide if 4 raw bits are a modulation.
210 // We accept the following:
211 // 0001 - a 3 tick wide pause
212 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
213 // 0111 - a 2 tick wide pause shifted left
214 // 1001 - a 2 tick wide pause shifted right
215 const bool Mod_Miller_LUT
[] = {
216 FALSE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, TRUE
,
217 FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
219 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
220 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
224 Uart
.state
= STATE_UNSYNCD
;
226 Uart
.len
= 0; // number of decoded data bytes
227 Uart
.parityLen
= 0; // number of decoded parity bytes
228 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
229 Uart
.parityBits
= 0; // holds 8 parity bits
238 void UartInit(uint8_t *data
, uint8_t *parity
)
241 Uart
.parity
= parity
;
242 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
246 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
247 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
250 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
252 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
254 Uart
.syncBit
= 9999; // not set
256 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
257 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
258 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
260 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
261 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
262 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
263 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
265 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
266 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
268 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
269 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
270 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
271 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
272 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
273 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
274 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
275 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
277 if (Uart
.syncBit
!= 9999) { // found a sync bit
278 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
279 Uart
.startTime
-= Uart
.syncBit
;
280 Uart
.endTime
= Uart
.startTime
;
281 Uart
.state
= STATE_START_OF_COMMUNICATION
;
286 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
287 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
289 } else { // Modulation in first half = Sequence Z = logic "0"
290 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
294 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
295 Uart
.state
= STATE_MILLER_Z
;
296 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
297 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
298 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
299 Uart
.parityBits
<<= 1; // make room for the parity bit
300 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
303 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
304 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
311 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
313 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
314 Uart
.state
= STATE_MILLER_X
;
315 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
316 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
317 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
318 Uart
.parityBits
<<= 1; // make room for the new parity bit
319 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
322 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
323 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
327 } else { // no modulation in both halves - Sequence Y
328 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
329 Uart
.state
= STATE_UNSYNCD
;
330 Uart
.bitCount
--; // last "0" was part of EOC sequence
331 Uart
.shiftReg
<<= 1; // drop it
332 if(Uart
.bitCount
> 0) { // if we decoded some bits
333 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
334 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
335 Uart
.parityBits
<<= 1; // add a (void) parity bit
336 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
337 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
339 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
340 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
341 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
344 return TRUE
; // we are finished with decoding the raw data sequence
346 UartReset(); // Nothing received - start over
349 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
351 } else { // a logic "0"
353 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
354 Uart
.state
= STATE_MILLER_Y
;
355 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
356 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
357 Uart
.parityBits
<<= 1; // make room for the parity bit
358 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
361 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
362 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
372 return FALSE
; // not finished yet, need more data
377 //=============================================================================
378 // ISO 14443 Type A - Manchester decoder
379 //=============================================================================
381 // This decoder is used when the PM3 acts as a reader.
382 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
383 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
384 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
385 // The Manchester decoder needs to identify the following sequences:
386 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
387 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
388 // 8 ticks unmodulated: Sequence F = end of communication
389 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
390 // Note 1: the bitstream may start at any time. We therefore need to sync.
391 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
394 // Lookup-Table to decide if 4 raw bits are a modulation.
395 // We accept three or four "1" in any position
396 const bool Mod_Manchester_LUT
[] = {
397 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
398 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
401 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
402 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
407 Demod
.state
= DEMOD_UNSYNCD
;
408 Demod
.len
= 0; // number of decoded data bytes
410 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
411 Demod
.parityBits
= 0; //
412 Demod
.collisionPos
= 0; // Position of collision bit
413 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
420 Demod
.syncBit
= 0xFFFF;
424 void DemodInit(uint8_t *data
, uint8_t *parity
)
427 Demod
.parity
= parity
;
431 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
432 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
435 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
437 if (Demod
.state
== DEMOD_UNSYNCD
) {
439 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
440 if (Demod
.twoBits
== 0x0000) {
446 Demod
.syncBit
= 0xFFFF; // not set
447 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
448 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
449 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
450 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
451 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
452 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
453 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
454 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
455 if (Demod
.syncBit
!= 0xFFFF) {
456 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
457 Demod
.startTime
-= Demod
.syncBit
;
458 Demod
.bitCount
= offset
; // number of decoded data bits
459 Demod
.state
= DEMOD_MANCHESTER_DATA
;
465 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
466 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
467 if (!Demod
.collisionPos
) {
468 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
470 } // modulation in first half only - Sequence D = 1
472 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
473 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
474 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
475 Demod
.parityBits
<<= 1; // make room for the parity bit
476 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
479 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
480 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
481 Demod
.parityBits
= 0;
484 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
485 } else { // no modulation in first half
486 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
488 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
489 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
490 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
491 Demod
.parityBits
<<= 1; // make room for the new parity bit
492 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
495 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
496 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
497 Demod
.parityBits
= 0;
500 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
501 } else { // no modulation in both halves - End of communication
502 if(Demod
.bitCount
> 0) { // there are some remaining data bits
503 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
504 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
505 Demod
.parityBits
<<= 1; // add a (void) parity bit
506 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
507 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
509 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
510 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
511 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
514 return TRUE
; // we are finished with decoding the raw data sequence
515 } else { // nothing received. Start over
521 return FALSE
; // not finished yet, need more data
524 //=============================================================================
525 // Finally, a `sniffer' for ISO 14443 Type A
526 // Both sides of communication!
527 //=============================================================================
529 //-----------------------------------------------------------------------------
530 // Record the sequence of commands sent by the reader to the tag, with
531 // triggering so that we start recording at the point that the tag is moved
533 //-----------------------------------------------------------------------------
534 void RAMFUNC
SniffIso14443a(uint8_t param
) {
536 // bit 0 - trigger from first card answer
537 // bit 1 - trigger from first reader 7-bit request
540 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
542 // Allocate memory from BigBuf for some buffers
543 // free all previous allocations first
544 BigBuf_free(); BigBuf_Clear_ext(false);
550 // The command (reader -> tag) that we're receiving.
551 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
552 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
554 // The response (tag -> reader) that we're receiving.
555 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
556 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
558 // The DMA buffer, used to stream samples from the FPGA
559 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
561 uint8_t *data
= dmaBuf
;
562 uint8_t previous_data
= 0;
565 bool TagIsActive
= FALSE
;
566 bool ReaderIsActive
= FALSE
;
568 // Set up the demodulator for tag -> reader responses.
569 DemodInit(receivedResponse
, receivedResponsePar
);
571 // Set up the demodulator for the reader -> tag commands
572 UartInit(receivedCmd
, receivedCmdPar
);
574 // Setup and start DMA.
575 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
577 // We won't start recording the frames that we acquire until we trigger;
578 // a good trigger condition to get started is probably when we see a
579 // response from the tag.
580 // triggered == FALSE -- to wait first for card
581 bool triggered
= !(param
& 0x03);
583 // And now we loop, receiving samples.
584 for(uint32_t rsamples
= 0; TRUE
; ) {
587 DbpString("cancelled by button");
594 int register readBufDataP
= data
- dmaBuf
;
595 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
596 if (readBufDataP
<= dmaBufDataP
){
597 dataLen
= dmaBufDataP
- readBufDataP
;
599 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
601 // test for length of buffer
602 if(dataLen
> maxDataLen
) {
603 maxDataLen
= dataLen
;
604 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
605 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
609 if(dataLen
< 1) continue;
611 // primary buffer was stopped( <-- we lost data!
612 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
613 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
614 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
615 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
617 // secondary buffer sets as primary, secondary buffer was stopped
618 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
619 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
620 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
625 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
627 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
628 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
629 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
632 // check - if there is a short 7bit request from reader
633 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
636 if (!LogTrace(receivedCmd
,
638 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
639 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
643 /* And ready to receive another command. */
645 /* And also reset the demod code, which might have been */
646 /* false-triggered by the commands from the reader. */
650 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
653 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
654 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
655 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
658 if (!LogTrace(receivedResponse
,
660 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
661 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
665 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
667 // And ready to receive another response.
669 // And reset the Miller decoder including itS (now outdated) input buffer
670 UartInit(receivedCmd
, receivedCmdPar
);
674 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
678 previous_data
= *data
;
681 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
689 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
690 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
695 //-----------------------------------------------------------------------------
696 // Prepare tag messages
697 //-----------------------------------------------------------------------------
698 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
702 // Correction bit, might be removed when not needed
707 ToSendStuffBit(1); // 1
713 ToSend
[++ToSendMax
] = SEC_D
;
714 LastProxToAirDuration
= 8 * ToSendMax
- 4;
716 for(uint16_t i
= 0; i
< len
; i
++) {
720 for(uint16_t j
= 0; j
< 8; j
++) {
722 ToSend
[++ToSendMax
] = SEC_D
;
724 ToSend
[++ToSendMax
] = SEC_E
;
729 // Get the parity bit
730 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
731 ToSend
[++ToSendMax
] = SEC_D
;
732 LastProxToAirDuration
= 8 * ToSendMax
- 4;
734 ToSend
[++ToSendMax
] = SEC_E
;
735 LastProxToAirDuration
= 8 * ToSendMax
;
740 ToSend
[++ToSendMax
] = SEC_F
;
742 // Convert from last byte pos to length
746 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
748 uint8_t par
[MAX_PARITY_SIZE
] = {0};
749 GetParity(cmd
, len
, par
);
750 CodeIso14443aAsTagPar(cmd
, len
, par
);
754 static void Code4bitAnswerAsTag(uint8_t cmd
)
760 // Correction bit, might be removed when not needed
765 ToSendStuffBit(1); // 1
771 ToSend
[++ToSendMax
] = SEC_D
;
774 for(i
= 0; i
< 4; i
++) {
776 ToSend
[++ToSendMax
] = SEC_D
;
777 LastProxToAirDuration
= 8 * ToSendMax
- 4;
779 ToSend
[++ToSendMax
] = SEC_E
;
780 LastProxToAirDuration
= 8 * ToSendMax
;
786 ToSend
[++ToSendMax
] = SEC_F
;
788 // Convert from last byte pos to length
792 //-----------------------------------------------------------------------------
793 // Wait for commands from reader
794 // Stop when button is pressed
795 // Or return TRUE when command is captured
796 //-----------------------------------------------------------------------------
797 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
799 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
800 // only, since we are receiving, not transmitting).
801 // Signal field is off with the appropriate LED
803 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
805 // Now run a `software UART' on the stream of incoming samples.
806 UartInit(received
, parity
);
809 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
814 if(BUTTON_PRESS()) return FALSE
;
816 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
817 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
818 if(MillerDecoding(b
, 0)) {
826 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
827 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
828 int EmSend4bit(uint8_t resp
);
829 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
830 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
831 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
832 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
833 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
834 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
836 static uint8_t* free_buffer_pointer
;
843 uint32_t ProxToAirDuration
;
844 } tag_response_info_t
;
846 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
847 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
848 // This will need the following byte array for a modulation sequence
849 // 144 data bits (18 * 8)
852 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
853 // 1 just for the case
855 // 166 bytes, since every bit that needs to be send costs us a byte
859 // Prepare the tag modulation bits from the message
860 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
862 // Make sure we do not exceed the free buffer space
863 if (ToSendMax
> max_buffer_size
) {
864 Dbprintf("Out of memory, when modulating bits for tag answer:");
865 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
869 // Copy the byte array, used for this modulation to the buffer position
870 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
872 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
873 response_info
->modulation_n
= ToSendMax
;
874 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
880 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
881 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
882 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
883 // -> need 273 bytes buffer
884 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
885 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
886 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
888 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
889 // Retrieve and store the current buffer index
890 response_info
->modulation
= free_buffer_pointer
;
892 // Determine the maximum size we can use from our buffer
893 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
895 // Forward the prepare tag modulation function to the inner function
896 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
897 // Update the free buffer offset
898 free_buffer_pointer
+= ToSendMax
;
905 //-----------------------------------------------------------------------------
906 // Main loop of simulated tag: receive commands from reader, decide what
907 // response to send, and send it.
908 //-----------------------------------------------------------------------------
909 void SimulateIso14443aTag(int tagType
, int flags
, byte_t
* data
)
911 uint32_t counters
[] = {0,0,0};
912 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
913 // This can be used in a reader-only attack.
914 // (it can also be retrieved via 'hf 14a list', but hey...
915 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0,0,0};
916 uint8_t ar_nr_collected
= 0;
920 // PACK response to PWD AUTH for EV1/NTAG
921 uint8_t response8
[4] = {0,0,0,0};
923 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
924 uint8_t response1
[2] = {0,0};
927 case 1: { // MIFARE Classic
928 // Says: I am Mifare 1k - original line
933 case 2: { // MIFARE Ultralight
934 // Says: I am a stupid memory tag, no crypto
939 case 3: { // MIFARE DESFire
940 // Says: I am a DESFire tag, ph33r me
945 case 4: { // ISO/IEC 14443-4
946 // Says: I am a javacard (JCOP)
951 case 5: { // MIFARE TNP3XXX
957 case 6: { // MIFARE Mini
958 // Says: I am a Mifare Mini, 320b
964 // Says: I am a NTAG,
971 ComputeCrc14443(CRC_14443_A
, response8
, 2, &response8
[2], &response8
[3]);
972 // uid not supplied then get from emulator memory
974 uint16_t start
= 4 * (0+12);
976 emlGetMemBt( emdata
, start
, sizeof(emdata
));
977 memcpy(data
, emdata
, 3); //uid bytes 0-2
978 memcpy(data
+3, emdata
+4, 4); //uid bytes 3-7
979 flags
|= FLAG_7B_UID_IN_DATA
;
983 Dbprintf("Error: unkown tagtype (%d)",tagType
);
988 // The second response contains the (mandatory) first 24 bits of the UID
989 uint8_t response2
[5] = {0x00};
991 // Check if the uid uses the (optional) part
992 uint8_t response2a
[5] = {0x00};
994 if (flags
& FLAG_7B_UID_IN_DATA
) {
996 response2
[1] = data
[0];
997 response2
[2] = data
[1];
998 response2
[3] = data
[2];
1000 response2a
[0] = data
[3];
1001 response2a
[1] = data
[4];
1002 response2a
[2] = data
[5];
1003 response2a
[3] = data
[6]; //??
1004 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
1006 // Configure the ATQA and SAK accordingly
1007 response1
[0] |= 0x40;
1010 memcpy(response2
, data
, 4);
1011 //num_to_bytes(uid_1st,4,response2);
1012 // Configure the ATQA and SAK accordingly
1013 response1
[0] &= 0xBF;
1017 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1018 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
1020 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1021 uint8_t response3
[3] = {0x00};
1023 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
1025 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1026 uint8_t response3a
[3] = {0x00};
1027 response3a
[0] = sak
& 0xFB;
1028 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
1030 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1031 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1032 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1033 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1034 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1035 // TC(1) = 0x02: CID supported, NAD not supported
1036 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
1038 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
1039 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1040 //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1042 // Prepare CHK_TEARING
1043 //uint8_t response9[] = {0xBD,0x90,0x3f};
1045 #define TAG_RESPONSE_COUNT 10
1046 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
1047 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
1048 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
1049 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1050 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
1051 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
1052 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
1053 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1055 { .response
= response8
, .response_n
= sizeof(response8
) } // EV1/NTAG PACK response
1057 //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1058 //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1061 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1062 // Such a response is less time critical, so we can prepare them on the fly
1063 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1064 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1065 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1066 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1067 tag_response_info_t dynamic_response_info
= {
1068 .response
= dynamic_response_buffer
,
1070 .modulation
= dynamic_modulation_buffer
,
1074 // We need to listen to the high-frequency, peak-detected path.
1075 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1077 BigBuf_free_keep_EM();
1079 // allocate buffers:
1080 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1081 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1082 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1088 // Prepare the responses of the anticollision phase
1089 // there will be not enough time to do this at the moment the reader sends it REQA
1090 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++)
1091 prepare_allocated_tag_modulation(&responses
[i
]);
1095 // To control where we are in the protocol
1099 // Just to allow some checks
1105 tag_response_info_t
* p_response
;
1112 // Clean receive command buffer
1113 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1114 DbpString("Button press");
1120 // Okay, look at the command now.
1122 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1123 p_response
= &responses
[0]; order
= 1;
1124 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1125 p_response
= &responses
[0]; order
= 6;
1126 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1127 p_response
= &responses
[1]; order
= 2;
1128 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1129 p_response
= &responses
[2]; order
= 20;
1130 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1131 p_response
= &responses
[3]; order
= 3;
1132 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1133 p_response
= &responses
[4]; order
= 30;
1134 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1135 uint8_t block
= receivedCmd
[1];
1136 // if Ultralight or NTAG (4 byte blocks)
1137 if ( tagType
== 7 || tagType
== 2 ) {
1138 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1139 uint16_t start
= 4 * (block
+12);
1140 uint8_t emdata
[MAX_MIFARE_FRAME_SIZE
];
1141 emlGetMemBt( emdata
, start
, 16);
1142 AppendCrc14443a(emdata
, 16);
1143 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1144 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1146 } else { // all other tags (16 byte block tags)
1147 EmSendCmdEx(data
+(4*receivedCmd
[1]),16,false);
1148 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1149 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1152 } else if(receivedCmd
[0] == 0x3A) { // Received a FAST READ (ranged read)
1154 uint8_t emdata
[MAX_FRAME_SIZE
];
1155 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1156 int start
= (receivedCmd
[1]+12) * 4;
1157 int len
= (receivedCmd
[2] - receivedCmd
[1] + 1) * 4;
1158 emlGetMemBt( emdata
, start
, len
);
1159 AppendCrc14443a(emdata
, len
);
1160 EmSendCmdEx(emdata
, len
+2, false);
1163 } else if(receivedCmd
[0] == 0x3C && tagType
== 7) { // Received a READ SIGNATURE --
1164 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1165 uint16_t start
= 4 * 4;
1167 emlGetMemBt( emdata
, start
, 32);
1168 AppendCrc14443a(emdata
, 32);
1169 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1171 } else if (receivedCmd
[0] == 0x39 && tagType
== 7) { // Received a READ COUNTER --
1172 uint8_t index
= receivedCmd
[1];
1173 uint8_t data
[] = {0x00,0x00,0x00,0x14,0xa5};
1174 if ( counters
[index
] > 0) {
1175 num_to_bytes(counters
[index
], 3, data
);
1176 AppendCrc14443a(data
, sizeof(data
)-2);
1178 EmSendCmdEx(data
,sizeof(data
),false);
1180 } else if (receivedCmd
[0] == 0xA5 && tagType
== 7) { // Received a INC COUNTER --
1181 // number of counter
1182 uint8_t counter
= receivedCmd
[1];
1183 uint32_t val
= bytes_to_num(receivedCmd
+2,4);
1184 counters
[counter
] = val
;
1187 uint8_t ack
[] = {0x0a};
1188 EmSendCmdEx(ack
,sizeof(ack
),false);
1191 } else if(receivedCmd
[0] == 0x3E && tagType
== 7) { // Received a CHECK_TEARING_EVENT --
1192 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1195 if (receivedCmd
[1]<3) counter
= receivedCmd
[1];
1196 emlGetMemBt( emdata
, 10+counter
, 1);
1197 AppendCrc14443a(emdata
, sizeof(emdata
)-2);
1198 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1200 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1201 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1203 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1205 if ( tagType
== 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1207 emlGetMemBt( emdata
, 0, 8 );
1208 AppendCrc14443a(emdata
, sizeof(emdata
)-2);
1209 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1212 p_response
= &responses
[5]; order
= 7;
1214 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1215 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1216 EmSend4bit(CARD_NACK_NA
);
1219 p_response
= &responses
[6]; order
= 70;
1221 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1222 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1223 uint32_t nonce
= bytes_to_num(response5
,4);
1224 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1225 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1226 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1228 if(flags
& FLAG_NR_AR_ATTACK
)
1230 if(ar_nr_collected
< 2){
1231 // Avoid duplicates... probably not necessary, nr should vary.
1232 //if(ar_nr_responses[3] != nr){
1233 ar_nr_responses
[ar_nr_collected
*5] = 0;
1234 ar_nr_responses
[ar_nr_collected
*5+1] = 0;
1235 ar_nr_responses
[ar_nr_collected
*5+2] = nonce
;
1236 ar_nr_responses
[ar_nr_collected
*5+3] = nr
;
1237 ar_nr_responses
[ar_nr_collected
*5+4] = ar
;
1242 if(ar_nr_collected
> 1 ) {
1244 if (MF_DBGLEVEL
>= 2) {
1245 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1246 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1247 ar_nr_responses
[0], // UID1
1248 ar_nr_responses
[1], // UID2
1249 ar_nr_responses
[2], // NT
1250 ar_nr_responses
[3], // AR1
1251 ar_nr_responses
[4], // NR1
1252 ar_nr_responses
[8], // AR2
1253 ar_nr_responses
[9] // NR2
1255 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1256 ar_nr_responses
[0], // UID1
1257 ar_nr_responses
[1], // UID2
1258 ar_nr_responses
[2], // NT1
1259 ar_nr_responses
[3], // AR1
1260 ar_nr_responses
[4], // NR1
1261 ar_nr_responses
[7], // NT2
1262 ar_nr_responses
[8], // AR2
1263 ar_nr_responses
[9] // NR2
1266 uint8_t len
= ar_nr_collected
*5*4;
1267 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,len
,0,&ar_nr_responses
,len
);
1268 ar_nr_collected
= 0;
1269 memset(ar_nr_responses
, 0x00, len
);
1272 } else if (receivedCmd
[0] == 0x1a ) // ULC authentication
1276 else if (receivedCmd
[0] == 0x1b) // NTAG / EV-1 authentication
1278 if ( tagType
== 7 ) {
1279 uint16_t start
= 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1281 emlGetMemBt( emdata
, start
, 2);
1282 AppendCrc14443a(emdata
, 2);
1283 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1285 uint32_t pwd
= bytes_to_num(receivedCmd
+1,4);
1287 if ( MF_DBGLEVEL
>= 3) Dbprintf("Auth attempt: %08x", pwd
);
1290 // Check for ISO 14443A-4 compliant commands, look at left nibble
1291 switch (receivedCmd
[0]) {
1293 case 0x03: { // IBlock (command no CID)
1294 dynamic_response_info
.response
[0] = receivedCmd
[0];
1295 dynamic_response_info
.response
[1] = 0x90;
1296 dynamic_response_info
.response
[2] = 0x00;
1297 dynamic_response_info
.response_n
= 3;
1300 case 0x0A: { // IBlock (command CID)
1301 dynamic_response_info
.response
[0] = receivedCmd
[0];
1302 dynamic_response_info
.response
[1] = 0x00;
1303 dynamic_response_info
.response
[2] = 0x90;
1304 dynamic_response_info
.response
[3] = 0x00;
1305 dynamic_response_info
.response_n
= 4;
1309 case 0x1B: { // Chaining command
1310 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1311 dynamic_response_info
.response_n
= 2;
1316 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1317 dynamic_response_info
.response_n
= 2;
1320 case 0xBA: { // ping / pong
1321 dynamic_response_info
.response
[0] = 0xAB;
1322 dynamic_response_info
.response
[1] = 0x00;
1323 dynamic_response_info
.response_n
= 2;
1327 case 0xC2: { // Readers sends deselect command
1328 dynamic_response_info
.response
[0] = 0xCA;
1329 dynamic_response_info
.response
[1] = 0x00;
1330 dynamic_response_info
.response_n
= 2;
1334 // Never seen this command before
1335 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1336 Dbprintf("Received unknown command (len=%d):",len
);
1337 Dbhexdump(len
,receivedCmd
,false);
1339 dynamic_response_info
.response_n
= 0;
1343 if (dynamic_response_info
.response_n
> 0) {
1344 // Copy the CID from the reader query
1345 dynamic_response_info
.response
[1] = receivedCmd
[1];
1347 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1348 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1349 dynamic_response_info
.response_n
+= 2;
1351 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1352 Dbprintf("Error preparing tag response");
1353 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1356 p_response
= &dynamic_response_info
;
1360 // Count number of wakeups received after a halt
1361 if(order
== 6 && lastorder
== 5) { happened
++; }
1363 // Count number of other messages after a halt
1364 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1366 if(cmdsRecvd
> 999) {
1367 DbpString("1000 commands later...");
1372 if (p_response
!= NULL
) {
1373 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1374 // do the tracing for the previous reader request and this tag answer:
1375 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1376 GetParity(p_response
->response
, p_response
->response_n
, par
);
1378 EmLogTrace(Uart
.output
,
1380 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1381 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1383 p_response
->response
,
1384 p_response
->response_n
,
1385 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1386 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1391 Dbprintf("Trace Full. Simulation stopped.");
1396 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1398 BigBuf_free_keep_EM();
1401 if (MF_DBGLEVEL
>= 4){
1402 Dbprintf("-[ Wake ups after halt [%d]", happened
);
1403 Dbprintf("-[ Messages after halt [%d]", happened2
);
1404 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd
);
1409 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1410 // of bits specified in the delay parameter.
1411 void PrepareDelayedTransfer(uint16_t delay
)
1416 uint8_t bitmask
= 0;
1417 uint8_t bits_to_shift
= 0;
1418 uint8_t bits_shifted
= 0;
1421 for (i
= 0; i
< delay
; ++i
)
1422 bitmask
|= (0x01 << i
);
1424 ToSend
[++ToSendMax
] = 0x00;
1426 for (i
= 0; i
< ToSendMax
; ++i
) {
1427 bits_to_shift
= ToSend
[i
] & bitmask
;
1428 ToSend
[i
] = ToSend
[i
] >> delay
;
1429 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1430 bits_shifted
= bits_to_shift
;
1435 //-------------------------------------------------------------------------------------
1436 // Transmit the command (to the tag) that was placed in ToSend[].
1437 // Parameter timing:
1438 // if NULL: transfer at next possible time, taking into account
1439 // request guard time and frame delay time
1440 // if == 0: transfer immediately and return time of transfer
1441 // if != 0: delay transfer until time specified
1442 //-------------------------------------------------------------------------------------
1443 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1445 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1447 uint32_t ThisTransferTime
= 0;
1452 // Delay transfer (fine tuning - up to 7 MF clock ticks)
1453 PrepareDelayedTransfer(*timing
& 0x00000007);
1456 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1459 if (MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8))
1460 Dbprintf("TransmitFor14443a: Missed timing");
1462 // Delay transfer (multiple of 8 MF clock ticks)
1463 while (GetCountSspClk() < (*timing
& 0xfffffff8));
1465 LastTimeProxToAirStart
= *timing
;
1467 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1469 while(GetCountSspClk() < ThisTransferTime
);
1471 LastTimeProxToAirStart
= ThisTransferTime
;
1475 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1479 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1480 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1487 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1491 //-----------------------------------------------------------------------------
1492 // Prepare reader command (in bits, support short frames) to send to FPGA
1493 //-----------------------------------------------------------------------------
1494 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1502 // Start of Communication (Seq. Z)
1503 ToSend
[++ToSendMax
] = SEC_Z
;
1504 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1506 size_t bytecount
= nbytes(bits
);
1507 // Generate send structure for the data bits
1508 for (i
= 0; i
< bytecount
; i
++) {
1509 // Get the current byte to send
1511 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1513 for (j
= 0; j
< bitsleft
; j
++) {
1516 ToSend
[++ToSendMax
] = SEC_X
;
1517 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1522 ToSend
[++ToSendMax
] = SEC_Z
;
1523 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1526 ToSend
[++ToSendMax
] = SEC_Y
;
1533 // Only transmit parity bit if we transmitted a complete byte
1534 if (j
== 8 && parity
!= NULL
) {
1535 // Get the parity bit
1536 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1538 ToSend
[++ToSendMax
] = SEC_X
;
1539 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1544 ToSend
[++ToSendMax
] = SEC_Z
;
1545 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1548 ToSend
[++ToSendMax
] = SEC_Y
;
1555 // End of Communication: Logic 0 followed by Sequence Y
1558 ToSend
[++ToSendMax
] = SEC_Z
;
1559 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1562 ToSend
[++ToSendMax
] = SEC_Y
;
1565 ToSend
[++ToSendMax
] = SEC_Y
;
1567 // Convert to length of command:
1571 //-----------------------------------------------------------------------------
1572 // Prepare reader command to send to FPGA
1573 //-----------------------------------------------------------------------------
1574 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
)
1576 //CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1577 CodeIso14443aBitsAsReaderPar(cmd
, len
<<3, parity
);
1581 //-----------------------------------------------------------------------------
1582 // Wait for commands from reader
1583 // Stop when button is pressed (return 1) or field was gone (return 2)
1584 // Or return 0 when command is captured
1585 //-----------------------------------------------------------------------------
1586 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1590 uint32_t timer
= 0, vtime
= 0;
1594 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1595 // only, since we are receiving, not transmitting).
1596 // Signal field is off with the appropriate LED
1598 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1600 // Set ADC to read field strength
1601 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1602 AT91C_BASE_ADC
->ADC_MR
=
1603 ADC_MODE_PRESCALE(63) |
1604 ADC_MODE_STARTUP_TIME(1) |
1605 ADC_MODE_SAMPLE_HOLD_TIME(15);
1606 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1608 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1610 // Now run a 'software UART' on the stream of incoming samples.
1611 UartInit(received
, parity
);
1614 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1619 if (BUTTON_PRESS()) return 1;
1621 // test if the field exists
1622 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1624 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1625 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1626 if (analogCnt
>= 32) {
1627 if ((MAX_ADC_HF_VOLTAGE
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1628 vtime
= GetTickCount();
1629 if (!timer
) timer
= vtime
;
1630 // 50ms no field --> card to idle state
1631 if (vtime
- timer
> 50) return 2;
1633 if (timer
) timer
= 0;
1639 // receive and test the miller decoding
1640 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1641 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1642 if(MillerDecoding(b
, 0)) {
1652 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1656 uint32_t ThisTransferTime
;
1658 // Modulate Manchester
1659 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1661 // include correction bit if necessary
1662 if (Uart
.parityBits
& 0x01) {
1663 correctionNeeded
= TRUE
;
1665 if(correctionNeeded
) {
1666 // 1236, so correction bit needed
1672 // clear receiving shift register and holding register
1673 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1674 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1675 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1676 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1678 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1679 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1680 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1681 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1684 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1687 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1690 for(; i
< respLen
; ) {
1691 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1692 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1693 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1696 if(BUTTON_PRESS()) break;
1699 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1700 uint8_t fpga_queued_bits
= FpgaSendQueueDelay
>> 3; // twich /8 ?? >>3,
1701 for (i
= 0; i
<= fpga_queued_bits
/8 + 1; ) {
1702 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1703 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1704 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1709 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1714 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1715 Code4bitAnswerAsTag(resp
);
1716 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1717 // do the tracing for the previous reader request and this tag answer:
1718 uint8_t par
[1] = {0x00};
1719 GetParity(&resp
, 1, par
);
1720 EmLogTrace(Uart
.output
,
1722 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1723 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1727 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1728 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1733 int EmSend4bit(uint8_t resp
){
1734 return EmSend4bitEx(resp
, false);
1737 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1738 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1739 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1740 // do the tracing for the previous reader request and this tag answer:
1741 EmLogTrace(Uart
.output
,
1743 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1744 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1748 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1749 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1754 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1755 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1756 GetParity(resp
, respLen
, par
);
1757 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1760 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1761 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1762 GetParity(resp
, respLen
, par
);
1763 return EmSendCmdExPar(resp
, respLen
, false, par
);
1766 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1767 return EmSendCmdExPar(resp
, respLen
, false, par
);
1770 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1771 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1773 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1774 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1775 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1776 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1777 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1778 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1779 reader_EndTime
= tag_StartTime
- exact_fdt
;
1780 reader_StartTime
= reader_EndTime
- reader_modlen
;
1782 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
))
1785 return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1789 //-----------------------------------------------------------------------------
1790 // Wait a certain time for tag response
1791 // If a response is captured return TRUE
1792 // If it takes too long return FALSE
1793 //-----------------------------------------------------------------------------
1794 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1798 // Set FPGA mode to "reader listen mode", no modulation (listen
1799 // only, since we are receiving, not transmitting).
1800 // Signal field is on with the appropriate LED
1802 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1804 // Now get the answer from the card
1805 DemodInit(receivedResponse
, receivedResponsePar
);
1808 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1813 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1814 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1815 if(ManchesterDecoding(b
, offset
, 0)) {
1816 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1818 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1825 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1827 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1829 // Send command to tag
1830 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1834 // Log reader command in trace buffer
1835 //LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1836 LogTrace(frame
, nbytes(bits
), (LastTimeProxToAirStart
<<4) + DELAY_ARM2AIR_AS_READER
, ((LastTimeProxToAirStart
+ LastProxToAirDuration
)<<4) + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1839 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1841 //ReaderTransmitBitsPar(frame, len*8, par, timing);
1842 ReaderTransmitBitsPar(frame
, len
<<3, par
, timing
);
1845 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1847 // Generate parity and redirect
1848 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1849 //GetParity(frame, len/8, par);
1850 GetParity(frame
, len
>> 3, par
);
1851 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1854 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1856 // Generate parity and redirect
1857 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1858 GetParity(frame
, len
, par
);
1859 //ReaderTransmitBitsPar(frame, len*8, par, timing);
1860 ReaderTransmitBitsPar(frame
, len
<<3, par
, timing
);
1863 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1865 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
))
1868 //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1869 LogTrace(receivedAnswer
, Demod
.len
, (Demod
.startTime
<<4) - DELAY_AIR2ARM_AS_READER
, (Demod
.endTime
<<4) - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1873 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1875 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0))
1878 //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1879 LogTrace(receivedAnswer
, Demod
.len
, (Demod
.startTime
<<4) - DELAY_AIR2ARM_AS_READER
, (Demod
.endTime
<<4) - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1883 // performs iso14443a anticollision (optional) and card select procedure
1884 // fills the uid and cuid pointer unless NULL
1885 // fills the card info record unless NULL
1886 // if anticollision is false, then the UID must be provided in uid_ptr[]
1887 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1888 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
, bool anticollision
, uint8_t num_cascades
) {
1889 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1890 uint8_t sel_all
[] = { 0x93,0x20 };
1891 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1892 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1893 uint8_t resp
[MAX_FRAME_SIZE
] = {0}; // theoretically. A usual RATS will be much smaller
1894 uint8_t resp_par
[MAX_PARITY_SIZE
] = {0};
1895 byte_t uid_resp
[4] = {0};
1896 size_t uid_resp_len
= 0;
1898 uint8_t sak
= 0x04; // cascade uid
1899 int cascade_level
= 0;
1902 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1903 ReaderTransmitBitsPar(wupa
, 7, NULL
, NULL
);
1906 if(!ReaderReceive(resp
, resp_par
)) return 0;
1909 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1910 p_hi14a_card
->uidlen
= 0;
1911 memset(p_hi14a_card
->uid
,0,10);
1914 if (anticollision
) {
1917 memset(uid_ptr
,0,10);
1920 // check for proprietary anticollision:
1921 if ((resp
[0] & 0x1F) == 0) return 3;
1923 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1924 // which case we need to make a cascade 2 request and select - this is a long UID
1925 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1926 for(; sak
& 0x04; cascade_level
++) {
1927 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1928 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1930 if (anticollision
) {
1932 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1933 if (!ReaderReceive(resp
, resp_par
)) return 0;
1935 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1936 memset(uid_resp
, 0, 4);
1937 uint16_t uid_resp_bits
= 0;
1938 uint16_t collision_answer_offset
= 0;
1939 // anti-collision-loop:
1940 while (Demod
.collisionPos
) {
1941 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1942 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1943 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1944 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1946 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1948 // construct anticollosion command:
1949 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1950 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1951 sel_uid
[2+i
] = uid_resp
[i
];
1953 collision_answer_offset
= uid_resp_bits
%8;
1954 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1955 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1957 // finally, add the last bits and BCC of the UID
1958 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1959 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1960 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1963 } else { // no collision, use the response to SELECT_ALL as current uid
1964 memcpy(uid_resp
, resp
, 4);
1968 if (cascade_level
< num_cascades
- 1) {
1970 memcpy(uid_resp
+1, uid_ptr
+cascade_level
*3, 3);
1972 memcpy(uid_resp
, uid_ptr
+cascade_level
*3, 4);
1977 // calculate crypto UID. Always use last 4 Bytes.
1979 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1981 // Construct SELECT UID command
1982 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1983 memcpy(sel_uid
+2, uid_resp
, 4); // the UID received during anticollision, or the provided UID
1984 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1985 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1986 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1989 if (!ReaderReceive(resp
, resp_par
)) return 0;
1993 // Test if more parts of the uid are coming
1994 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1995 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1996 // http://www.nxp.com/documents/application_note/AN10927.pdf
1997 uid_resp
[0] = uid_resp
[1];
1998 uid_resp
[1] = uid_resp
[2];
1999 uid_resp
[2] = uid_resp
[3];
2003 if(uid_ptr
&& anticollision
)
2004 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
2007 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
2008 p_hi14a_card
->uidlen
+= uid_resp_len
;
2013 p_hi14a_card
->sak
= sak
;
2014 p_hi14a_card
->ats_len
= 0;
2017 // non iso14443a compliant tag
2018 if( (sak
& 0x20) == 0) return 2;
2020 // Request for answer to select
2021 AppendCrc14443a(rats
, 2);
2022 ReaderTransmit(rats
, sizeof(rats
), NULL
);
2024 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
2027 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
2028 p_hi14a_card
->ats_len
= len
;
2031 // reset the PCB block number
2032 iso14_pcb_blocknum
= 0;
2034 // set default timeout based on ATS
2035 iso14a_set_ATS_timeout(resp
);
2040 void iso14443a_setup(uint8_t fpga_minor_mode
) {
2041 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
2042 // Set up the synchronous serial port
2044 // connect Demodulated Signal to ADC:
2045 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
2047 // Signal field is on with the appropriate LED
2048 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
2049 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
)
2054 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
2059 iso14a_set_timeout(10*106); // 10ms default
2064 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
2067 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
2068 uint8_t parity
[MAX_PARITY_SIZE
] = {0x00};
2069 uint8_t real_cmd
[cmd_len
+4];
2070 real_cmd
[0] = 0x0a; //I-Block
2071 // put block number into the PCB
2072 real_cmd
[0] |= iso14_pcb_blocknum
;
2073 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2074 memcpy(real_cmd
+2, cmd
, cmd_len
);
2075 AppendCrc14443a(real_cmd
,cmd_len
+2);
2077 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
2078 size_t len
= ReaderReceive(data
, parity
);
2079 uint8_t *data_bytes
= (uint8_t *) data
;
2081 return 0; //DATA LINK ERROR
2082 // if we received an I- or R(ACK)-Block with a block number equal to the
2083 // current block number, toggle the current block number
2084 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
2085 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
2086 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2087 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
2089 iso14_pcb_blocknum
^= 1;
2095 //-----------------------------------------------------------------------------
2096 // Read an ISO 14443a tag. Send out commands and store answers.
2098 //-----------------------------------------------------------------------------
2099 void ReaderIso14443a(UsbCommand
*c
)
2101 iso14a_command_t param
= c
->arg
[0];
2102 uint8_t *cmd
= c
->d
.asBytes
;
2103 size_t len
= c
->arg
[1] & 0xffff;
2104 size_t lenbits
= c
->arg
[1] >> 16;
2105 uint32_t timeout
= c
->arg
[2];
2107 byte_t buf
[USB_CMD_DATA_SIZE
] = {0x00};
2108 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
2110 if (param
& ISO14A_CONNECT
)
2115 if (param
& ISO14A_REQUEST_TRIGGER
)
2116 iso14a_set_trigger(TRUE
);
2118 if (param
& ISO14A_CONNECT
) {
2119 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
2120 if(!(param
& ISO14A_NO_SELECT
)) {
2121 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
2122 arg0
= iso14443a_select_card(NULL
,card
,NULL
, true, 0);
2123 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
2124 // if it fails, the cmdhf14a.c client quites.. however this one still executes.
2125 if ( arg0
== 0 ) return;
2129 if (param
& ISO14A_SET_TIMEOUT
)
2130 iso14a_set_timeout(timeout
);
2132 if (param
& ISO14A_APDU
) {
2133 arg0
= iso14_apdu(cmd
, len
, buf
);
2134 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2137 if (param
& ISO14A_RAW
) {
2138 if(param
& ISO14A_APPEND_CRC
) {
2139 if(param
& ISO14A_TOPAZMODE
) {
2140 AppendCrc14443b(cmd
,len
);
2142 AppendCrc14443a(cmd
,len
);
2145 if (lenbits
) lenbits
+= 16;
2147 if(lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
2148 if(param
& ISO14A_TOPAZMODE
) {
2149 int bits_to_send
= lenbits
;
2151 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
2153 while (bits_to_send
> 0) {
2154 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
2158 GetParity(cmd
, lenbits
/8, par
);
2159 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
2161 } else { // want to send complete bytes only
2162 if(param
& ISO14A_TOPAZMODE
) {
2164 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
2166 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
2169 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
2172 arg0
= ReaderReceive(buf
, par
);
2173 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2176 if (param
& ISO14A_REQUEST_TRIGGER
)
2177 iso14a_set_trigger(FALSE
);
2180 if (param
& ISO14A_NO_DISCONNECT
)
2183 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2189 // Determine the distance between two nonces.
2190 // Assume that the difference is small, but we don't know which is first.
2191 // Therefore try in alternating directions.
2192 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
2194 if (nt1
== nt2
) return 0;
2197 uint32_t nttmp1
= nt1
;
2198 uint32_t nttmp2
= nt2
;
2200 for (i
= 1; i
< 0xFFFF; i
+= 8) {
2201 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
;
2202 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
;
2204 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+1;
2205 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-1;
2207 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+2;
2208 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-2;
2210 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+3;
2211 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-3;
2213 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+4;
2214 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-4;
2216 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+5;
2217 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-5;
2219 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+6;
2220 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-6;
2222 nttmp1
= prng_successor_one(nttmp1
); if (nttmp1
== nt2
) return i
+7;
2223 nttmp2
= prng_successor_one(nttmp2
); if (nttmp2
== nt1
) return -i
-7;
2225 if ( prng_successor(nttmp1, i) == nt2) return i;
2226 if ( prng_successor(nttmp2, i) == nt1) return -i;
2228 if ( prng_successor(nttmp1, i+2) == nt2) return i+2;
2229 if ( prng_successor(nttmp2, i+2) == nt1) return -(i+2);
2231 if ( prng_successor(nttmp1, i+3) == nt2) return i+3;
2232 if ( prng_successor(nttmp2, i+3) == nt1) return -(i+3);
2234 if ( prng_successor(nttmp1, i+4) == nt2) return i+4;
2235 if ( prng_successor(nttmp2, i+4) == nt1) return -(i+4);
2237 if ( prng_successor(nttmp1, i+5) == nt2) return i+5;
2238 if ( prng_successor(nttmp2, i+5) == nt1) return -(i+5);
2240 if ( prng_successor(nttmp1, i+6) == nt2) return i+6;
2241 if ( prng_successor(nttmp2, i+6) == nt1) return -(i+6);
2243 if ( prng_successor(nttmp1, i+7) == nt2) return i+7;
2244 if ( prng_successor(nttmp2, i+7) == nt1) return -(i+7);
2248 return(-99999); // either nt1 or nt2 are invalid nonces
2252 //-----------------------------------------------------------------------------
2253 // Recover several bits of the cypher stream. This implements (first stages of)
2254 // the algorithm described in "The Dark Side of Security by Obscurity and
2255 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2256 // (article by Nicolas T. Courtois, 2009)
2257 //-----------------------------------------------------------------------------
2258 void ReaderMifare(bool first_try
, uint8_t block
)
2261 //uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2262 //uint8_t mf_auth[] = { 0x60,0x05, 0x58, 0x2c };
2263 uint8_t mf_auth
[] = { 0x60,0x00, 0x00, 0x00 };
2264 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2265 uint8_t uid
[10] = {0,0,0,0,0,0,0,0,0,0};
2266 uint8_t par_list
[8] = {0,0,0,0,0,0,0,0};
2267 uint8_t ks_list
[8] = {0,0,0,0,0,0,0,0};
2268 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2269 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2270 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2273 AppendCrc14443a(mf_auth
, 2);
2278 uint32_t previous_nt
= 0;
2279 uint32_t halt_time
= 0;
2282 int catch_up_cycles
= 0;
2283 int last_catch_up
= 0;
2286 uint16_t elapsed_prng_sequences
= 1;
2287 uint16_t consecutive_resyncs
= 0;
2288 uint16_t unexpected_random
= 0;
2289 uint16_t sync_tries
= 0;
2290 uint16_t strategy
= 0;
2292 static uint32_t nt_attacked
= 0;
2293 static uint32_t sync_time
= 0;
2294 static int32_t sync_cycles
= 0;
2295 static uint8_t par_low
= 0;
2296 static uint8_t mf_nr_ar3
= 0;
2298 #define PRNG_SEQUENCE_LENGTH (1 << 16)
2299 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2300 #define MAX_SYNC_TRIES 32
2301 #define MAX_STRATEGY 3
2303 // free eventually allocated BigBuf memory
2304 BigBuf_free(); BigBuf_Clear_ext(false);
2312 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2315 sync_time
= GetCountSspClk() & 0xfffffff8;
2316 sync_cycles
= PRNG_SEQUENCE_LENGTH
+ 1100; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2321 // we were unsuccessful on a previous call.
2322 // Try another READER nonce (first 3 parity bits remain the same)
2324 mf_nr_ar
[3] = mf_nr_ar3
;
2330 for(uint16_t i
= 0; TRUE
; ++i
) {
2334 // Test if the action was cancelled
2335 if(BUTTON_PRESS()) {
2340 if (strategy
== 2) {
2341 // test with additional halt command
2343 int len
= mifare_sendcmd_short(NULL
, false, 0x50, 0x00, receivedAnswer
, receivedAnswerPar
, &halt_time
);
2345 if (len
&& MF_DBGLEVEL
>= 3)
2346 Dbprintf("Unexpected response of %d bytes to halt command.", len
);
2349 if (strategy
== 3) {
2350 // test with FPGA power off/on
2351 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2353 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2355 sync_time
= GetCountSspClk() & 0xfffffff8;
2359 if (!iso14443a_select_card(uid
, NULL
, &cuid
, true, 0)) {
2360 if (MF_DBGLEVEL
>= 2) Dbprintf("Mifare: Can't select card\n");
2364 // Sending timeslot of ISO14443a frame
2366 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2367 catch_up_cycles
= 0;
2369 //catch_up_cycles = 0;
2371 // if we missed the sync time already, advance to the next nonce repeat
2372 while(GetCountSspClk() > sync_time
) {
2373 ++elapsed_prng_sequences
;
2374 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2376 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2377 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2379 // Receive the (4 Byte) "random" nonce
2380 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
))
2383 // Transmit reader nonce with fake par
2384 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2387 nt
= bytes_to_num(receivedAnswer
, 4);
2389 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2390 int nt_distance
= dist_nt(previous_nt
, nt
);
2391 if (nt_distance
== 0) {
2394 if (nt_distance
== -99999) { // invalid nonce received
2395 unexpected_random
++;
2396 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2397 isOK
= -3; // Card has an unpredictable PRNG. Give up
2400 continue; // continue trying...
2404 if (++sync_tries
> MAX_SYNC_TRIES
) {
2405 if (strategy
> MAX_STRATEGY
|| MF_DBGLEVEL
< 3) {
2406 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2413 sync_cycles
= (sync_cycles
- nt_distance
)/elapsed_prng_sequences
;
2414 if (sync_cycles
<= 0)
2415 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2417 if (MF_DBGLEVEL
>= 3)
2418 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2424 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2426 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2427 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2428 catch_up_cycles
= 0;
2433 catch_up_cycles
/= elapsed_prng_sequences
;
2435 if (catch_up_cycles
== last_catch_up
) {
2436 ++consecutive_resyncs
;
2438 last_catch_up
= catch_up_cycles
;
2439 consecutive_resyncs
= 0;
2442 if (consecutive_resyncs
< 3) {
2443 if (MF_DBGLEVEL
>= 3)
2444 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2446 sync_cycles
+= catch_up_cycles
;
2448 if (MF_DBGLEVEL
>= 3)
2449 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2452 catch_up_cycles
= 0;
2453 consecutive_resyncs
= 0;
2458 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2459 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2460 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2463 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2465 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2466 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2468 // Test if the information is complete
2469 if (nt_diff
== 0x07) {
2474 nt_diff
= (nt_diff
+ 1) & 0x07;
2475 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2480 if (nt_diff
== 0 && first_try
) {
2482 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2488 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2492 consecutive_resyncs
= 0;
2495 mf_nr_ar
[3] &= 0x1F;
2508 uint8_t buf
[28] = {0x00};
2509 num_to_bytes(cuid
, 4, buf
);
2510 num_to_bytes(nt
, 4, buf
+ 4);
2511 memcpy(buf
+ 8, par_list
, 8);
2512 memcpy(buf
+ 16, ks_list
, 8);
2513 memcpy(buf
+ 24, mf_nr_ar
, 4);
2515 cmd_send(CMD_ACK
,isOK
,0,0,buf
,28);
2517 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2523 *MIFARE 1K simulate.
2526 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2527 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2528 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2529 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2530 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2532 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2534 int cardSTATE
= MFEMUL_NOFIELD
;
2536 int vHf
= 0; // in mV
2538 uint32_t selTimer
= 0;
2539 uint32_t authTimer
= 0;
2541 uint8_t cardWRBL
= 0;
2542 uint8_t cardAUTHSC
= 0;
2543 uint8_t cardAUTHKEY
= 0xff; // no authentication
2544 // uint32_t cardRr = 0;
2546 //uint32_t rn_enc = 0;
2548 uint32_t cardINTREG
= 0;
2549 uint8_t cardINTBLOCK
= 0;
2550 struct Crypto1State mpcs
= {0, 0};
2551 struct Crypto1State
*pcs
;
2553 uint32_t numReads
= 0;//Counts numer of times reader read a block
2554 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2555 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2556 uint8_t response
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2557 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2559 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2560 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2561 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2562 uint8_t rSAK
[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2563 //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2564 uint8_t rSAK1
[] = {0x04, 0xda, 0x17};
2566 //uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2567 uint8_t rAUTH_NT
[] = {0x55, 0x41, 0x49, 0x92};
2568 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2570 //Here, we collect UID1,UID2,NT,AR,NR,0,0,NT2,AR2,NR2
2571 // This can be used in a reader-only attack.
2572 // (it can also be retrieved via 'hf 14a list', but hey...
2573 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0,0,0};
2574 uint8_t ar_nr_collected
= 0;
2576 // Authenticate response - nonce
2577 uint32_t nonce
= bytes_to_num(rAUTH_NT
, 4);
2579 //-- Determine the UID
2580 // Can be set from emulator memory, incoming data
2581 // and can be 7 or 4 bytes long
2582 if (flags
& FLAG_4B_UID_IN_DATA
)
2584 // 4B uid comes from data-portion of packet
2585 memcpy(rUIDBCC1
,datain
,4);
2586 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2588 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2589 // 7B uid comes from data-portion of packet
2590 memcpy(&rUIDBCC1
[1],datain
,3);
2591 memcpy(rUIDBCC2
, datain
+3, 4);
2594 // get UID from emul memory
2595 emlGetMemBt(receivedCmd
, 7, 1);
2596 _7BUID
= !(receivedCmd
[0] == 0x00);
2597 if (!_7BUID
) { // ---------- 4BUID
2598 emlGetMemBt(rUIDBCC1
, 0, 4);
2599 } else { // ---------- 7BUID
2600 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2601 emlGetMemBt(rUIDBCC2
, 3, 4);
2606 ar_nr_responses
[0*5] = bytes_to_num(rUIDBCC1
+1, 3);
2608 ar_nr_responses
[0*5+1] = bytes_to_num(rUIDBCC2
, 4);
2611 * Regardless of what method was used to set the UID, set fifth byte and modify
2612 * the ATQA for 4 or 7-byte UID
2614 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2618 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2619 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2622 if (MF_DBGLEVEL
>= 1) {
2624 Dbprintf("4B UID: %02x%02x%02x%02x",
2625 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3]);
2627 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2628 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3],
2629 rUIDBCC2
[0], rUIDBCC2
[1] ,rUIDBCC2
[2], rUIDBCC2
[3]);
2633 // We need to listen to the high-frequency, peak-detected path.
2634 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2636 // free eventually allocated BigBuf memory but keep Emulator Memory
2637 BigBuf_free_keep_EM();
2644 bool finished
= FALSE
;
2645 while (!BUTTON_PRESS() && !finished
&& !usb_poll_validate_length()) {
2648 // find reader field
2649 if (cardSTATE
== MFEMUL_NOFIELD
) {
2650 vHf
= (MAX_ADC_HF_VOLTAGE
* AvgAdc(ADC_CHAN_HF
)) >> 10;
2651 if (vHf
> MF_MINFIELDV
) {
2652 cardSTATE_TO_IDLE();
2656 if(cardSTATE
== MFEMUL_NOFIELD
) continue;
2659 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2660 if (res
== 2) { //Field is off!
2661 cardSTATE
= MFEMUL_NOFIELD
;
2664 } else if (res
== 1) {
2665 break; //return value 1 means button press
2668 // REQ or WUP request in ANY state and WUP in HALTED state
2669 if (len
== 1 && ((receivedCmd
[0] == 0x26 && cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == 0x52)) {
2670 selTimer
= GetTickCount();
2671 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == 0x52));
2672 cardSTATE
= MFEMUL_SELECT1
;
2674 // init crypto block
2677 crypto1_destroy(pcs
);
2682 switch (cardSTATE
) {
2683 case MFEMUL_NOFIELD
:
2686 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2689 case MFEMUL_SELECT1
:{
2691 if (len
== 2 && (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x20)) {
2692 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2693 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2697 if (MF_DBGLEVEL
>= 4 && len
== 9 && receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 )
2699 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2703 (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2704 EmSendCmd(_7BUID
?rSAK1
:rSAK
, _7BUID
?sizeof(rSAK1
):sizeof(rSAK
));
2705 cuid
= bytes_to_num(rUIDBCC1
, 4);
2707 cardSTATE
= MFEMUL_WORK
;
2709 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2712 cardSTATE
= MFEMUL_SELECT2
;
2719 cardSTATE_TO_IDLE();
2720 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2724 uint32_t ar
= bytes_to_num(receivedCmd
, 4);
2725 uint32_t nr
= bytes_to_num(&receivedCmd
[4], 4);
2728 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2729 if(ar_nr_collected
< 2) {
2730 if(ar_nr_responses
[2] != ar
) {
2731 // Avoid duplicates... probably not necessary, ar should vary.
2732 //ar_nr_responses[ar_nr_collected*5] = 0;
2733 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2734 ar_nr_responses
[ar_nr_collected
*5+2] = nonce
;
2735 ar_nr_responses
[ar_nr_collected
*5+3] = nr
;
2736 ar_nr_responses
[ar_nr_collected
*5+4] = ar
;
2739 // Interactive mode flag, means we need to send ACK
2740 if(flags
& FLAG_INTERACTIVE
&& ar_nr_collected
== 2)
2745 //crypto1_word(pcs, ar , 1);
2746 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2749 //if (cardRr != prng_successor(nonce, 64)){
2751 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2752 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2753 // cardRr, prng_successor(nonce, 64));
2754 // Shouldn't we respond anything here?
2755 // Right now, we don't nack or anything, which causes the
2756 // reader to do a WUPA after a while. /Martin
2757 // -- which is the correct response. /piwi
2758 //cardSTATE_TO_IDLE();
2759 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2763 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2765 num_to_bytes(ans
, 4, rAUTH_AT
);
2767 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2769 cardSTATE
= MFEMUL_WORK
;
2770 if (MF_DBGLEVEL
>= 4) {
2771 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2773 cardAUTHKEY
== 0 ? 'A' : 'B',
2774 GetTickCount() - authTimer
2779 case MFEMUL_SELECT2
:{
2781 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2784 if (len
== 2 && (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x20)) {
2785 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2791 (receivedCmd
[0] == 0x95 &&
2792 receivedCmd
[1] == 0x70 &&
2793 memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0) ) {
2794 EmSendCmd(rSAK
, sizeof(rSAK
));
2795 cuid
= bytes_to_num(rUIDBCC2
, 4);
2796 cardSTATE
= MFEMUL_WORK
;
2798 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2802 // i guess there is a command). go into the work state.
2804 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2807 cardSTATE
= MFEMUL_WORK
;
2809 //intentional fall-through to the next case-stmt
2814 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2818 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2822 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2824 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2825 authTimer
= GetTickCount();
2826 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2827 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2828 crypto1_destroy(pcs
);//Added by martin
2829 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2831 if (!encrypted_data
) { // first authentication
2832 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2834 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2835 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2836 } else { // nested authentication
2837 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2838 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2839 num_to_bytes(ans
, 4, rAUTH_AT
);
2842 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2843 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2844 cardSTATE
= MFEMUL_AUTH1
;
2848 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2849 // BUT... ACK --> NACK
2850 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2851 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2855 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2856 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2857 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2862 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2866 if(receivedCmd
[0] == 0x30 // read block
2867 || receivedCmd
[0] == 0xA0 // write block
2868 || receivedCmd
[0] == 0xC0 // inc
2869 || receivedCmd
[0] == 0xC1 // dec
2870 || receivedCmd
[0] == 0xC2 // restore
2871 || receivedCmd
[0] == 0xB0) { // transfer
2872 if (receivedCmd
[1] >= 16 * 4) {
2873 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2874 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2878 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2879 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2880 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2885 if (receivedCmd
[0] == 0x30) {
2886 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2888 emlGetMem(response
, receivedCmd
[1], 1);
2889 AppendCrc14443a(response
, 16);
2890 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2891 EmSendCmdPar(response
, 18, response_par
);
2893 if(exitAfterNReads
> 0 && numReads
>= exitAfterNReads
) {
2894 Dbprintf("%d reads done, exiting", numReads
);
2900 if (receivedCmd
[0] == 0xA0) {
2901 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2902 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2903 cardSTATE
= MFEMUL_WRITEBL2
;
2904 cardWRBL
= receivedCmd
[1];
2907 // increment, decrement, restore
2908 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2909 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2910 if (emlCheckValBl(receivedCmd
[1])) {
2911 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2912 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2915 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2916 if (receivedCmd
[0] == 0xC1)
2917 cardSTATE
= MFEMUL_INTREG_INC
;
2918 if (receivedCmd
[0] == 0xC0)
2919 cardSTATE
= MFEMUL_INTREG_DEC
;
2920 if (receivedCmd
[0] == 0xC2)
2921 cardSTATE
= MFEMUL_INTREG_REST
;
2922 cardWRBL
= receivedCmd
[1];
2926 if (receivedCmd
[0] == 0xB0) {
2927 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2928 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2929 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2931 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2935 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2938 cardSTATE
= MFEMUL_HALTED
;
2939 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2940 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2944 if (receivedCmd
[0] == 0xe0) {//RATS
2945 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2948 // command not allowed
2949 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2950 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2953 case MFEMUL_WRITEBL2
:{
2955 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2956 emlSetMem(receivedCmd
, cardWRBL
, 1);
2957 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2958 cardSTATE
= MFEMUL_WORK
;
2960 cardSTATE_TO_IDLE();
2961 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2966 case MFEMUL_INTREG_INC
:{
2967 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2968 memcpy(&ans
, receivedCmd
, 4);
2969 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2970 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2971 cardSTATE_TO_IDLE();
2974 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2975 cardINTREG
= cardINTREG
+ ans
;
2976 cardSTATE
= MFEMUL_WORK
;
2979 case MFEMUL_INTREG_DEC
:{
2980 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2981 memcpy(&ans
, receivedCmd
, 4);
2982 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2983 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2984 cardSTATE_TO_IDLE();
2987 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2988 cardINTREG
= cardINTREG
- ans
;
2989 cardSTATE
= MFEMUL_WORK
;
2992 case MFEMUL_INTREG_REST
:{
2993 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2994 memcpy(&ans
, receivedCmd
, 4);
2995 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2996 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2997 cardSTATE_TO_IDLE();
3000 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
3001 cardSTATE
= MFEMUL_WORK
;
3007 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
3010 // Interactive mode flag, means we need to send ACK
3011 if(flags
& FLAG_INTERACTIVE
) {
3012 //May just aswell send the collected ar_nr in the response aswell
3013 uint8_t len
= ar_nr_collected
*5*4;
3014 cmd_send(CMD_ACK
, CMD_SIMULATE_MIFARE_CARD
, len
, 0, &ar_nr_responses
, len
);
3017 if(flags
& FLAG_NR_AR_ATTACK
&& MF_DBGLEVEL
>= 1 ) {
3018 if(ar_nr_collected
> 1 ) {
3019 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
3020 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
3021 ar_nr_responses
[0], // UID1
3022 ar_nr_responses
[1], // UID2
3023 ar_nr_responses
[2], // NT
3024 ar_nr_responses
[3], // AR1
3025 ar_nr_responses
[4], // NR1
3026 ar_nr_responses
[8], // AR2
3027 ar_nr_responses
[9] // NR2
3029 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
3030 ar_nr_responses
[0], // UID1
3031 ar_nr_responses
[1], // UID2
3032 ar_nr_responses
[2], // NT1
3033 ar_nr_responses
[3], // AR1
3034 ar_nr_responses
[4], // NR1
3035 ar_nr_responses
[7], // NT2
3036 ar_nr_responses
[8], // AR2
3037 ar_nr_responses
[9] // NR2
3040 Dbprintf("Failed to obtain two AR/NR pairs!");
3041 if(ar_nr_collected
> 0 ) {
3042 Dbprintf("Only got these: UID=%06x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
3043 ar_nr_responses
[0], // UID1
3044 ar_nr_responses
[1], // UID2
3045 ar_nr_responses
[2], // NT
3046 ar_nr_responses
[3], // AR1
3047 ar_nr_responses
[4] // NR1
3052 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
3058 //-----------------------------------------------------------------------------
3061 //-----------------------------------------------------------------------------
3062 void RAMFUNC
SniffMifare(uint8_t param
) {
3064 // bit 0 - trigger from first card answer
3065 // bit 1 - trigger from first reader 7-bit request
3068 // free eventually allocated BigBuf memory
3069 BigBuf_free(); BigBuf_Clear_ext(false);
3071 // init trace buffer
3075 // The command (reader -> tag) that we're receiving.
3076 // The length of a received command will in most cases be no more than 18 bytes.
3077 // So 32 should be enough!
3078 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
3079 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
3081 // The response (tag -> reader) that we're receiving.
3082 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
3083 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
3085 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
3087 // allocate the DMA buffer, used to stream samples from the FPGA
3088 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
3089 uint8_t *data
= dmaBuf
;
3090 uint8_t previous_data
= 0;
3093 bool ReaderIsActive
= FALSE
;
3094 bool TagIsActive
= FALSE
;
3096 // Set up the demodulator for tag -> reader responses.
3097 DemodInit(receivedResponse
, receivedResponsePar
);
3099 // Set up the demodulator for the reader -> tag commands
3100 UartInit(receivedCmd
, receivedCmdPar
);
3102 // Setup for the DMA.
3103 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3110 // And now we loop, receiving samples.
3111 for(uint32_t sniffCounter
= 0; TRUE
; ) {
3113 if(BUTTON_PRESS()) {
3114 DbpString("cancelled by button");
3121 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
3122 // check if a transaction is completed (timeout after 2000ms).
3123 // if yes, stop the DMA transfer and send what we have so far to the client
3124 if (MfSniffSend(2000)) {
3125 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3129 ReaderIsActive
= FALSE
;
3130 TagIsActive
= FALSE
;
3131 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3135 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
3136 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
3138 if (readBufDataP
<= dmaBufDataP
) // we are processing the same block of data which is currently being transferred
3139 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
3141 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
3143 // test for length of buffer
3144 if(dataLen
> maxDataLen
) { // we are more behind than ever...
3145 maxDataLen
= dataLen
;
3146 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
3147 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
3151 if(dataLen
< 1) continue;
3153 // primary buffer was stopped ( <-- we lost data!
3154 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
3155 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
3156 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
3157 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
3159 // secondary buffer sets as primary, secondary buffer was stopped
3160 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
3161 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
3162 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
3167 if (sniffCounter
& 0x01) {
3169 // no need to try decoding tag data if the reader is sending
3171 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
3172 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
3175 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
3177 /* And ready to receive another command. */
3178 UartInit(receivedCmd
, receivedCmdPar
);
3180 /* And also reset the demod code */
3183 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
3186 // no need to try decoding tag data if the reader is sending
3187 if(!ReaderIsActive
) {
3188 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
3189 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
3192 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
3194 // And ready to receive another response.
3197 // And reset the Miller decoder including its (now outdated) input buffer
3198 UartInit(receivedCmd
, receivedCmdPar
);
3200 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
3204 previous_data
= *data
;
3208 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
)
3213 FpgaDisableSscDma();
3216 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);