1 //-----------------------------------------------------------------------------
2 // For reading TI tags, we need to place the FPGA in pass through mode
3 // and pass everything through to the ARM
4 //-----------------------------------------------------------------------------
7 pck0, ck_1356meg, ck_1356megb,
8 pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
10 ssp_frame, ssp_din, ssp_dout, ssp_clk,
14 input pck0, ck_1356meg, ck_1356megb;
15 output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
19 output ssp_frame, ssp_din, ssp_clk;
20 input cross_hi, cross_lo;
23 // No logic, straight through.
25 assign pwr_oe3 = 1'b0;
26 assign pwr_oe1 = 1'b1;
27 assign pwr_oe2 = 1'b1;
28 assign pwr_oe4 = 1'b1;
31 assign adc_clk = 1'b0;
32 assign ssp_din = cross_lo;
33 assign dbg = cross_lo;