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ADD: added the ioprox checksum test to IOdemodFSK
[proxmark3-svn] / armsrc / iclass.c
1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "../include/proxmark3.h"
40 #include "apps.h"
41 #include "util.h"
42 #include "string.h"
43 #include "common.h"
44 #include "cmd.h"
45 // Needed for CRC in emulation mode;
46 // same construction as in ISO 14443;
47 // different initial value (CRC_ICLASS)
48 #include "../common/iso14443crc.h"
49 #include "../common/iso15693tools.h"
50 //#include "iso15693tools.h"
51 #include "protocols.h"
52 #include "optimized_cipher.h"
53
54 static int timeout = 4096;
55
56
57 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
58
59 //-----------------------------------------------------------------------------
60 // The software UART that receives commands from the reader, and its state
61 // variables.
62 //-----------------------------------------------------------------------------
63 static struct {
64 enum {
65 STATE_UNSYNCD,
66 STATE_START_OF_COMMUNICATION,
67 STATE_RECEIVING
68 } state;
69 uint16_t shiftReg;
70 int bitCnt;
71 int byteCnt;
72 int byteCntMax;
73 int posCnt;
74 int nOutOfCnt;
75 int OutOfCnt;
76 int syncBit;
77 int samples;
78 int highCnt;
79 int swapper;
80 int counter;
81 int bitBuffer;
82 int dropPosition;
83 uint8_t *output;
84 } Uart;
85
86 static RAMFUNC int OutOfNDecoding(int bit)
87 {
88 //int error = 0;
89 int bitright;
90
91 if(!Uart.bitBuffer) {
92 Uart.bitBuffer = bit ^ 0xFF0;
93 return FALSE;
94 }
95 else {
96 Uart.bitBuffer <<= 4;
97 Uart.bitBuffer ^= bit;
98 }
99
100 /*if(Uart.swapper) {
101 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
102 Uart.byteCnt++;
103 Uart.swapper = 0;
104 if(Uart.byteCnt > 15) { return TRUE; }
105 }
106 else {
107 Uart.swapper = 1;
108 }*/
109
110 if(Uart.state != STATE_UNSYNCD) {
111 Uart.posCnt++;
112
113 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
114 bit = 0x00;
115 }
116 else {
117 bit = 0x01;
118 }
119 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
120 bitright = 0x00;
121 }
122 else {
123 bitright = 0x01;
124 }
125 if(bit != bitright) { bit = bitright; }
126
127
128 // So, now we only have to deal with *bit*, lets see...
129 if(Uart.posCnt == 1) {
130 // measurement first half bitperiod
131 if(!bit) {
132 // Drop in first half means that we are either seeing
133 // an SOF or an EOF.
134
135 if(Uart.nOutOfCnt == 1) {
136 // End of Communication
137 Uart.state = STATE_UNSYNCD;
138 Uart.highCnt = 0;
139 if(Uart.byteCnt == 0) {
140 // Its not straightforward to show single EOFs
141 // So just leave it and do not return TRUE
142 Uart.output[0] = 0xf0;
143 Uart.byteCnt++;
144 }
145 else {
146 return TRUE;
147 }
148 }
149 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
150 // When not part of SOF or EOF, it is an error
151 Uart.state = STATE_UNSYNCD;
152 Uart.highCnt = 0;
153 //error = 4;
154 }
155 }
156 }
157 else {
158 // measurement second half bitperiod
159 // Count the bitslot we are in... (ISO 15693)
160 Uart.nOutOfCnt++;
161
162 if(!bit) {
163 if(Uart.dropPosition) {
164 if(Uart.state == STATE_START_OF_COMMUNICATION) {
165 //error = 1;
166 }
167 else {
168 //error = 7;
169 }
170 // It is an error if we already have seen a drop in current frame
171 Uart.state = STATE_UNSYNCD;
172 Uart.highCnt = 0;
173 }
174 else {
175 Uart.dropPosition = Uart.nOutOfCnt;
176 }
177 }
178
179 Uart.posCnt = 0;
180
181
182 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
183 Uart.nOutOfCnt = 0;
184
185 if(Uart.state == STATE_START_OF_COMMUNICATION) {
186 if(Uart.dropPosition == 4) {
187 Uart.state = STATE_RECEIVING;
188 Uart.OutOfCnt = 256;
189 }
190 else if(Uart.dropPosition == 3) {
191 Uart.state = STATE_RECEIVING;
192 Uart.OutOfCnt = 4;
193 //Uart.output[Uart.byteCnt] = 0xdd;
194 //Uart.byteCnt++;
195 }
196 else {
197 Uart.state = STATE_UNSYNCD;
198 Uart.highCnt = 0;
199 }
200 Uart.dropPosition = 0;
201 }
202 else {
203 // RECEIVING DATA
204 // 1 out of 4
205 if(!Uart.dropPosition) {
206 Uart.state = STATE_UNSYNCD;
207 Uart.highCnt = 0;
208 //error = 9;
209 }
210 else {
211 Uart.shiftReg >>= 2;
212
213 // Swap bit order
214 Uart.dropPosition--;
215 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
216 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
217
218 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
219 Uart.bitCnt += 2;
220 Uart.dropPosition = 0;
221
222 if(Uart.bitCnt == 8) {
223 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
224 Uart.byteCnt++;
225 Uart.bitCnt = 0;
226 Uart.shiftReg = 0;
227 }
228 }
229 }
230 }
231 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
232 // RECEIVING DATA
233 // 1 out of 256
234 if(!Uart.dropPosition) {
235 Uart.state = STATE_UNSYNCD;
236 Uart.highCnt = 0;
237 //error = 3;
238 }
239 else {
240 Uart.dropPosition--;
241 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
242 Uart.byteCnt++;
243 Uart.bitCnt = 0;
244 Uart.shiftReg = 0;
245 Uart.nOutOfCnt = 0;
246 Uart.dropPosition = 0;
247 }
248 }
249
250 /*if(error) {
251 Uart.output[Uart.byteCnt] = 0xAA;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = error & 0xFF;
254 Uart.byteCnt++;
255 Uart.output[Uart.byteCnt] = 0xAA;
256 Uart.byteCnt++;
257 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
258 Uart.byteCnt++;
259 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
260 Uart.byteCnt++;
261 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
262 Uart.byteCnt++;
263 Uart.output[Uart.byteCnt] = 0xAA;
264 Uart.byteCnt++;
265 return TRUE;
266 }*/
267 }
268
269 }
270 else {
271 bit = Uart.bitBuffer & 0xf0;
272 bit >>= 4;
273 bit ^= 0x0F; // drops become 1s ;-)
274 if(bit) {
275 // should have been high or at least (4 * 128) / fc
276 // according to ISO this should be at least (9 * 128 + 20) / fc
277 if(Uart.highCnt == 8) {
278 // we went low, so this could be start of communication
279 // it turns out to be safer to choose a less significant
280 // syncbit... so we check whether the neighbour also represents the drop
281 Uart.posCnt = 1; // apparently we are busy with our first half bit period
282 Uart.syncBit = bit & 8;
283 Uart.samples = 3;
284 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
285 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
286 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
287 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
288 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
289 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
290 Uart.syncBit = 8;
291
292 // the first half bit period is expected in next sample
293 Uart.posCnt = 0;
294 Uart.samples = 3;
295 }
296 }
297 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
298
299 Uart.syncBit <<= 4;
300 Uart.state = STATE_START_OF_COMMUNICATION;
301 Uart.bitCnt = 0;
302 Uart.byteCnt = 0;
303 Uart.nOutOfCnt = 0;
304 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
305 Uart.dropPosition = 0;
306 Uart.shiftReg = 0;
307 //error = 0;
308 }
309 else {
310 Uart.highCnt = 0;
311 }
312 }
313 else {
314 if(Uart.highCnt < 8) {
315 Uart.highCnt++;
316 }
317 }
318 }
319
320 return FALSE;
321 }
322
323 //=============================================================================
324 // Manchester
325 //=============================================================================
326
327 static struct {
328 enum {
329 DEMOD_UNSYNCD,
330 DEMOD_START_OF_COMMUNICATION,
331 DEMOD_START_OF_COMMUNICATION2,
332 DEMOD_START_OF_COMMUNICATION3,
333 DEMOD_SOF_COMPLETE,
334 DEMOD_MANCHESTER_D,
335 DEMOD_MANCHESTER_E,
336 DEMOD_END_OF_COMMUNICATION,
337 DEMOD_END_OF_COMMUNICATION2,
338 DEMOD_MANCHESTER_F,
339 DEMOD_ERROR_WAIT
340 } state;
341 int bitCount;
342 int posCount;
343 int syncBit;
344 uint16_t shiftReg;
345 int buffer;
346 int buffer2;
347 int buffer3;
348 int buff;
349 int samples;
350 int len;
351 enum {
352 SUB_NONE,
353 SUB_FIRST_HALF,
354 SUB_SECOND_HALF,
355 SUB_BOTH
356 } sub;
357 uint8_t *output;
358 } Demod;
359
360 static RAMFUNC int ManchesterDecoding(int v)
361 {
362 int bit;
363 int modulation;
364 int error = 0;
365
366 bit = Demod.buffer;
367 Demod.buffer = Demod.buffer2;
368 Demod.buffer2 = Demod.buffer3;
369 Demod.buffer3 = v;
370
371 if(Demod.buff < 3) {
372 Demod.buff++;
373 return FALSE;
374 }
375
376 if(Demod.state==DEMOD_UNSYNCD) {
377 Demod.output[Demod.len] = 0xfa;
378 Demod.syncBit = 0;
379 //Demod.samples = 0;
380 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
381
382 if(bit & 0x08) {
383 Demod.syncBit = 0x08;
384 }
385
386 if(bit & 0x04) {
387 if(Demod.syncBit) {
388 bit <<= 4;
389 }
390 Demod.syncBit = 0x04;
391 }
392
393 if(bit & 0x02) {
394 if(Demod.syncBit) {
395 bit <<= 2;
396 }
397 Demod.syncBit = 0x02;
398 }
399
400 if(bit & 0x01 && Demod.syncBit) {
401 Demod.syncBit = 0x01;
402 }
403
404 if(Demod.syncBit) {
405 Demod.len = 0;
406 Demod.state = DEMOD_START_OF_COMMUNICATION;
407 Demod.sub = SUB_FIRST_HALF;
408 Demod.bitCount = 0;
409 Demod.shiftReg = 0;
410 Demod.samples = 0;
411 if(Demod.posCount) {
412 //if(trigger) LED_A_OFF(); // Not useful in this case...
413 switch(Demod.syncBit) {
414 case 0x08: Demod.samples = 3; break;
415 case 0x04: Demod.samples = 2; break;
416 case 0x02: Demod.samples = 1; break;
417 case 0x01: Demod.samples = 0; break;
418 }
419 // SOF must be long burst... otherwise stay unsynced!!!
420 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
421 Demod.state = DEMOD_UNSYNCD;
422 }
423 }
424 else {
425 // SOF must be long burst... otherwise stay unsynced!!!
426 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
427 Demod.state = DEMOD_UNSYNCD;
428 error = 0x88;
429 }
430
431 }
432 error = 0;
433
434 }
435 }
436 else {
437 modulation = bit & Demod.syncBit;
438 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
439
440 Demod.samples += 4;
441
442 if(Demod.posCount==0) {
443 Demod.posCount = 1;
444 if(modulation) {
445 Demod.sub = SUB_FIRST_HALF;
446 }
447 else {
448 Demod.sub = SUB_NONE;
449 }
450 }
451 else {
452 Demod.posCount = 0;
453 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
454 if(Demod.state!=DEMOD_ERROR_WAIT) {
455 Demod.state = DEMOD_ERROR_WAIT;
456 Demod.output[Demod.len] = 0xaa;
457 error = 0x01;
458 }
459 }*/
460 //else if(modulation) {
461 if(modulation) {
462 if(Demod.sub == SUB_FIRST_HALF) {
463 Demod.sub = SUB_BOTH;
464 }
465 else {
466 Demod.sub = SUB_SECOND_HALF;
467 }
468 }
469 else if(Demod.sub == SUB_NONE) {
470 if(Demod.state == DEMOD_SOF_COMPLETE) {
471 Demod.output[Demod.len] = 0x0f;
472 Demod.len++;
473 Demod.state = DEMOD_UNSYNCD;
474 // error = 0x0f;
475 return TRUE;
476 }
477 else {
478 Demod.state = DEMOD_ERROR_WAIT;
479 error = 0x33;
480 }
481 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
482 Demod.state = DEMOD_ERROR_WAIT;
483 Demod.output[Demod.len] = 0xaa;
484 error = 0x01;
485 }*/
486 }
487
488 switch(Demod.state) {
489 case DEMOD_START_OF_COMMUNICATION:
490 if(Demod.sub == SUB_BOTH) {
491 //Demod.state = DEMOD_MANCHESTER_D;
492 Demod.state = DEMOD_START_OF_COMMUNICATION2;
493 Demod.posCount = 1;
494 Demod.sub = SUB_NONE;
495 }
496 else {
497 Demod.output[Demod.len] = 0xab;
498 Demod.state = DEMOD_ERROR_WAIT;
499 error = 0xd2;
500 }
501 break;
502 case DEMOD_START_OF_COMMUNICATION2:
503 if(Demod.sub == SUB_SECOND_HALF) {
504 Demod.state = DEMOD_START_OF_COMMUNICATION3;
505 }
506 else {
507 Demod.output[Demod.len] = 0xab;
508 Demod.state = DEMOD_ERROR_WAIT;
509 error = 0xd3;
510 }
511 break;
512 case DEMOD_START_OF_COMMUNICATION3:
513 if(Demod.sub == SUB_SECOND_HALF) {
514 // Demod.state = DEMOD_MANCHESTER_D;
515 Demod.state = DEMOD_SOF_COMPLETE;
516 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
517 //Demod.len++;
518 }
519 else {
520 Demod.output[Demod.len] = 0xab;
521 Demod.state = DEMOD_ERROR_WAIT;
522 error = 0xd4;
523 }
524 break;
525 case DEMOD_SOF_COMPLETE:
526 case DEMOD_MANCHESTER_D:
527 case DEMOD_MANCHESTER_E:
528 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
529 // 00001111 = 1 (0 in 14443)
530 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
531 Demod.bitCount++;
532 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
533 Demod.state = DEMOD_MANCHESTER_D;
534 }
535 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
536 Demod.bitCount++;
537 Demod.shiftReg >>= 1;
538 Demod.state = DEMOD_MANCHESTER_E;
539 }
540 else if(Demod.sub == SUB_BOTH) {
541 Demod.state = DEMOD_MANCHESTER_F;
542 }
543 else {
544 Demod.state = DEMOD_ERROR_WAIT;
545 error = 0x55;
546 }
547 break;
548
549 case DEMOD_MANCHESTER_F:
550 // Tag response does not need to be a complete byte!
551 if(Demod.len > 0 || Demod.bitCount > 0) {
552 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
553 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
554 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
555 Demod.len++;
556 }
557
558 Demod.state = DEMOD_UNSYNCD;
559 return TRUE;
560 }
561 else {
562 Demod.output[Demod.len] = 0xad;
563 Demod.state = DEMOD_ERROR_WAIT;
564 error = 0x03;
565 }
566 break;
567
568 case DEMOD_ERROR_WAIT:
569 Demod.state = DEMOD_UNSYNCD;
570 break;
571
572 default:
573 Demod.output[Demod.len] = 0xdd;
574 Demod.state = DEMOD_UNSYNCD;
575 break;
576 }
577
578 /*if(Demod.bitCount>=9) {
579 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
580 Demod.len++;
581
582 Demod.parityBits <<= 1;
583 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
584
585 Demod.bitCount = 0;
586 Demod.shiftReg = 0;
587 }*/
588 if(Demod.bitCount>=8) {
589 Demod.shiftReg >>= 1;
590 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
591 Demod.len++;
592 Demod.bitCount = 0;
593 Demod.shiftReg = 0;
594 }
595
596 if(error) {
597 Demod.output[Demod.len] = 0xBB;
598 Demod.len++;
599 Demod.output[Demod.len] = error & 0xFF;
600 Demod.len++;
601 Demod.output[Demod.len] = 0xBB;
602 Demod.len++;
603 Demod.output[Demod.len] = bit & 0xFF;
604 Demod.len++;
605 Demod.output[Demod.len] = Demod.buffer & 0xFF;
606 Demod.len++;
607 // Look harder ;-)
608 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
609 Demod.len++;
610 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
611 Demod.len++;
612 Demod.output[Demod.len] = 0xBB;
613 Demod.len++;
614 return TRUE;
615 }
616
617 }
618
619 } // end (state != UNSYNCED)
620
621 return FALSE;
622 }
623
624 //=============================================================================
625 // Finally, a `sniffer' for iClass communication
626 // Both sides of communication!
627 //=============================================================================
628
629 //-----------------------------------------------------------------------------
630 // Record the sequence of commands sent by the reader to the tag, with
631 // triggering so that we start recording at the point that the tag is moved
632 // near the reader.
633 //-----------------------------------------------------------------------------
634 void RAMFUNC SnoopIClass(void)
635 {
636
637
638 // We won't start recording the frames that we acquire until we trigger;
639 // a good trigger condition to get started is probably when we see a
640 // response from the tag.
641 //int triggered = FALSE; // FALSE to wait first for card
642
643 // The command (reader -> tag) that we're receiving.
644 // The length of a received command will in most cases be no more than 18 bytes.
645 // So 32 should be enough!
646 #define ICLASS_BUFFER_SIZE 32
647 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
648 // The response (tag -> reader) that we're receiving.
649 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
650
651 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
652
653 // free all BigBuf memory
654 BigBuf_free();
655 // The DMA buffer, used to stream samples from the FPGA
656 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
657
658 set_tracing(TRUE);
659 clear_trace();
660 iso14a_set_trigger(FALSE);
661
662 int lastRxCounter;
663 uint8_t *upTo;
664 int smpl;
665 int maxBehindBy = 0;
666
667 // Count of samples received so far, so that we can include timing
668 // information in the trace buffer.
669 int samples = 0;
670 rsamples = 0;
671
672 // Set up the demodulator for tag -> reader responses.
673 Demod.output = tagToReaderResponse;
674 Demod.len = 0;
675 Demod.state = DEMOD_UNSYNCD;
676
677 // Setup for the DMA.
678 FpgaSetupSsc();
679 upTo = dmaBuf;
680 lastRxCounter = DMA_BUFFER_SIZE;
681 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
682
683 // And the reader -> tag commands
684 memset(&Uart, 0, sizeof(Uart));
685 Uart.output = readerToTagCmd;
686 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
687 Uart.state = STATE_UNSYNCD;
688
689 // And put the FPGA in the appropriate mode
690 // Signal field is off with the appropriate LED
691 LED_D_OFF();
692 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
693 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
694
695 uint32_t time_0 = GetCountSspClk();
696 uint32_t time_start = 0;
697 uint32_t time_stop = 0;
698
699 int div = 0;
700 //int div2 = 0;
701 int decbyte = 0;
702 int decbyter = 0;
703
704 // And now we loop, receiving samples.
705 for(;;) {
706 LED_A_ON();
707 WDT_HIT();
708 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
709 (DMA_BUFFER_SIZE-1);
710 if(behindBy > maxBehindBy) {
711 maxBehindBy = behindBy;
712 if(behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
713 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
714 goto done;
715 }
716 }
717 if(behindBy < 1) continue;
718
719 LED_A_OFF();
720 smpl = upTo[0];
721 upTo++;
722 lastRxCounter -= 1;
723 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
724 upTo -= DMA_BUFFER_SIZE;
725 lastRxCounter += DMA_BUFFER_SIZE;
726 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
727 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
728 }
729
730 //samples += 4;
731 samples += 1;
732
733 if(smpl & 0xF) {
734 decbyte ^= (1 << (3 - div));
735 }
736
737 // FOR READER SIDE COMMUMICATION...
738
739 decbyter <<= 2;
740 decbyter ^= (smpl & 0x30);
741
742 div++;
743
744 if((div + 1) % 2 == 0) {
745 smpl = decbyter;
746 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
747 rsamples = samples - Uart.samples;
748 time_stop = (GetCountSspClk()-time_0) << 4;
749 LED_C_ON();
750
751 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
752 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
753 if(tracing) {
754 uint8_t parity[MAX_PARITY_SIZE];
755 GetParity(Uart.output, Uart.byteCnt, parity);
756 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, TRUE);
757 }
758
759
760 /* And ready to receive another command. */
761 Uart.state = STATE_UNSYNCD;
762 /* And also reset the demod code, which might have been */
763 /* false-triggered by the commands from the reader. */
764 Demod.state = DEMOD_UNSYNCD;
765 LED_B_OFF();
766 Uart.byteCnt = 0;
767 }else{
768 time_start = (GetCountSspClk()-time_0) << 4;
769 }
770 decbyter = 0;
771 }
772
773 if(div > 3) {
774 smpl = decbyte;
775 if(ManchesterDecoding(smpl & 0x0F)) {
776 time_stop = (GetCountSspClk()-time_0) << 4;
777
778 rsamples = samples - Demod.samples;
779 LED_B_ON();
780
781 if(tracing) {
782 uint8_t parity[MAX_PARITY_SIZE];
783 GetParity(Demod.output, Demod.len, parity);
784 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, FALSE);
785 }
786
787 // And ready to receive another response.
788 memset(&Demod, 0, sizeof(Demod));
789 Demod.output = tagToReaderResponse;
790 Demod.state = DEMOD_UNSYNCD;
791 LED_C_OFF();
792 }else{
793 time_start = (GetCountSspClk()-time_0) << 4;
794 }
795
796 div = 0;
797 decbyte = 0x00;
798 }
799 //}
800
801 if(BUTTON_PRESS()) {
802 DbpString("cancelled_a");
803 goto done;
804 }
805 }
806
807 DbpString("COMMAND FINISHED");
808
809 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
810 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
811
812 done:
813 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
814 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
815 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
816 LED_A_OFF();
817 LED_B_OFF();
818 LED_C_OFF();
819 LED_D_OFF();
820 }
821
822 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
823 int i;
824 for(i = 0; i < 8; i++) {
825 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
826 }
827 }
828
829 //-----------------------------------------------------------------------------
830 // Wait for commands from reader
831 // Stop when button is pressed
832 // Or return TRUE when command is captured
833 //-----------------------------------------------------------------------------
834 static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
835 {
836 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
837 // only, since we are receiving, not transmitting).
838 // Signal field is off with the appropriate LED
839 LED_D_OFF();
840 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
841
842 // Now run a `software UART' on the stream of incoming samples.
843 Uart.output = received;
844 Uart.byteCntMax = maxLen;
845 Uart.state = STATE_UNSYNCD;
846
847 for(;;) {
848 WDT_HIT();
849
850 if(BUTTON_PRESS()) return FALSE;
851
852 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
853 AT91C_BASE_SSC->SSC_THR = 0x00;
854 }
855 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
856 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
857
858 if(OutOfNDecoding(b & 0x0f)) {
859 *len = Uart.byteCnt;
860 return TRUE;
861 }
862 }
863 }
864 }
865
866 static uint8_t encode4Bits(const uint8_t b)
867 {
868 uint8_t c = b & 0xF;
869 // OTA, the least significant bits first
870 // The columns are
871 // 1 - Bit value to send
872 // 2 - Reversed (big-endian)
873 // 3 - Encoded
874 // 4 - Hex values
875
876 switch(c){
877 // 1 2 3 4
878 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
879 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
880 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
881 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
882 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
883 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
884 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
885 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
886 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
887 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
888 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
889 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
890 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
891 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
892 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
893 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
894
895 }
896 }
897
898 //-----------------------------------------------------------------------------
899 // Prepare tag messages
900 //-----------------------------------------------------------------------------
901 static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
902 {
903
904 /*
905 * SOF comprises 3 parts;
906 * * An unmodulated time of 56.64 us
907 * * 24 pulses of 423.75 KHz (fc/32)
908 * * A logic 1, which starts with an unmodulated time of 18.88us
909 * followed by 8 pulses of 423.75kHz (fc/32)
910 *
911 *
912 * EOF comprises 3 parts:
913 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
914 * time of 18.88us.
915 * - 24 pulses of fc/32
916 * - An unmodulated time of 56.64 us
917 *
918 *
919 * A logic 0 starts with 8 pulses of fc/32
920 * followed by an unmodulated time of 256/fc (~18,88us).
921 *
922 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
923 * 8 pulses of fc/32 (also 18.88us)
924 *
925 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
926 * works like this.
927 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
928 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
929 *
930 * In this mode the SOF can be written as 00011101 = 0x1D
931 * The EOF can be written as 10111000 = 0xb8
932 * A logic 1 is 01
933 * A logic 0 is 10
934 *
935 * */
936
937 int i;
938
939 ToSendReset();
940
941 // Send SOF
942 ToSend[++ToSendMax] = 0x1D;
943
944 for(i = 0; i < len; i++) {
945 uint8_t b = cmd[i];
946 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
947 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
948 }
949
950 // Send EOF
951 ToSend[++ToSendMax] = 0xB8;
952 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
953 // Convert from last byte pos to length
954 ToSendMax++;
955 }
956
957 // Only SOF
958 static void CodeIClassTagSOF()
959 {
960 //So far a dummy implementation, not used
961 //int lastProxToAirDuration =0;
962
963 ToSendReset();
964 // Send SOF
965 ToSend[++ToSendMax] = 0x1D;
966 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
967
968 // Convert from last byte pos to length
969 ToSendMax++;
970 }
971 #define MODE_SIM_CSN 0
972 #define MODE_EXIT_AFTER_MAC 1
973 #define MODE_FULLSIM 2
974
975 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
976 /**
977 * @brief SimulateIClass simulates an iClass card.
978 * @param arg0 type of simulation
979 * - 0 uses the first 8 bytes in usb data as CSN
980 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
981 * in the usb data. This mode collects MAC from the reader, in order to do an offline
982 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
983 * - Other : Uses the default CSN (031fec8af7ff12e0)
984 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
985 * @param arg2
986 * @param datain
987 */
988 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
989 {
990 uint32_t simType = arg0;
991 uint32_t numberOfCSNS = arg1;
992 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
993
994 // Enable and clear the trace
995 set_tracing(TRUE);
996 clear_trace();
997 //Use the emulator memory for SIM
998 uint8_t *emulator = BigBuf_get_EM_addr();
999
1000 if(simType == 0) {
1001 // Use the CSN from commandline
1002 memcpy(emulator, datain, 8);
1003 doIClassSimulation(MODE_SIM_CSN,NULL);
1004 }else if(simType == 1)
1005 {
1006 //Default CSN
1007 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1008 // Use the CSN from commandline
1009 memcpy(emulator, csn_crc, 8);
1010 doIClassSimulation(MODE_SIM_CSN,NULL);
1011 }
1012 else if(simType == 2)
1013 {
1014
1015 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1016 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1017 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1018 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1019 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1020 int i = 0;
1021 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
1022 {
1023 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1024
1025 memcpy(emulator, datain+(i*8), 8);
1026 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
1027 {
1028 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1029 return; // Button pressed
1030 }
1031 }
1032 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1033
1034 }else if(simType == 3){
1035 //This is 'full sim' mode, where we use the emulator storage for data.
1036 doIClassSimulation(MODE_FULLSIM, NULL);
1037 }
1038 else{
1039 // We may want a mode here where we hardcode the csns to use (from proxclone).
1040 // That will speed things up a little, but not required just yet.
1041 Dbprintf("The mode is not implemented, reserved for future use");
1042 }
1043 Dbprintf("Done...");
1044
1045 }
1046 void AppendCrc(uint8_t* data, int len)
1047 {
1048 ComputeCrc14443(CRC_ICLASS,data,len,data+len,data+len+1);
1049 }
1050
1051 /**
1052 * @brief Does the actual simulation
1053 * @param csn - csn to use
1054 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1055 */
1056 int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
1057 {
1058 // free eventually allocated BigBuf memory
1059 BigBuf_free_keep_EM();
1060
1061 State cipher_state;
1062 // State cipher_state_reserve;
1063 uint8_t *csn = BigBuf_get_EM_addr();
1064 uint8_t *emulator = csn;
1065 uint8_t sof_data[] = { 0x0F} ;
1066 // CSN followed by two CRC bytes
1067 uint8_t anticoll_data[10] = { 0 };
1068 uint8_t csn_data[10] = { 0 };
1069 memcpy(csn_data,csn,sizeof(csn_data));
1070 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1071
1072 // Construct anticollision-CSN
1073 rotateCSN(csn_data,anticoll_data);
1074
1075 // Compute CRC on both CSNs
1076 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1077 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1078
1079 uint8_t diversified_key[8] = { 0 };
1080 // e-Purse
1081 uint8_t card_challenge_data[8] = { 0x00 };
1082 if(simulationMode == MODE_FULLSIM)
1083 {
1084 //The diversified key should be stored on block 3
1085 //Get the diversified key from emulator memory
1086 memcpy(diversified_key, emulator+(8*3),8);
1087
1088 //Card challenge, a.k.a e-purse is on block 2
1089 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
1090 //Precalculate the cipher state, feeding it the CC
1091 cipher_state = opt_doTagMAC_1(card_challenge_data,diversified_key);
1092
1093 }
1094
1095 int exitLoop = 0;
1096 // Reader 0a
1097 // Tag 0f
1098 // Reader 0c
1099 // Tag anticoll. CSN
1100 // Reader 81 anticoll. CSN
1101 // Tag CSN
1102
1103 uint8_t *modulated_response;
1104 int modulated_response_size = 0;
1105 uint8_t* trace_data = NULL;
1106 int trace_data_size = 0;
1107
1108
1109 // Respond SOF -- takes 1 bytes
1110 uint8_t *resp_sof = BigBuf_malloc(2);
1111 int resp_sof_Len;
1112
1113 // Anticollision CSN (rotated CSN)
1114 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1115 uint8_t *resp_anticoll = BigBuf_malloc(28);
1116 int resp_anticoll_len;
1117
1118 // CSN
1119 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1120 uint8_t *resp_csn = BigBuf_malloc(30);
1121 int resp_csn_len;
1122
1123 // e-Purse
1124 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
1125 uint8_t *resp_cc = BigBuf_malloc(20);
1126 int resp_cc_len;
1127
1128 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1129 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
1130 int len;
1131
1132 // Prepare card messages
1133 ToSendMax = 0;
1134
1135 // First card answer: SOF
1136 CodeIClassTagSOF();
1137 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1138
1139 // Anticollision CSN
1140 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1141 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1142
1143 // CSN
1144 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1145 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1146
1147 // e-Purse
1148 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1149 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1150
1151 //This is used for responding to READ-block commands or other data which is dynamically generated
1152 //First the 'trace'-data, not encoded for FPGA
1153 uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
1154 //Then storage for the modulated data
1155 //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
1156 uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2);
1157
1158 // Start from off (no field generated)
1159 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1160 //SpinDelay(200);
1161 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1162 SpinDelay(100);
1163 StartCountSspClk();
1164 // We need to listen to the high-frequency, peak-detected path.
1165 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1166 FpgaSetupSsc();
1167
1168 // To control where we are in the protocol
1169 int cmdsRecvd = 0;
1170 uint32_t time_0 = GetCountSspClk();
1171 uint32_t t2r_time =0;
1172 uint32_t r2t_time =0;
1173
1174 LED_A_ON();
1175 bool buttonPressed = false;
1176 uint8_t response_delay = 1;
1177 while(!exitLoop) {
1178 response_delay = 1;
1179 LED_B_OFF();
1180 //Signal tracer
1181 // Can be used to get a trigger for an oscilloscope..
1182 LED_C_OFF();
1183
1184 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
1185 buttonPressed = true;
1186 break;
1187 }
1188 r2t_time = GetCountSspClk();
1189 //Signal tracer
1190 LED_C_ON();
1191
1192 // Okay, look at the command now.
1193 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1194 // Reader in anticollission phase
1195 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1196 trace_data = sof_data;
1197 trace_data_size = sizeof(sof_data);
1198 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1199 // Reader asks for anticollission CSN
1200 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1201 trace_data = anticoll_data;
1202 trace_data_size = sizeof(anticoll_data);
1203 //DbpString("Reader requests anticollission CSN:");
1204 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1205 // Reader selects anticollission CSN.
1206 // Tag sends the corresponding real CSN
1207 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1208 trace_data = csn_data;
1209 trace_data_size = sizeof(csn_data);
1210 //DbpString("Reader selects anticollission CSN:");
1211 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1212 // Read e-purse (88 02)
1213 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1214 trace_data = card_challenge_data;
1215 trace_data_size = sizeof(card_challenge_data);
1216 LED_B_ON();
1217 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1218 // Reader random and reader MAC!!!
1219 if(simulationMode == MODE_FULLSIM)
1220 {
1221 //NR, from reader, is in receivedCmd +1
1222 opt_doTagMAC_2(cipher_state,receivedCmd+1,data_generic_trace,diversified_key);
1223
1224 trace_data = data_generic_trace;
1225 trace_data_size = 4;
1226 CodeIClassTagAnswer(trace_data , trace_data_size);
1227 memcpy(data_response, ToSend, ToSendMax);
1228 modulated_response = data_response;
1229 modulated_response_size = ToSendMax;
1230 response_delay = 0;//We need to hurry here...
1231 //exitLoop = true;
1232 }else
1233 { //Not fullsim, we don't respond
1234 // We do not know what to answer, so lets keep quiet
1235 modulated_response = resp_sof; modulated_response_size = 0;
1236 trace_data = NULL;
1237 trace_data_size = 0;
1238 if (simulationMode == MODE_EXIT_AFTER_MAC){
1239 // dbprintf:ing ...
1240 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1241 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1242 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1243 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1244 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1245 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1246 if (reader_mac_buf != NULL)
1247 {
1248 memcpy(reader_mac_buf,receivedCmd+1,8);
1249 }
1250 exitLoop = true;
1251 }
1252 }
1253
1254 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1255 // Reader ends the session
1256 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
1257 trace_data = NULL;
1258 trace_data_size = 0;
1259 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1260 //Read block
1261 uint16_t blk = receivedCmd[1];
1262 //Take the data...
1263 memcpy(data_generic_trace, emulator+(blk << 3),8);
1264 //Add crc
1265 AppendCrc(data_generic_trace, 8);
1266 trace_data = data_generic_trace;
1267 trace_data_size = 10;
1268 CodeIClassTagAnswer(trace_data , trace_data_size);
1269 memcpy(data_response, ToSend, ToSendMax);
1270 modulated_response = data_response;
1271 modulated_response_size = ToSendMax;
1272 }else if(receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM)
1273 {//Probably the reader wants to update the nonce. Let's just ignore that for now.
1274 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1275 //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
1276 //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
1277
1278 //Take the data...
1279 memcpy(data_generic_trace, receivedCmd+2,8);
1280 //Add crc
1281 AppendCrc(data_generic_trace, 8);
1282 trace_data = data_generic_trace;
1283 trace_data_size = 10;
1284 CodeIClassTagAnswer(trace_data , trace_data_size);
1285 memcpy(data_response, ToSend, ToSendMax);
1286 modulated_response = data_response;
1287 modulated_response_size = ToSendMax;
1288 }
1289 else if(receivedCmd[0] == ICLASS_CMD_PAGESEL)
1290 {//Pagesel
1291 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1292 //Chips with a single page will not answer to this command
1293 // It appears we're fine ignoring this.
1294 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1295 }
1296 else {
1297 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1298 // Never seen this command before
1299 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1300 len,
1301 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1302 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1303 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1304 // Do not respond
1305 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
1306 trace_data = NULL;
1307 trace_data_size = 0;
1308 }
1309
1310 if(cmdsRecvd > 100) {
1311 //DbpString("100 commands later...");
1312 //break;
1313 }
1314 else {
1315 cmdsRecvd++;
1316 }
1317 /**
1318 A legit tag has about 380us delay between reader EOT and tag SOF.
1319 **/
1320 if(modulated_response_size > 0) {
1321 SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
1322 t2r_time = GetCountSspClk();
1323 }
1324
1325 if (tracing) {
1326 uint8_t parity[MAX_PARITY_SIZE];
1327 GetParity(receivedCmd, len, parity);
1328 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, TRUE);
1329
1330 if (trace_data != NULL) {
1331 GetParity(trace_data, trace_data_size, parity);
1332 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, FALSE);
1333 }
1334 if(!tracing) {
1335 DbpString("Trace full");
1336 //break;
1337 }
1338
1339 }
1340 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
1341 }
1342
1343 //Dbprintf("%x", cmdsRecvd);
1344 LED_A_OFF();
1345 LED_B_OFF();
1346 LED_C_OFF();
1347
1348 if(buttonPressed)
1349 {
1350 DbpString("Button pressed");
1351 }
1352 return buttonPressed;
1353 }
1354
1355 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1356 {
1357 int i = 0, d=0;//, u = 0, d = 0;
1358 uint8_t b = 0;
1359
1360 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1361 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
1362
1363 AT91C_BASE_SSC->SSC_THR = 0x00;
1364 FpgaSetupSsc();
1365 while(!BUTTON_PRESS()) {
1366 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1367 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1368 }
1369 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1370 b = 0x00;
1371 if(d < delay) {
1372 d++;
1373 }
1374 else {
1375 if( i < respLen){
1376 b = resp[i];
1377 //Hack
1378 //b = 0xAC;
1379 }
1380 i++;
1381 }
1382 AT91C_BASE_SSC->SSC_THR = b;
1383 }
1384
1385 // if (i > respLen +4) break;
1386 if (i > respLen +1) break;
1387 }
1388
1389 return 0;
1390 }
1391
1392 /// THE READER CODE
1393
1394 //-----------------------------------------------------------------------------
1395 // Transmit the command (to the tag) that was placed in ToSend[].
1396 //-----------------------------------------------------------------------------
1397 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1398 {
1399 int c;
1400 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1401 AT91C_BASE_SSC->SSC_THR = 0x00;
1402 FpgaSetupSsc();
1403
1404 if (wait)
1405 {
1406 if(*wait < 10) *wait = 10;
1407
1408 for(c = 0; c < *wait;) {
1409 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1410 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1411 c++;
1412 }
1413 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1414 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1415 (void)r;
1416 }
1417 WDT_HIT();
1418 }
1419
1420 }
1421
1422
1423 uint8_t sendbyte;
1424 bool firstpart = TRUE;
1425 c = 0;
1426 for(;;) {
1427 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1428
1429 // DOUBLE THE SAMPLES!
1430 if(firstpart) {
1431 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1432 }
1433 else {
1434 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1435 c++;
1436 }
1437 if(sendbyte == 0xff) {
1438 sendbyte = 0xfe;
1439 }
1440 AT91C_BASE_SSC->SSC_THR = sendbyte;
1441 firstpart = !firstpart;
1442
1443 if(c >= len) {
1444 break;
1445 }
1446 }
1447 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1448 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1449 (void)r;
1450 }
1451 WDT_HIT();
1452 }
1453 if (samples) *samples = (c + *wait) << 3;
1454 }
1455
1456
1457 //-----------------------------------------------------------------------------
1458 // Prepare iClass reader command to send to FPGA
1459 //-----------------------------------------------------------------------------
1460 void CodeIClassCommand(const uint8_t * cmd, int len)
1461 {
1462 int i, j, k;
1463 uint8_t b;
1464
1465 ToSendReset();
1466
1467 // Start of Communication: 1 out of 4
1468 ToSend[++ToSendMax] = 0xf0;
1469 ToSend[++ToSendMax] = 0x00;
1470 ToSend[++ToSendMax] = 0x0f;
1471 ToSend[++ToSendMax] = 0x00;
1472
1473 // Modulate the bytes
1474 for (i = 0; i < len; i++) {
1475 b = cmd[i];
1476 for(j = 0; j < 4; j++) {
1477 for(k = 0; k < 4; k++) {
1478 if(k == (b & 3)) {
1479 ToSend[++ToSendMax] = 0x0f;
1480 }
1481 else {
1482 ToSend[++ToSendMax] = 0x00;
1483 }
1484 }
1485 b >>= 2;
1486 }
1487 }
1488
1489 // End of Communication
1490 ToSend[++ToSendMax] = 0x00;
1491 ToSend[++ToSendMax] = 0x00;
1492 ToSend[++ToSendMax] = 0xf0;
1493 ToSend[++ToSendMax] = 0x00;
1494
1495 // Convert from last character reference to length
1496 ToSendMax++;
1497 }
1498
1499 void ReaderTransmitIClass(uint8_t* frame, int len)
1500 {
1501 int wait = 0;
1502 int samples = 0;
1503
1504 // This is tied to other size changes
1505 CodeIClassCommand(frame,len);
1506
1507 // Select the card
1508 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1509 if(trigger)
1510 LED_A_ON();
1511
1512 // Store reader command in buffer
1513 if (tracing) {
1514 uint8_t par[MAX_PARITY_SIZE];
1515 GetParity(frame, len, par);
1516 LogTrace(frame, len, rsamples, rsamples, par, TRUE);
1517 }
1518 }
1519
1520 //-----------------------------------------------------------------------------
1521 // Wait a certain time for tag response
1522 // If a response is captured return TRUE
1523 // If it takes too long return FALSE
1524 //-----------------------------------------------------------------------------
1525 static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1526 {
1527 // buffer needs to be 512 bytes
1528 int c;
1529
1530 // Set FPGA mode to "reader listen mode", no modulation (listen
1531 // only, since we are receiving, not transmitting).
1532 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1533
1534 // Now get the answer from the card
1535 Demod.output = receivedResponse;
1536 Demod.len = 0;
1537 Demod.state = DEMOD_UNSYNCD;
1538
1539 uint8_t b;
1540 if (elapsed) *elapsed = 0;
1541
1542 bool skip = FALSE;
1543
1544 c = 0;
1545 for(;;) {
1546 WDT_HIT();
1547
1548 if(BUTTON_PRESS()) return FALSE;
1549
1550 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1551 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1552 if (elapsed) (*elapsed)++;
1553 }
1554 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1555 if(c < timeout) { c++; } else { return FALSE; }
1556 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1557 skip = !skip;
1558 if(skip) continue;
1559
1560 if(ManchesterDecoding(b & 0x0f)) {
1561 *samples = c << 3;
1562 return TRUE;
1563 }
1564 }
1565 }
1566 }
1567
1568 int ReaderReceiveIClass(uint8_t* receivedAnswer)
1569 {
1570 int samples = 0;
1571 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
1572 rsamples += samples;
1573 if (tracing) {
1574 uint8_t parity[MAX_PARITY_SIZE];
1575 GetParity(receivedAnswer, Demod.len, parity);
1576 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,FALSE);
1577 }
1578 if(samples == 0) return FALSE;
1579 return Demod.len;
1580 }
1581
1582 void setupIclassReader()
1583 {
1584 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1585 // Reset trace buffer
1586 set_tracing(TRUE);
1587 clear_trace();
1588
1589 // Setup SSC
1590 FpgaSetupSsc();
1591 // Start from off (no field generated)
1592 // Signal field is off with the appropriate LED
1593 LED_D_OFF();
1594 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1595 SpinDelay(200);
1596
1597 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1598
1599 // Now give it time to spin up.
1600 // Signal field is on with the appropriate LED
1601 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1602 SpinDelay(200);
1603 LED_A_ON();
1604
1605 }
1606
1607 size_t sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1608 {
1609 while(retries-- > 0)
1610 {
1611 ReaderTransmitIClass(command, cmdsize);
1612 if(expected_size == ReaderReceiveIClass(resp)){
1613 return 0;
1614 }
1615 }
1616 return 1;//Error
1617 }
1618
1619 /**
1620 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1621 * @param card_data where the CSN and CC are stored for return
1622 * @return 0 = fail
1623 * 1 = Got CSN
1624 * 2 = Got CSN and CC
1625 */
1626 uint8_t handshakeIclassTag(uint8_t *card_data)
1627 {
1628 static uint8_t act_all[] = { 0x0a };
1629 static uint8_t identify[] = { 0x0c };
1630 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1631 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
1632 uint8_t resp[ICLASS_BUFFER_SIZE];
1633
1634 uint8_t read_status = 0;
1635
1636 // Send act_all
1637 ReaderTransmitIClass(act_all, 1);
1638 // Card present?
1639 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1640 //Send Identify
1641 ReaderTransmitIClass(identify, 1);
1642 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1643 uint8_t len = ReaderReceiveIClass(resp);
1644 if(len != 10) return read_status;//Fail
1645
1646 //Copy the Anti-collision CSN to our select-packet
1647 memcpy(&select[1],resp,8);
1648 //Select the card
1649 ReaderTransmitIClass(select, sizeof(select));
1650 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1651 len = ReaderReceiveIClass(resp);
1652 if(len != 10) return read_status;//Fail
1653
1654 //Success - level 1, we got CSN
1655 //Save CSN in response data
1656 memcpy(card_data,resp,8);
1657
1658 //Flag that we got to at least stage 1, read CSN
1659 read_status = 1;
1660
1661 // Card selected, now read e-purse (cc)
1662 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1663 if(ReaderReceiveIClass(resp) == 8) {
1664 //Save CC (e-purse) in response data
1665 memcpy(card_data+8,resp,8);
1666
1667 //Got both
1668 read_status = 2;
1669 }
1670
1671 return read_status;
1672 }
1673
1674 // Reader iClass Anticollission
1675 void ReaderIClass(uint8_t arg0) {
1676
1677 uint8_t card_data[24]={0};
1678 uint8_t last_csn[8]={0};
1679
1680 int read_status= 0;
1681 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1682 bool get_cc = arg0 & FLAG_ICLASS_READER_GET_CC;
1683 set_tracing(TRUE);
1684 setupIclassReader();
1685
1686 size_t datasize = 0;
1687 while(!BUTTON_PRESS())
1688 {
1689
1690 if(!tracing) {
1691 DbpString("Trace full");
1692 break;
1693 }
1694 WDT_HIT();
1695
1696 read_status = handshakeIclassTag(card_data);
1697
1698 if(read_status == 0) continue;
1699 if(read_status == 1) datasize = 8;
1700 if(read_status == 2) datasize = 16;
1701
1702 //Todo, read the public blocks 1,5 aswell:
1703 //
1704 // 0 : CSN (we already have)
1705 // 1 : Configuration
1706 // 2 : e-purse (we already have)
1707 // (3,4 write-only)
1708 // 5 Application issuer area
1709 //
1710 //Then we can 'ship' back the 8 * 5 bytes of data,
1711 // with 0xFF:s in block 3 and 4.
1712
1713 LED_B_ON();
1714 //Send back to client, but don't bother if we already sent this
1715 if(memcmp(last_csn, card_data, 8) != 0)
1716 {
1717
1718 if(!get_cc || (get_cc && read_status == 2))
1719 {
1720 cmd_send(CMD_ACK,read_status,0,0,card_data,datasize);
1721 if(abort_after_read) {
1722 LED_A_OFF();
1723 return;
1724 }
1725 //Save that we already sent this....
1726 memcpy(last_csn, card_data, 8);
1727 }
1728 //If 'get_cc' was specified and we didn't get a CC, we'll just keep trying...
1729 }
1730 LED_B_OFF();
1731 }
1732 cmd_send(CMD_ACK,0,0,0,card_data, 0);
1733 LED_A_OFF();
1734 }
1735
1736 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1737
1738 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1739 uint16_t block_crc_LUT[255] = {0};
1740
1741 {//Generate a lookup table for block crc
1742 for(int block = 0; block < 255; block++){
1743 char bl = block;
1744 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1745 }
1746 }
1747 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1748
1749 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1750 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1751
1752 uint16_t crc = 0;
1753 uint8_t cardsize=0;
1754 uint8_t mem=0;
1755
1756 static struct memory_t{
1757 int k16;
1758 int book;
1759 int k2;
1760 int lockauth;
1761 int keyaccess;
1762 } memory;
1763
1764 uint8_t resp[ICLASS_BUFFER_SIZE];
1765
1766 setupIclassReader();
1767 set_tracing(TRUE);
1768
1769 while(!BUTTON_PRESS()) {
1770
1771 WDT_HIT();
1772
1773 if(!tracing) {
1774 DbpString("Trace full");
1775 break;
1776 }
1777
1778 uint8_t read_status = handshakeIclassTag(card_data);
1779 if(read_status < 2) continue;
1780
1781 //for now replay captured auth (as cc not updated)
1782 memcpy(check+5,MAC,4);
1783
1784 if(sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1785 {
1786 Dbprintf("Error: Authentication Fail!");
1787 continue;
1788 }
1789
1790 //first get configuration block (block 1)
1791 crc = block_crc_LUT[1];
1792 read[1]=1;
1793 read[2] = crc >> 8;
1794 read[3] = crc & 0xff;
1795
1796 if(sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1797 {
1798 Dbprintf("Dump config (block 1) failed");
1799 continue;
1800 }
1801
1802 mem=resp[5];
1803 memory.k16= (mem & 0x80);
1804 memory.book= (mem & 0x20);
1805 memory.k2= (mem & 0x8);
1806 memory.lockauth= (mem & 0x2);
1807 memory.keyaccess= (mem & 0x1);
1808
1809 cardsize = memory.k16 ? 255 : 32;
1810 WDT_HIT();
1811 //Set card_data to all zeroes, we'll fill it with data
1812 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1813 uint8_t failedRead =0;
1814 uint32_t stored_data_length =0;
1815 //then loop around remaining blocks
1816 for(int block=0; block < cardsize; block++){
1817
1818 read[1]= block;
1819 crc = block_crc_LUT[block];
1820 read[2] = crc >> 8;
1821 read[3] = crc & 0xff;
1822
1823 if(!sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1824 {
1825 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1826 block, resp[0], resp[1], resp[2],
1827 resp[3], resp[4], resp[5],
1828 resp[6], resp[7]);
1829
1830 //Fill up the buffer
1831 memcpy(card_data+stored_data_length,resp,8);
1832 stored_data_length += 8;
1833 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1834 {//Time to send this off and start afresh
1835 cmd_send(CMD_ACK,
1836 stored_data_length,//data length
1837 failedRead,//Failed blocks?
1838 0,//Not used ATM
1839 card_data, stored_data_length);
1840 //reset
1841 stored_data_length = 0;
1842 failedRead = 0;
1843 }
1844
1845 }else{
1846 failedRead = 1;
1847 stored_data_length +=8;//Otherwise, data becomes misaligned
1848 Dbprintf("Failed to dump block %d", block);
1849 }
1850 }
1851
1852 //Send off any remaining data
1853 if(stored_data_length > 0)
1854 {
1855 cmd_send(CMD_ACK,
1856 stored_data_length,//data length
1857 failedRead,//Failed blocks?
1858 0,//Not used ATM
1859 card_data, stored_data_length);
1860 }
1861 //If we got here, let's break
1862 break;
1863 }
1864 //Signal end of transmission
1865 cmd_send(CMD_ACK,
1866 0,//data length
1867 0,//Failed blocks?
1868 0,//Not used ATM
1869 card_data, 0);
1870
1871 LED_A_OFF();
1872 }
1873
1874 //2. Create Read method (cut-down from above) based off responses from 1.
1875 // Since we have the MAC could continue to use replay function.
1876 //3. Create Write method
1877 /*
1878 void IClass_iso14443A_write(uint8_t arg0, uint8_t blockNo, uint8_t *data, uint8_t *MAC) {
1879 uint8_t act_all[] = { 0x0a };
1880 uint8_t identify[] = { 0x0c };
1881 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1882 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1883 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1884 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1885 uint8_t write[] = { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1886
1887 uint16_t crc = 0;
1888
1889 uint8_t* resp = (((uint8_t *)BigBuf) + 3560);
1890
1891 // Reset trace buffer
1892 memset(trace, 0x44, RECV_CMD_OFFSET);
1893 traceLen = 0;
1894
1895 // Setup SSC
1896 FpgaSetupSsc();
1897 // Start from off (no field generated)
1898 // Signal field is off with the appropriate LED
1899 LED_D_OFF();
1900 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1901 SpinDelay(200);
1902
1903 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1904
1905 // Now give it time to spin up.
1906 // Signal field is on with the appropriate LED
1907 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1908 SpinDelay(200);
1909
1910 LED_A_ON();
1911
1912 for(int i=0;i<1;i++) {
1913
1914 if(traceLen > TRACE_SIZE) {
1915 DbpString("Trace full");
1916 break;
1917 }
1918
1919 if (BUTTON_PRESS()) break;
1920
1921 // Send act_all
1922 ReaderTransmitIClass(act_all, 1);
1923 // Card present?
1924 if(ReaderReceiveIClass(resp)) {
1925 ReaderTransmitIClass(identify, 1);
1926 if(ReaderReceiveIClass(resp) == 10) {
1927 // Select card
1928 memcpy(&select[1],resp,8);
1929 ReaderTransmitIClass(select, sizeof(select));
1930
1931 if(ReaderReceiveIClass(resp) == 10) {
1932 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1933 resp[0], resp[1], resp[2],
1934 resp[3], resp[4], resp[5],
1935 resp[6], resp[7]);
1936 }
1937 // Card selected
1938 Dbprintf("Readcheck on Sector 2");
1939 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1940 if(ReaderReceiveIClass(resp) == 8) {
1941 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1942 resp[0], resp[1], resp[2],
1943 resp[3], resp[4], resp[5],
1944 resp[6], resp[7]);
1945 }else return;
1946 Dbprintf("Authenticate");
1947 //for now replay captured auth (as cc not updated)
1948 memcpy(check+5,MAC,4);
1949 Dbprintf(" AA: %02x %02x %02x %02x",
1950 check[5], check[6], check[7],check[8]);
1951 ReaderTransmitIClass(check, sizeof(check));
1952 if(ReaderReceiveIClass(resp) == 4) {
1953 Dbprintf(" AR: %02x %02x %02x %02x",
1954 resp[0], resp[1], resp[2],resp[3]);
1955 }else {
1956 Dbprintf("Error: Authentication Fail!");
1957 return;
1958 }
1959 Dbprintf("Write Block");
1960
1961 //read configuration for max block number
1962 read_success=false;
1963 read[1]=1;
1964 uint8_t *blockno=&read[1];
1965 crc = iclass_crc16((char *)blockno,1);
1966 read[2] = crc >> 8;
1967 read[3] = crc & 0xff;
1968 while(!read_success){
1969 ReaderTransmitIClass(read, sizeof(read));
1970 if(ReaderReceiveIClass(resp) == 10) {
1971 read_success=true;
1972 mem=resp[5];
1973 memory.k16= (mem & 0x80);
1974 memory.book= (mem & 0x20);
1975 memory.k2= (mem & 0x8);
1976 memory.lockauth= (mem & 0x2);
1977 memory.keyaccess= (mem & 0x1);
1978
1979 }
1980 }
1981 if (memory.k16){
1982 cardsize=255;
1983 }else cardsize=32;
1984 //check card_size
1985
1986 memcpy(write+1,blockNo,1);
1987 memcpy(write+2,data,8);
1988 memcpy(write+10,mac,4);
1989 while(!send_success){
1990 ReaderTransmitIClass(write, sizeof(write));
1991 if(ReaderReceiveIClass(resp) == 10) {
1992 write_success=true;
1993 }
1994 }//
1995 }
1996 WDT_HIT();
1997 }
1998
1999 LED_A_OFF();
2000 }*/
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