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[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "../include/proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "../common/cmd.h"
18 #include "../common/iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22
23 static uint32_t iso14a_timeout;
24 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
25 int rsamples = 0;
26 int traceLen = 0;
27 int tracing = TRUE;
28 uint8_t trigger = 0;
29 // the block number for the ISO14443-4 PCB
30 static uint8_t iso14_pcb_blocknum = 0;
31
32 //
33 // ISO14443 timing:
34 //
35 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36 #define REQUEST_GUARD_TIME (7000/16 + 1)
37 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39 // bool LastCommandWasRequest = FALSE;
40
41 //
42 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
43 //
44 // When the PM acts as reader and is receiving tag data, it takes
45 // 3 ticks delay in the AD converter
46 // 16 ticks until the modulation detector completes and sets curbit
47 // 8 ticks until bit_to_arm is assigned from curbit
48 // 8*16 ticks for the transfer from FPGA to ARM
49 // 4*16 ticks until we measure the time
50 // - 8*16 ticks because we measure the time of the previous transfer
51 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
52
53 // When the PM acts as a reader and is sending, it takes
54 // 4*16 ticks until we can write data to the sending hold register
55 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
56 // 8 ticks until the first transfer starts
57 // 8 ticks later the FPGA samples the data
58 // 1 tick to assign mod_sig_coil
59 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
60
61 // When the PM acts as tag and is receiving it takes
62 // 2 ticks delay in the RF part (for the first falling edge),
63 // 3 ticks for the A/D conversion,
64 // 8 ticks on average until the start of the SSC transfer,
65 // 8 ticks until the SSC samples the first data
66 // 7*16 ticks to complete the transfer from FPGA to ARM
67 // 8 ticks until the next ssp_clk rising edge
68 // 4*16 ticks until we measure the time
69 // - 8*16 ticks because we measure the time of the previous transfer
70 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
71
72 // The FPGA will report its internal sending delay in
73 uint16_t FpgaSendQueueDelay;
74 // the 5 first bits are the number of bits buffered in mod_sig_buf
75 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
77
78 // When the PM acts as tag and is sending, it takes
79 // 4*16 ticks until we can write data to the sending hold register
80 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
81 // 8 ticks until the first transfer starts
82 // 8 ticks later the FPGA samples the data
83 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84 // + 1 tick to assign mod_sig_coil
85 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
86
87 // When the PM acts as sniffer and is receiving tag data, it takes
88 // 3 ticks A/D conversion
89 // 14 ticks to complete the modulation detection
90 // 8 ticks (on average) until the result is stored in to_arm
91 // + the delays in transferring data - which is the same for
92 // sniffing reader and tag data and therefore not relevant
93 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
94
95 // When the PM acts as sniffer and is receiving reader data, it takes
96 // 2 ticks delay in analogue RF receiver (for the falling edge of the
97 // start bit, which marks the start of the communication)
98 // 3 ticks A/D conversion
99 // 8 ticks on average until the data is stored in to_arm.
100 // + the delays in transferring data - which is the same for
101 // sniffing reader and tag data and therefore not relevant
102 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
103
104 //variables used for timing purposes:
105 //these are in ssp_clk cycles:
106 static uint32_t NextTransferTime;
107 static uint32_t LastTimeProxToAirStart;
108 static uint32_t LastProxToAirDuration;
109
110
111
112 // CARD TO READER - manchester
113 // Sequence D: 11110000 modulation with subcarrier during first half
114 // Sequence E: 00001111 modulation with subcarrier during second half
115 // Sequence F: 00000000 no modulation with subcarrier
116 // READER TO CARD - miller
117 // Sequence X: 00001100 drop after half a period
118 // Sequence Y: 00000000 no drop
119 // Sequence Z: 11000000 drop at start
120 #define SEC_D 0xf0
121 #define SEC_E 0x0f
122 #define SEC_F 0x00
123 #define SEC_X 0x0c
124 #define SEC_Y 0x00
125 #define SEC_Z 0xc0
126
127 const uint8_t OddByteParity[256] = {
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
141 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
144 };
145
146 void iso14a_set_trigger(bool enable) {
147 trigger = enable;
148 }
149
150 void iso14a_clear_trace() {
151 memset(trace, 0x44, TRACE_SIZE);
152 traceLen = 0;
153 }
154
155 void iso14a_set_tracing(bool enable) {
156 tracing = enable;
157 }
158
159 void iso14a_set_timeout(uint32_t timeout) {
160 iso14a_timeout = timeout;
161 }
162
163 //-----------------------------------------------------------------------------
164 // Generate the parity value for a byte sequence
165 //
166 //-----------------------------------------------------------------------------
167 byte_t oddparity (const byte_t bt)
168 {
169 return OddByteParity[bt];
170 }
171
172 void GetParity(const uint8_t * pbtCmd, uint16_t iLen, uint8_t *par)
173 {
174 uint16_t paritybit_cnt = 0;
175 uint16_t paritybyte_cnt = 0;
176 uint8_t parityBits = 0;
177
178 for (uint16_t i = 0; i < iLen; i++) {
179 // Generate the parity bits
180 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
181 if (paritybit_cnt == 7) {
182 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
183 parityBits = 0; // and advance to next Parity Byte
184 paritybyte_cnt++;
185 paritybit_cnt = 0;
186 } else {
187 paritybit_cnt++;
188 }
189 }
190
191 // save remaining parity bits
192 par[paritybyte_cnt] = parityBits;
193
194 }
195
196 void AppendCrc14443a(uint8_t* data, int len)
197 {
198 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
199 }
200
201 // The function LogTrace() is also used by the iClass implementation in iClass.c
202 bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag)
203 {
204 if (!tracing) return FALSE;
205
206 uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity
207 uint16_t duration = timestamp_end - timestamp_start;
208
209 // Return when trace is full
210 if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) {
211 tracing = FALSE; // don't trace any more
212 return FALSE;
213 }
214
215 // Traceformat:
216 // 32 bits timestamp (little endian)
217 // 16 bits duration (little endian)
218 // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
219 // y Bytes data
220 // x Bytes parity (one byte per 8 bytes data)
221
222 // timestamp (start)
223 trace[traceLen++] = ((timestamp_start >> 0) & 0xff);
224 trace[traceLen++] = ((timestamp_start >> 8) & 0xff);
225 trace[traceLen++] = ((timestamp_start >> 16) & 0xff);
226 trace[traceLen++] = ((timestamp_start >> 24) & 0xff);
227
228 // duration
229 trace[traceLen++] = ((duration >> 0) & 0xff);
230 trace[traceLen++] = ((duration >> 8) & 0xff);
231
232 // data length
233 trace[traceLen++] = ((iLen >> 0) & 0xff);
234 trace[traceLen++] = ((iLen >> 8) & 0xff);
235
236 // readerToTag flag
237 if (!readerToTag) {
238 trace[traceLen - 1] |= 0x80;
239 }
240
241 // data bytes
242 if (btBytes != NULL && iLen != 0) {
243 memcpy(trace + traceLen, btBytes, iLen);
244 }
245 traceLen += iLen;
246
247 // parity bytes
248 if (parity != NULL && iLen != 0) {
249 memcpy(trace + traceLen, parity, num_paritybytes);
250 }
251 traceLen += num_paritybytes;
252
253 return TRUE;
254 }
255
256 //=============================================================================
257 // ISO 14443 Type A - Miller decoder
258 //=============================================================================
259 // Basics:
260 // This decoder is used when the PM3 acts as a tag.
261 // The reader will generate "pauses" by temporarily switching of the field.
262 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
263 // The FPGA does a comparison with a threshold and would deliver e.g.:
264 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
265 // The Miller decoder needs to identify the following sequences:
266 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
267 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
268 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
269 // Note 1: the bitstream may start at any time. We therefore need to sync.
270 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
271 //-----------------------------------------------------------------------------
272 static tUart Uart;
273
274 // Lookup-Table to decide if 4 raw bits are a modulation.
275 // We accept two or three consecutive "0" in any position with the rest "1"
276 const bool Mod_Miller_LUT[] = {
277 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
278 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
279 };
280 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
281 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
282
283 void UartReset()
284 {
285 Uart.state = STATE_UNSYNCD;
286 Uart.bitCount = 0;
287 Uart.len = 0; // number of decoded data bytes
288 Uart.parityLen = 0; // number of decoded parity bytes
289 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
290 Uart.parityBits = 0; // holds 8 parity bits
291 Uart.twoBits = 0x0000; // buffer for 2 Bits
292 Uart.highCnt = 0;
293 Uart.startTime = 0;
294 Uart.endTime = 0;
295 }
296
297 void UartInit(uint8_t *data, uint8_t *parity)
298 {
299 Uart.output = data;
300 Uart.parity = parity;
301 UartReset();
302 }
303
304 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
305 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
306 {
307
308 Uart.twoBits = (Uart.twoBits << 8) | bit;
309
310 if (Uart.state == STATE_UNSYNCD) { // not yet synced
311
312 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
313 if (Uart.twoBits == 0xffff) {
314 Uart.highCnt++;
315 } else {
316 Uart.highCnt = 0;
317 }
318 } else {
319 Uart.syncBit = 0xFFFF; // not set
320 // look for 00xx1111 (the start bit)
321 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
322 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
323 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
324 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
325 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
326 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
327 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
328 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
329 if (Uart.syncBit != 0xFFFF) {
330 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
331 Uart.startTime -= Uart.syncBit;
332 Uart.endTime = Uart.startTime;
333 Uart.state = STATE_START_OF_COMMUNICATION;
334 }
335 }
336
337 } else {
338
339 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
340 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
341 UartReset();
342 Uart.highCnt = 6;
343 } else { // Modulation in first half = Sequence Z = logic "0"
344 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
345 UartReset();
346 Uart.highCnt = 6;
347 } else {
348 Uart.bitCount++;
349 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
350 Uart.state = STATE_MILLER_Z;
351 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
352 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
353 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
354 Uart.parityBits <<= 1; // make room for the parity bit
355 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
356 Uart.bitCount = 0;
357 Uart.shiftReg = 0;
358 if((Uart.len & 0x0007) == 0) { // every 8 data bytes
359 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
360 Uart.parityBits = 0;
361 }
362 }
363 }
364 }
365 } else {
366 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
367 Uart.bitCount++;
368 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
369 Uart.state = STATE_MILLER_X;
370 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
371 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
372 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
373 Uart.parityBits <<= 1; // make room for the new parity bit
374 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
375 Uart.bitCount = 0;
376 Uart.shiftReg = 0;
377 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
378 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
379 Uart.parityBits = 0;
380 }
381 }
382 } else { // no modulation in both halves - Sequence Y
383 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
384 Uart.state = STATE_UNSYNCD;
385 Uart.bitCount--; // last "0" was part of EOC sequence
386 Uart.shiftReg <<= 1; // drop it
387 if(Uart.bitCount > 0) { // if we decoded some bits
388 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
389 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
390 Uart.parityBits <<= 1; // add a (void) parity bit
391 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align parity bits
392 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
393 return TRUE;
394 } else if (Uart.len & 0x0007) { // there are some parity bits to store
395 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align remaining parity bits
396 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
397 }
398 if ( Uart.len) {
399 return TRUE; // we are finished with decoding the raw data sequence
400 } else {
401 UartReset(); // Nothing receiver - start over
402 }
403 }
404 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
405 UartReset();
406 Uart.highCnt = 6;
407 } else { // a logic "0"
408 Uart.bitCount++;
409 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
410 Uart.state = STATE_MILLER_Y;
411 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
412 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
413 Uart.parityBits <<= 1; // make room for the parity bit
414 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
415 Uart.bitCount = 0;
416 Uart.shiftReg = 0;
417 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
418 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
419 Uart.parityBits = 0;
420 }
421 }
422 }
423 }
424 }
425
426 }
427
428 return FALSE; // not finished yet, need more data
429 }
430
431
432
433 //=============================================================================
434 // ISO 14443 Type A - Manchester decoder
435 //=============================================================================
436 // Basics:
437 // This decoder is used when the PM3 acts as a reader.
438 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
439 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
440 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
441 // The Manchester decoder needs to identify the following sequences:
442 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
443 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
444 // 8 ticks unmodulated: Sequence F = end of communication
445 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
446 // Note 1: the bitstream may start at any time. We therefore need to sync.
447 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
448 static tDemod Demod;
449
450 // Lookup-Table to decide if 4 raw bits are a modulation.
451 // We accept three or four "1" in any position
452 const bool Mod_Manchester_LUT[] = {
453 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
454 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
455 };
456
457 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
458 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
459
460
461 void DemodReset()
462 {
463 Demod.state = DEMOD_UNSYNCD;
464 Demod.len = 0; // number of decoded data bytes
465 Demod.parityLen = 0;
466 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
467 Demod.parityBits = 0; //
468 Demod.collisionPos = 0; // Position of collision bit
469 Demod.twoBits = 0xffff; // buffer for 2 Bits
470 Demod.highCnt = 0;
471 Demod.startTime = 0;
472 Demod.endTime = 0;
473 }
474
475 void DemodInit(uint8_t *data, uint8_t *parity)
476 {
477 Demod.output = data;
478 Demod.parity = parity;
479 DemodReset();
480 }
481
482 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
483 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
484 {
485
486 Demod.twoBits = (Demod.twoBits << 8) | bit;
487
488 if (Demod.state == DEMOD_UNSYNCD) {
489
490 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
491 if (Demod.twoBits == 0x0000) {
492 Demod.highCnt++;
493 } else {
494 Demod.highCnt = 0;
495 }
496 } else {
497 Demod.syncBit = 0xFFFF; // not set
498 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
499 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
500 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
501 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
502 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
503 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
504 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
505 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
506 if (Demod.syncBit != 0xFFFF) {
507 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
508 Demod.startTime -= Demod.syncBit;
509 Demod.bitCount = offset; // number of decoded data bits
510 Demod.state = DEMOD_MANCHESTER_DATA;
511 }
512 }
513
514 } else {
515
516 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
517 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
518 if (!Demod.collisionPos) {
519 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
520 }
521 } // modulation in first half only - Sequence D = 1
522 Demod.bitCount++;
523 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
524 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
525 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
526 Demod.parityBits <<= 1; // make room for the parity bit
527 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
528 Demod.bitCount = 0;
529 Demod.shiftReg = 0;
530 if((Demod.len & 0x0007) == 0) { // every 8 data bytes
531 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
532 Demod.parityBits = 0;
533 }
534 }
535 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
536 } else { // no modulation in first half
537 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
538 Demod.bitCount++;
539 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
540 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
541 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
542 Demod.parityBits <<= 1; // make room for the new parity bit
543 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
544 Demod.bitCount = 0;
545 Demod.shiftReg = 0;
546 if ((Demod.len & 0x0007) == 0) { // every 8 data bytes
547 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
548 Demod.parityBits = 0;
549 }
550 }
551 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
552 } else { // no modulation in both halves - End of communication
553 if(Demod.bitCount > 0) { // there are some remaining data bits
554 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
555 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
556 Demod.parityBits <<= 1; // add a (void) parity bit
557 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
558 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
559 return TRUE;
560 } else if (Demod.len & 0x0007) { // there are some parity bits to store
561 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
562 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
563 }
564 if (Demod.len) {
565 return TRUE; // we are finished with decoding the raw data sequence
566 } else { // nothing received. Start over
567 DemodReset();
568 }
569 }
570 }
571
572 }
573
574 return FALSE; // not finished yet, need more data
575 }
576
577 //=============================================================================
578 // Finally, a `sniffer' for ISO 14443 Type A
579 // Both sides of communication!
580 //=============================================================================
581
582 //-----------------------------------------------------------------------------
583 // Record the sequence of commands sent by the reader to the tag, with
584 // triggering so that we start recording at the point that the tag is moved
585 // near the reader.
586 //-----------------------------------------------------------------------------
587 void RAMFUNC SnoopIso14443a(uint8_t param) {
588 // param:
589 // bit 0 - trigger from first card answer
590 // bit 1 - trigger from first reader 7-bit request
591
592 LEDsoff();
593 // init trace buffer
594 iso14a_clear_trace();
595 iso14a_set_tracing(TRUE);
596
597 // We won't start recording the frames that we acquire until we trigger;
598 // a good trigger condition to get started is probably when we see a
599 // response from the tag.
600 // triggered == FALSE -- to wait first for card
601 bool triggered = !(param & 0x03);
602
603 // The command (reader -> tag) that we're receiving.
604 // The length of a received command will in most cases be no more than 18 bytes.
605 // So 32 should be enough!
606 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
607 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
608
609 // The response (tag -> reader) that we're receiving.
610 uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
611 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
612
613 // As we receive stuff, we copy it from receivedCmd or receivedResponse
614 // into trace, along with its length and other annotations.
615 //uint8_t *trace = (uint8_t *)BigBuf;
616
617 // The DMA buffer, used to stream samples from the FPGA
618 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
619 uint8_t *data = dmaBuf;
620 uint8_t previous_data = 0;
621 int maxDataLen = 0;
622 int dataLen = 0;
623 bool TagIsActive = FALSE;
624 bool ReaderIsActive = FALSE;
625
626 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
627
628 // Set up the demodulator for tag -> reader responses.
629 DemodInit(receivedResponse, receivedResponsePar);
630
631 // Set up the demodulator for the reader -> tag commands
632 UartInit(receivedCmd, receivedCmdPar);
633
634 // Setup and start DMA.
635 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
636
637 // And now we loop, receiving samples.
638 for(uint32_t rsamples = 0; TRUE; ) {
639
640 if(BUTTON_PRESS()) {
641 DbpString("cancelled by button");
642 break;
643 }
644
645 LED_A_ON();
646 WDT_HIT();
647
648 int register readBufDataP = data - dmaBuf;
649 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
650 if (readBufDataP <= dmaBufDataP){
651 dataLen = dmaBufDataP - readBufDataP;
652 } else {
653 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
654 }
655 // test for length of buffer
656 if(dataLen > maxDataLen) {
657 maxDataLen = dataLen;
658 if(dataLen > 400) {
659 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
660 break;
661 }
662 }
663 if(dataLen < 1) continue;
664
665 // primary buffer was stopped( <-- we lost data!
666 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
667 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
668 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
669 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
670 }
671 // secondary buffer sets as primary, secondary buffer was stopped
672 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
673 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
674 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
675 }
676
677 LED_A_OFF();
678
679 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
680
681 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
682 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
683 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
684 LED_C_ON();
685
686 // check - if there is a short 7bit request from reader
687 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
688
689 if(triggered) {
690 if (!LogTrace(receivedCmd,
691 Uart.len,
692 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
693 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
694 Uart.parity,
695 TRUE)) break;
696 }
697 /* And ready to receive another command. */
698 UartReset();
699 /* And also reset the demod code, which might have been */
700 /* false-triggered by the commands from the reader. */
701 DemodReset();
702 LED_B_OFF();
703 }
704 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
705 }
706
707 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
708 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
709 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
710 LED_B_ON();
711
712 if (!LogTrace(receivedResponse,
713 Demod.len,
714 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
715 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
716 Demod.parity,
717 FALSE)) break;
718
719 if ((!triggered) && (param & 0x01)) triggered = TRUE;
720
721 // And ready to receive another response.
722 DemodReset();
723 LED_C_OFF();
724 }
725 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
726 }
727 }
728
729 previous_data = *data;
730 rsamples++;
731 data++;
732 if(data == dmaBuf + DMA_BUFFER_SIZE) {
733 data = dmaBuf;
734 }
735 } // main cycle
736
737 DbpString("COMMAND FINISHED");
738
739 FpgaDisableSscDma();
740 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
741 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
742 LEDsoff();
743 }
744
745 //-----------------------------------------------------------------------------
746 // Prepare tag messages
747 //-----------------------------------------------------------------------------
748 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
749 {
750 ToSendReset();
751
752 // Correction bit, might be removed when not needed
753 ToSendStuffBit(0);
754 ToSendStuffBit(0);
755 ToSendStuffBit(0);
756 ToSendStuffBit(0);
757 ToSendStuffBit(1); // 1
758 ToSendStuffBit(0);
759 ToSendStuffBit(0);
760 ToSendStuffBit(0);
761
762 // Send startbit
763 ToSend[++ToSendMax] = SEC_D;
764 LastProxToAirDuration = 8 * ToSendMax - 4;
765
766 for( uint16_t i = 0; i < len; i++) {
767 uint8_t b = cmd[i];
768
769 // Data bits
770 for(uint16_t j = 0; j < 8; j++) {
771 if(b & 1) {
772 ToSend[++ToSendMax] = SEC_D;
773 } else {
774 ToSend[++ToSendMax] = SEC_E;
775 }
776 b >>= 1;
777 }
778
779 // Get the parity bit
780 if (parity[i>>3] & (0x80>>(i&0x0007))) {
781 ToSend[++ToSendMax] = SEC_D;
782 LastProxToAirDuration = 8 * ToSendMax - 4;
783 } else {
784 ToSend[++ToSendMax] = SEC_E;
785 LastProxToAirDuration = 8 * ToSendMax;
786 }
787 }
788
789 // Send stopbit
790 ToSend[++ToSendMax] = SEC_F;
791
792 // Convert from last byte pos to length
793 ToSendMax++;
794 }
795
796 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
797 {
798 uint8_t par[MAX_PARITY_SIZE];
799
800 GetParity(cmd, len, par);
801 CodeIso14443aAsTagPar(cmd, len, par);
802 }
803
804
805 static void Code4bitAnswerAsTag(uint8_t cmd)
806 {
807 int i;
808
809 ToSendReset();
810
811 // Correction bit, might be removed when not needed
812 ToSendStuffBit(0);
813 ToSendStuffBit(0);
814 ToSendStuffBit(0);
815 ToSendStuffBit(0);
816 ToSendStuffBit(1); // 1
817 ToSendStuffBit(0);
818 ToSendStuffBit(0);
819 ToSendStuffBit(0);
820
821 // Send startbit
822 ToSend[++ToSendMax] = SEC_D;
823
824 uint8_t b = cmd;
825 for(i = 0; i < 4; i++) {
826 if(b & 1) {
827 ToSend[++ToSendMax] = SEC_D;
828 LastProxToAirDuration = 8 * ToSendMax - 4;
829 } else {
830 ToSend[++ToSendMax] = SEC_E;
831 LastProxToAirDuration = 8 * ToSendMax;
832 }
833 b >>= 1;
834 }
835
836 // Send stopbit
837 ToSend[++ToSendMax] = SEC_F;
838
839 // Convert from last byte pos to length
840 ToSendMax++;
841 }
842
843 //-----------------------------------------------------------------------------
844 // Wait for commands from reader
845 // Stop when button is pressed
846 // Or return TRUE when command is captured
847 //-----------------------------------------------------------------------------
848 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
849 {
850 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
851 // only, since we are receiving, not transmitting).
852 // Signal field is off with the appropriate LED
853 LED_D_OFF();
854 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
855
856 // Now run a `software UART' on the stream of incoming samples.
857 UartInit(received, parity);
858
859 // clear RXRDY:
860 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
861
862 for(;;) {
863 WDT_HIT();
864
865 if(BUTTON_PRESS()) return FALSE;
866
867 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
868 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
869 if(MillerDecoding(b, 0)) {
870 *len = Uart.len;
871 return TRUE;
872 }
873 }
874 }
875 }
876
877 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
878 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
879 int EmSend4bit(uint8_t resp);
880 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
881 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
882 int EmSendCmd(uint8_t *resp, uint16_t respLen);
883 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
884 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
885 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
886
887 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
888
889 typedef struct {
890 uint8_t* response;
891 size_t response_n;
892 uint8_t* modulation;
893 size_t modulation_n;
894 uint32_t ProxToAirDuration;
895 } tag_response_info_t;
896
897 void reset_free_buffer() {
898 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
899 }
900
901 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
902 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
903 // This will need the following byte array for a modulation sequence
904 // 144 data bits (18 * 8)
905 // 18 parity bits
906 // 2 Start and stop
907 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
908 // 1 just for the case
909 // ----------- +
910 // 166 bytes, since every bit that needs to be send costs us a byte
911 //
912
913 // Prepare the tag modulation bits from the message
914 CodeIso14443aAsTag(response_info->response,response_info->response_n);
915
916 // Make sure we do not exceed the free buffer space
917 if (ToSendMax > max_buffer_size) {
918 Dbprintf("Out of memory, when modulating bits for tag answer:");
919 Dbhexdump(response_info->response_n,response_info->response,false);
920 return false;
921 }
922
923 // Copy the byte array, used for this modulation to the buffer position
924 memcpy(response_info->modulation,ToSend,ToSendMax);
925
926 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
927 response_info->modulation_n = ToSendMax;
928 response_info->ProxToAirDuration = LastProxToAirDuration;
929
930 return true;
931 }
932
933 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
934 // Retrieve and store the current buffer index
935 response_info->modulation = free_buffer_pointer;
936
937 // Determine the maximum size we can use from our buffer
938 size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer;
939
940 // Forward the prepare tag modulation function to the inner function
941 if (prepare_tag_modulation(response_info,max_buffer_size)) {
942 // Update the free buffer offset
943 free_buffer_pointer += ToSendMax;
944 return true;
945 } else {
946 return false;
947 }
948 }
949
950 //-----------------------------------------------------------------------------
951 // Main loop of simulated tag: receive commands from reader, decide what
952 // response to send, and send it.
953 //-----------------------------------------------------------------------------
954 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
955 {
956 // Enable and clear the trace
957 iso14a_clear_trace();
958 iso14a_set_tracing(TRUE);
959
960 uint8_t sak;
961
962 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
963 uint8_t response1[2];
964
965 switch (tagType) {
966 case 1: { // MIFARE Classic
967 // Says: I am Mifare 1k - original line
968 response1[0] = 0x04;
969 response1[1] = 0x00;
970 sak = 0x08;
971 } break;
972 case 2: { // MIFARE Ultralight
973 // Says: I am a stupid memory tag, no crypto
974 response1[0] = 0x04;
975 response1[1] = 0x00;
976 sak = 0x00;
977 } break;
978 case 3: { // MIFARE DESFire
979 // Says: I am a DESFire tag, ph33r me
980 response1[0] = 0x04;
981 response1[1] = 0x03;
982 sak = 0x20;
983 } break;
984 case 4: { // ISO/IEC 14443-4
985 // Says: I am a javacard (JCOP)
986 response1[0] = 0x04;
987 response1[1] = 0x00;
988 sak = 0x28;
989 } break;
990 case 5: { // MIFARE TNP3XXX
991 // Says: I am a toy
992 response1[0] = 0x01;
993 response1[1] = 0x0f;
994 sak = 0x01;
995 } break;
996 default: {
997 Dbprintf("Error: unkown tagtype (%d)",tagType);
998 return;
999 } break;
1000 }
1001
1002 // The second response contains the (mandatory) first 24 bits of the UID
1003 uint8_t response2[5];
1004
1005 // Check if the uid uses the (optional) part
1006 uint8_t response2a[5];
1007 if (uid_2nd) {
1008 response2[0] = 0x88;
1009 num_to_bytes(uid_1st,3,response2+1);
1010 num_to_bytes(uid_2nd,4,response2a);
1011 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1012
1013 // Configure the ATQA and SAK accordingly
1014 response1[0] |= 0x40;
1015 sak |= 0x04;
1016 } else {
1017 num_to_bytes(uid_1st,4,response2);
1018 // Configure the ATQA and SAK accordingly
1019 response1[0] &= 0xBF;
1020 sak &= 0xFB;
1021 }
1022
1023 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1024 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1025
1026 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1027 uint8_t response3[3];
1028 response3[0] = sak;
1029 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1030
1031 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1032 uint8_t response3a[3];
1033 response3a[0] = sak & 0xFB;
1034 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1035
1036 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1037 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1038 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1039 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1040 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1041 // TC(1) = 0x02: CID supported, NAD not supported
1042 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1043
1044 #define TAG_RESPONSE_COUNT 7
1045 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1046 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1047 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1048 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1049 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1050 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1051 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1052 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1053 };
1054
1055 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1056 // Such a response is less time critical, so we can prepare them on the fly
1057 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1058 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1059 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1060 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1061 tag_response_info_t dynamic_response_info = {
1062 .response = dynamic_response_buffer,
1063 .response_n = 0,
1064 .modulation = dynamic_modulation_buffer,
1065 .modulation_n = 0
1066 };
1067
1068 // Reset the offset pointer of the free buffer
1069 reset_free_buffer();
1070
1071 // Prepare the responses of the anticollision phase
1072 // there will be not enough time to do this at the moment the reader sends it REQA
1073 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1074 prepare_allocated_tag_modulation(&responses[i]);
1075 }
1076
1077 int len = 0;
1078
1079 // To control where we are in the protocol
1080 int order = 0;
1081 int lastorder;
1082
1083 // Just to allow some checks
1084 int happened = 0;
1085 int happened2 = 0;
1086 int cmdsRecvd = 0;
1087
1088 // We need to listen to the high-frequency, peak-detected path.
1089 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1090
1091 // buffers used on software Uart:
1092 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
1093 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
1094
1095 cmdsRecvd = 0;
1096 tag_response_info_t* p_response;
1097
1098 LED_A_ON();
1099 for(;;) {
1100 // Clean receive command buffer
1101
1102 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1103 DbpString("Button press");
1104 break;
1105 }
1106
1107 p_response = NULL;
1108
1109 // Okay, look at the command now.
1110 lastorder = order;
1111 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1112 p_response = &responses[0]; order = 1;
1113 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1114 p_response = &responses[0]; order = 6;
1115 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1116 p_response = &responses[1]; order = 2;
1117 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1118 p_response = &responses[2]; order = 20;
1119 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1120 p_response = &responses[3]; order = 3;
1121 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1122 p_response = &responses[4]; order = 30;
1123 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1124 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1125 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1126 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1127 p_response = NULL;
1128 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1129
1130 if (tracing) {
1131 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1132 }
1133 p_response = NULL;
1134 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1135 p_response = &responses[5]; order = 7;
1136 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1137 if (tagType == 1 || tagType == 2) { // RATS not supported
1138 EmSend4bit(CARD_NACK_NA);
1139 p_response = NULL;
1140 } else {
1141 p_response = &responses[6]; order = 70;
1142 }
1143 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1144 if (tracing) {
1145 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1146 }
1147 uint32_t nr = bytes_to_num(receivedCmd,4);
1148 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1149 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1150 } else {
1151 // Check for ISO 14443A-4 compliant commands, look at left nibble
1152 switch (receivedCmd[0]) {
1153
1154 case 0x0B:
1155 case 0x0A: { // IBlock (command)
1156 dynamic_response_info.response[0] = receivedCmd[0];
1157 dynamic_response_info.response[1] = 0x00;
1158 dynamic_response_info.response[2] = 0x90;
1159 dynamic_response_info.response[3] = 0x00;
1160 dynamic_response_info.response_n = 4;
1161 } break;
1162
1163 case 0x1A:
1164 case 0x1B: { // Chaining command
1165 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1166 dynamic_response_info.response_n = 2;
1167 } break;
1168
1169 case 0xaa:
1170 case 0xbb: {
1171 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1172 dynamic_response_info.response_n = 2;
1173 } break;
1174
1175 case 0xBA: { //
1176 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1177 dynamic_response_info.response_n = 2;
1178 } break;
1179
1180 case 0xCA:
1181 case 0xC2: { // Readers sends deselect command
1182 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1183 dynamic_response_info.response_n = 2;
1184 } break;
1185
1186 default: {
1187 // Never seen this command before
1188 if (tracing) {
1189 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1190 }
1191 Dbprintf("Received unknown command (len=%d):",len);
1192 Dbhexdump(len,receivedCmd,false);
1193 // Do not respond
1194 dynamic_response_info.response_n = 0;
1195 } break;
1196 }
1197
1198 if (dynamic_response_info.response_n > 0) {
1199 // Copy the CID from the reader query
1200 dynamic_response_info.response[1] = receivedCmd[1];
1201
1202 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1203 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1204 dynamic_response_info.response_n += 2;
1205
1206 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1207 Dbprintf("Error preparing tag response");
1208 if (tracing) {
1209 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1210 }
1211 break;
1212 }
1213 p_response = &dynamic_response_info;
1214 }
1215 }
1216
1217 // Count number of wakeups received after a halt
1218 if(order == 6 && lastorder == 5) { happened++; }
1219
1220 // Count number of other messages after a halt
1221 if(order != 6 && lastorder == 5) { happened2++; }
1222
1223 if(cmdsRecvd > 999) {
1224 DbpString("1000 commands later...");
1225 break;
1226 }
1227 cmdsRecvd++;
1228
1229 if (p_response != NULL) {
1230 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1231 // do the tracing for the previous reader request and this tag answer:
1232 uint8_t par[MAX_PARITY_SIZE];
1233 GetParity(p_response->response, p_response->response_n, par);
1234
1235 EmLogTrace(Uart.output,
1236 Uart.len,
1237 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1238 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1239 Uart.parity,
1240 p_response->response,
1241 p_response->response_n,
1242 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1243 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1244 par);
1245 }
1246
1247 if (!tracing) {
1248 Dbprintf("Trace Full. Simulation stopped.");
1249 break;
1250 }
1251 }
1252
1253 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1254 LED_A_OFF();
1255 }
1256
1257
1258 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1259 // of bits specified in the delay parameter.
1260 void PrepareDelayedTransfer(uint16_t delay)
1261 {
1262 uint8_t bitmask = 0;
1263 uint8_t bits_to_shift = 0;
1264 uint8_t bits_shifted = 0;
1265
1266 delay &= 0x07;
1267 if (delay) {
1268 for (uint16_t i = 0; i < delay; i++) {
1269 bitmask |= (0x01 << i);
1270 }
1271 ToSend[ToSendMax++] = 0x00;
1272 for (uint16_t i = 0; i < ToSendMax; i++) {
1273 bits_to_shift = ToSend[i] & bitmask;
1274 ToSend[i] = ToSend[i] >> delay;
1275 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1276 bits_shifted = bits_to_shift;
1277 }
1278 }
1279 }
1280
1281
1282 //-------------------------------------------------------------------------------------
1283 // Transmit the command (to the tag) that was placed in ToSend[].
1284 // Parameter timing:
1285 // if NULL: transfer at next possible time, taking into account
1286 // request guard time and frame delay time
1287 // if == 0: transfer immediately and return time of transfer
1288 // if != 0: delay transfer until time specified
1289 //-------------------------------------------------------------------------------------
1290 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1291 {
1292
1293 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1294
1295 uint32_t ThisTransferTime = 0;
1296
1297 if (timing) {
1298 if(*timing == 0) { // Measure time
1299 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1300 } else {
1301 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1302 }
1303 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1304 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1305 LastTimeProxToAirStart = *timing;
1306 } else {
1307 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1308 while(GetCountSspClk() < ThisTransferTime);
1309 LastTimeProxToAirStart = ThisTransferTime;
1310 }
1311
1312 // clear TXRDY
1313 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1314
1315 uint16_t c = 0;
1316 for(;;) {
1317 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1318 AT91C_BASE_SSC->SSC_THR = cmd[c];
1319 c++;
1320 if(c >= len) {
1321 break;
1322 }
1323 }
1324 }
1325
1326 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1327 }
1328
1329
1330 //-----------------------------------------------------------------------------
1331 // Prepare reader command (in bits, support short frames) to send to FPGA
1332 //-----------------------------------------------------------------------------
1333 void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, uint16_t bits, const uint8_t *parity)
1334 {
1335 int i, j;
1336 int last;
1337 uint8_t b;
1338
1339 ToSendReset();
1340
1341 // Start of Communication (Seq. Z)
1342 ToSend[++ToSendMax] = SEC_Z;
1343 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1344 last = 0;
1345
1346 size_t bytecount = nbytes(bits);
1347 // Generate send structure for the data bits
1348 for (i = 0; i < bytecount; i++) {
1349 // Get the current byte to send
1350 b = cmd[i];
1351 size_t bitsleft = MIN((bits-(i*8)),8);
1352
1353 for (j = 0; j < bitsleft; j++) {
1354 if (b & 1) {
1355 // Sequence X
1356 ToSend[++ToSendMax] = SEC_X;
1357 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1358 last = 1;
1359 } else {
1360 if (last == 0) {
1361 // Sequence Z
1362 ToSend[++ToSendMax] = SEC_Z;
1363 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1364 } else {
1365 // Sequence Y
1366 ToSend[++ToSendMax] = SEC_Y;
1367 last = 0;
1368 }
1369 }
1370 b >>= 1;
1371 }
1372
1373 // Only transmit parity bit if we transmitted a complete byte
1374 if (j == 8) {
1375 // Get the parity bit
1376 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1377 // Sequence X
1378 ToSend[++ToSendMax] = SEC_X;
1379 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1380 last = 1;
1381 } else {
1382 if (last == 0) {
1383 // Sequence Z
1384 ToSend[++ToSendMax] = SEC_Z;
1385 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1386 } else {
1387 // Sequence Y
1388 ToSend[++ToSendMax] = SEC_Y;
1389 last = 0;
1390 }
1391 }
1392 }
1393 }
1394
1395 // End of Communication: Logic 0 followed by Sequence Y
1396 if (last == 0) {
1397 // Sequence Z
1398 ToSend[++ToSendMax] = SEC_Z;
1399 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1400 } else {
1401 // Sequence Y
1402 ToSend[++ToSendMax] = SEC_Y;
1403 last = 0;
1404 }
1405 ToSend[++ToSendMax] = SEC_Y;
1406
1407 // Convert to length of command:
1408 ToSendMax++;
1409 }
1410
1411 //-----------------------------------------------------------------------------
1412 // Prepare reader command to send to FPGA
1413 //-----------------------------------------------------------------------------
1414 void CodeIso14443aAsReaderPar(const uint8_t * cmd, uint16_t len, const uint8_t *parity)
1415 {
1416 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1417 }
1418
1419 //-----------------------------------------------------------------------------
1420 // Wait for commands from reader
1421 // Stop when button is pressed (return 1) or field was gone (return 2)
1422 // Or return 0 when command is captured
1423 //-----------------------------------------------------------------------------
1424 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1425 {
1426 *len = 0;
1427
1428 uint32_t timer = 0, vtime = 0;
1429 int analogCnt = 0;
1430 int analogAVG = 0;
1431
1432 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1433 // only, since we are receiving, not transmitting).
1434 // Signal field is off with the appropriate LED
1435 LED_D_OFF();
1436 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1437
1438 // Set ADC to read field strength
1439 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1440 AT91C_BASE_ADC->ADC_MR =
1441 ADC_MODE_PRESCALE(32) |
1442 ADC_MODE_STARTUP_TIME(16) |
1443 ADC_MODE_SAMPLE_HOLD_TIME(8);
1444 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1445 // start ADC
1446 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1447
1448 // Now run a 'software UART' on the stream of incoming samples.
1449 UartInit(received, parity);
1450
1451 // Clear RXRDY:
1452 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1453
1454 for(;;) {
1455 WDT_HIT();
1456
1457 if (BUTTON_PRESS()) return 1;
1458
1459 // test if the field exists
1460 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1461 analogCnt++;
1462 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1463 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1464 if (analogCnt >= 32) {
1465 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1466 vtime = GetTickCount();
1467 if (!timer) timer = vtime;
1468 // 50ms no field --> card to idle state
1469 if (vtime - timer > 50) return 2;
1470 } else
1471 if (timer) timer = 0;
1472 analogCnt = 0;
1473 analogAVG = 0;
1474 }
1475 }
1476
1477 // receive and test the miller decoding
1478 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1479 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1480 if(MillerDecoding(b, 0)) {
1481 *len = Uart.len;
1482 return 0;
1483 }
1484 }
1485
1486 }
1487 }
1488
1489
1490 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1491 {
1492 uint8_t b;
1493 uint16_t i = 0;
1494 uint32_t ThisTransferTime;
1495
1496 // Modulate Manchester
1497 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1498
1499 // include correction bit if necessary
1500 if (Uart.parityBits & 0x01) {
1501 correctionNeeded = TRUE;
1502 }
1503 if(correctionNeeded) {
1504 // 1236, so correction bit needed
1505 i = 0;
1506 } else {
1507 i = 1;
1508 }
1509
1510 // clear receiving shift register and holding register
1511 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1512 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1513 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1514 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1515
1516 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1517 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1518 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1519 if (AT91C_BASE_SSC->SSC_RHR) break;
1520 }
1521
1522 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1523
1524 // Clear TXRDY:
1525 AT91C_BASE_SSC->SSC_THR = SEC_F;
1526
1527 // send cycle
1528 for(; i <= respLen; ) {
1529 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1530 AT91C_BASE_SSC->SSC_THR = resp[i++];
1531 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1532 }
1533
1534 if(BUTTON_PRESS()) {
1535 break;
1536 }
1537 }
1538
1539 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1540 for (i = 0; i < 2 ; ) {
1541 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1542 AT91C_BASE_SSC->SSC_THR = SEC_F;
1543 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1544 i++;
1545 }
1546 }
1547
1548 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1549
1550 return 0;
1551 }
1552
1553 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1554 Code4bitAnswerAsTag(resp);
1555 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1556 // do the tracing for the previous reader request and this tag answer:
1557 uint8_t par[1];
1558 GetParity(&resp, 1, par);
1559 EmLogTrace(Uart.output,
1560 Uart.len,
1561 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1562 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1563 Uart.parity,
1564 &resp,
1565 1,
1566 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1567 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1568 par);
1569 return res;
1570 }
1571
1572 int EmSend4bit(uint8_t resp){
1573 return EmSend4bitEx(resp, false);
1574 }
1575
1576 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1577 CodeIso14443aAsTagPar(resp, respLen, par);
1578 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1579 // do the tracing for the previous reader request and this tag answer:
1580 EmLogTrace(Uart.output,
1581 Uart.len,
1582 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1583 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1584 Uart.parity,
1585 resp,
1586 respLen,
1587 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1588 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1589 par);
1590 return res;
1591 }
1592
1593 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1594 uint8_t par[MAX_PARITY_SIZE];
1595 GetParity(resp, respLen, par);
1596 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1597 }
1598
1599 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1600 uint8_t par[MAX_PARITY_SIZE];
1601 GetParity(resp, respLen, par);
1602 return EmSendCmdExPar(resp, respLen, false, par);
1603 }
1604
1605 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1606 return EmSendCmdExPar(resp, respLen, false, par);
1607 }
1608
1609 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1610 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1611 {
1612 if (tracing) {
1613 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1614 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1615 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1616 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1617 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1618 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1619 reader_EndTime = tag_StartTime - exact_fdt;
1620 reader_StartTime = reader_EndTime - reader_modlen;
1621 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1622 return FALSE;
1623 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1624 } else {
1625 return TRUE;
1626 }
1627 }
1628
1629 //-----------------------------------------------------------------------------
1630 // Wait a certain time for tag response
1631 // If a response is captured return TRUE
1632 // If it takes too long return FALSE
1633 //-----------------------------------------------------------------------------
1634 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1635 {
1636 uint32_t c;
1637
1638 // Set FPGA mode to "reader listen mode", no modulation (listen
1639 // only, since we are receiving, not transmitting).
1640 // Signal field is on with the appropriate LED
1641 LED_D_ON();
1642 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1643
1644 // Now get the answer from the card
1645 DemodInit(receivedResponse, receivedResponsePar);
1646
1647 // clear RXRDY:
1648 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1649
1650 c = 0;
1651 for(;;) {
1652 WDT_HIT();
1653
1654 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1655 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1656 if(ManchesterDecoding(b, offset, 0)) {
1657 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1658 return TRUE;
1659 } else if (c++ > iso14a_timeout) {
1660 return FALSE;
1661 }
1662 }
1663 }
1664 }
1665
1666 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1667 {
1668 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1669
1670 // Send command to tag
1671 TransmitFor14443a(ToSend, ToSendMax, timing);
1672 if(trigger)
1673 LED_A_ON();
1674
1675 // Log reader command in trace buffer
1676 if (tracing) {
1677 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1678 }
1679 }
1680
1681 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1682 {
1683 ReaderTransmitBitsPar(frame, len*8, par, timing);
1684 }
1685
1686 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1687 {
1688 // Generate parity and redirect
1689 uint8_t par[MAX_PARITY_SIZE];
1690 GetParity(frame, len/8, par);
1691 ReaderTransmitBitsPar(frame, len, par, timing);
1692 }
1693
1694 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1695 {
1696 // Generate parity and redirect
1697 uint8_t par[MAX_PARITY_SIZE];
1698 GetParity(frame, len, par);
1699 ReaderTransmitBitsPar(frame, len*8, par, timing);
1700 }
1701
1702 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1703 {
1704 if (!GetIso14443aAnswerFromTag(receivedAnswer,parity,offset)) return FALSE;
1705 if (tracing) {
1706 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1707 }
1708 return Demod.len;
1709 }
1710
1711 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1712 {
1713 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1714 if (tracing) {
1715 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1716 }
1717 return Demod.len;
1718 }
1719
1720 /* performs iso14443a anticollision procedure
1721 * fills the uid pointer unless NULL
1722 * fills resp_data unless NULL */
1723 int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
1724
1725 //uint8_t deselect[] = {0xc2}; //DESELECT
1726 //uint8_t halt[] = { 0x50, 0x00, 0x57, 0xCD }; // HALT
1727 uint8_t wupa[] = { 0x52 }; // WAKE-UP
1728 //uint8_t reqa[] = { 0x26 }; // REQUEST A
1729 uint8_t sel_all[] = { 0x93,0x20 };
1730 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1731 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1732 uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
1733 uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
1734
1735 byte_t uid_resp[4];
1736 size_t uid_resp_len;
1737 uint8_t sak = 0x04; // cascade uid
1738 int cascade_level = 0;
1739 int len =0;
1740
1741 // test for the SKYLANDERS TOY.
1742 // ReaderTransmit(deselect,sizeof(deselect), NULL);
1743 // len = ReaderReceive(resp, resp_par);
1744
1745 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1746 ReaderTransmitBitsPar(wupa,7,0, NULL);
1747
1748 // Receive the ATQA
1749 if(!ReaderReceive(resp, resp_par)) return 0;
1750
1751 if(p_hi14a_card) {
1752 memcpy(p_hi14a_card->atqa, resp, 2);
1753 p_hi14a_card->uidlen = 0;
1754 memset(p_hi14a_card->uid,0,10);
1755 }
1756
1757 // clear uid
1758 if (uid_ptr) {
1759 memset(uid_ptr,0,10);
1760 }
1761
1762 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1763 // which case we need to make a cascade 2 request and select - this is a long UID
1764 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1765 for(; sak & 0x04; cascade_level++) {
1766 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1767 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1768
1769 // SELECT_ALL
1770 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
1771 if (!ReaderReceive(resp, resp_par)) return 0;
1772
1773 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1774 memset(uid_resp, 0, 4);
1775 uint16_t uid_resp_bits = 0;
1776 uint16_t collision_answer_offset = 0;
1777 // anti-collision-loop:
1778 while (Demod.collisionPos) {
1779 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1780 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1781 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1782 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1783 }
1784 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1785 uid_resp_bits++;
1786 // construct anticollosion command:
1787 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1788 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1789 sel_uid[2+i] = uid_resp[i];
1790 }
1791 collision_answer_offset = uid_resp_bits%8;
1792 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1793 if (!ReaderReceiveOffset(resp, collision_answer_offset,resp_par)) return 0;
1794 }
1795 // finally, add the last bits and BCC of the UID
1796 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1797 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1798 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1799 }
1800
1801 } else { // no collision, use the response to SELECT_ALL as current uid
1802 memcpy(uid_resp,resp,4);
1803 }
1804 uid_resp_len = 4;
1805
1806 // calculate crypto UID. Always use last 4 Bytes.
1807 if(cuid_ptr) {
1808 *cuid_ptr = bytes_to_num(uid_resp, 4);
1809 }
1810
1811 // Construct SELECT UID command
1812 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1813 memcpy(sel_uid+2,uid_resp,4); // the UID
1814 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1815 AppendCrc14443a(sel_uid,7); // calculate and add CRC
1816 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
1817
1818 // Receive the SAK
1819 if (!ReaderReceive(resp, resp_par)){
1820 return 0;
1821 }
1822
1823
1824 sak = resp[0];
1825
1826 // Test if more parts of the uid are coming
1827 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1828 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1829 // http://www.nxp.com/documents/application_note/AN10927.pdf
1830 uid_resp[0] = uid_resp[1];
1831 uid_resp[1] = uid_resp[2];
1832 uid_resp[2] = uid_resp[3];
1833
1834 uid_resp_len = 3;
1835 }
1836
1837 if(uid_ptr) {
1838 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1839 }
1840
1841 if(p_hi14a_card) {
1842 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1843 p_hi14a_card->uidlen += uid_resp_len;
1844 }
1845 }
1846
1847 if(p_hi14a_card) {
1848 p_hi14a_card->sak = sak;
1849 p_hi14a_card->ats_len = 0;
1850 }
1851
1852 // non iso14443a compliant tag
1853 if( (sak & 0x20) == 0) return 2;
1854
1855 // Request for answer to select
1856 AppendCrc14443a(rats, 2);
1857 ReaderTransmit(rats, sizeof(rats), NULL);
1858
1859 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1860
1861
1862 if(p_hi14a_card) {
1863 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1864 p_hi14a_card->ats_len = len;
1865 }
1866
1867 // reset the PCB block number
1868 iso14_pcb_blocknum = 0;
1869 return 1;
1870 }
1871
1872 void iso14443a_setup(uint8_t fpga_minor_mode) {
1873 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1874 // Set up the synchronous serial port
1875 FpgaSetupSsc();
1876 // connect Demodulated Signal to ADC:
1877 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1878
1879 // Signal field is on with the appropriate LED
1880 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1881 LED_D_ON();
1882 } else {
1883 LED_D_OFF();
1884 }
1885 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1886
1887 // Start the timer
1888 StartCountSspClk();
1889
1890 DemodReset();
1891 UartReset();
1892 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1893 iso14a_set_timeout(1050); // 10ms default 10*105 =
1894 }
1895
1896 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1897 uint8_t parity[MAX_PARITY_SIZE];
1898 uint8_t real_cmd[cmd_len+4];
1899 real_cmd[0] = 0x0a; //I-Block
1900 // put block number into the PCB
1901 real_cmd[0] |= iso14_pcb_blocknum;
1902 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1903 memcpy(real_cmd+2, cmd, cmd_len);
1904 AppendCrc14443a(real_cmd,cmd_len+2);
1905
1906 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1907 size_t len = ReaderReceive(data, parity);
1908 uint8_t * data_bytes = (uint8_t *) data;
1909 if (!len)
1910 return 0; //DATA LINK ERROR
1911 // if we received an I- or R(ACK)-Block with a block number equal to the
1912 // current block number, toggle the current block number
1913 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1914 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1915 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1916 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1917 {
1918 iso14_pcb_blocknum ^= 1;
1919 }
1920
1921 return len;
1922 }
1923
1924 //-----------------------------------------------------------------------------
1925 // Read an ISO 14443a tag. Send out commands and store answers.
1926 //
1927 //-----------------------------------------------------------------------------
1928 void ReaderIso14443a(UsbCommand *c)
1929 {
1930 iso14a_command_t param = c->arg[0];
1931 uint8_t *cmd = c->d.asBytes;
1932 size_t len = c->arg[1];
1933 size_t lenbits = c->arg[2];
1934 uint32_t arg0 = 0;
1935 byte_t buf[USB_CMD_DATA_SIZE];
1936 uint8_t par[MAX_PARITY_SIZE];
1937
1938 if(param & ISO14A_CONNECT) {
1939 iso14a_clear_trace();
1940 }
1941
1942 iso14a_set_tracing(TRUE);
1943
1944 if(param & ISO14A_REQUEST_TRIGGER) {
1945 iso14a_set_trigger(TRUE);
1946 }
1947
1948 if(param & ISO14A_CONNECT) {
1949 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1950 if(!(param & ISO14A_NO_SELECT)) {
1951 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1952 arg0 = iso14443a_select_card(NULL,card,NULL);
1953 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1954 }
1955 }
1956
1957 if(param & ISO14A_SET_TIMEOUT) {
1958 iso14a_set_timeout(c->arg[2]);
1959 }
1960
1961 if(param & ISO14A_APDU) {
1962 arg0 = iso14_apdu(cmd, len, buf);
1963 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1964 }
1965
1966 if(param & ISO14A_RAW) {
1967 if(param & ISO14A_APPEND_CRC) {
1968 AppendCrc14443a(cmd,len);
1969 len += 2;
1970 if (lenbits) lenbits += 16;
1971 }
1972 if(lenbits>0) {
1973 GetParity(cmd, lenbits/8, par);
1974 ReaderTransmitBitsPar(cmd, lenbits, par, NULL);
1975 } else {
1976 ReaderTransmit(cmd,len, NULL);
1977 }
1978 arg0 = ReaderReceive(buf, par);
1979 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1980 }
1981
1982 if(param & ISO14A_REQUEST_TRIGGER) {
1983 iso14a_set_trigger(FALSE);
1984 }
1985
1986 if(param & ISO14A_NO_DISCONNECT) {
1987 return;
1988 }
1989
1990 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1991 LEDsoff();
1992 }
1993
1994
1995 // Determine the distance between two nonces.
1996 // Assume that the difference is small, but we don't know which is first.
1997 // Therefore try in alternating directions.
1998 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1999
2000 uint16_t i;
2001 uint32_t nttmp1, nttmp2;
2002
2003 if (nt1 == nt2) return 0;
2004
2005 nttmp1 = nt1;
2006 nttmp2 = nt2;
2007
2008 for (i = 1; i < 32768; i++) {
2009 nttmp1 = prng_successor(nttmp1, 1);
2010 if (nttmp1 == nt2) return i;
2011 nttmp2 = prng_successor(nttmp2, 1);
2012 if (nttmp2 == nt1) return -i;
2013 }
2014
2015 return(-99999); // either nt1 or nt2 are invalid nonces
2016 }
2017
2018
2019 //-----------------------------------------------------------------------------
2020 // Recover several bits of the cypher stream. This implements (first stages of)
2021 // the algorithm described in "The Dark Side of Security by Obscurity and
2022 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2023 // (article by Nicolas T. Courtois, 2009)
2024 //-----------------------------------------------------------------------------
2025 void ReaderMifare(bool first_try)
2026 {
2027 // Mifare AUTH
2028 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2029 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2030 static uint8_t mf_nr_ar3;
2031
2032 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2033 uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET);
2034
2035 iso14a_clear_trace();
2036 iso14a_set_tracing(TRUE);
2037
2038 byte_t nt_diff = 0;
2039 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2040 static byte_t par_low = 0;
2041 bool led_on = TRUE;
2042 uint8_t uid[10] ={0};
2043 uint32_t cuid;
2044
2045 uint32_t nt = 0;
2046 uint32_t previous_nt = 0;
2047 static uint32_t nt_attacked = 0;
2048 byte_t par_list[8] = {0x00};
2049 byte_t ks_list[8] = {0x00};
2050
2051 static uint32_t sync_time;
2052 static uint32_t sync_cycles;
2053 int catch_up_cycles = 0;
2054 int last_catch_up = 0;
2055 uint16_t consecutive_resyncs = 0;
2056 int isOK = 0;
2057
2058 if (first_try) {
2059 mf_nr_ar3 = 0;
2060 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2061 sync_time = GetCountSspClk() & 0xfffffff8;
2062 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2063 nt_attacked = 0;
2064 nt = 0;
2065 par[0] = 0;
2066 }
2067 else {
2068 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2069 mf_nr_ar3++;
2070 mf_nr_ar[3] = mf_nr_ar3;
2071 par[0] = par_low;
2072 }
2073
2074 LED_A_ON();
2075 LED_B_OFF();
2076 LED_C_OFF();
2077
2078
2079 for(uint16_t i = 0; TRUE; i++) {
2080
2081 WDT_HIT();
2082
2083 // Test if the action was cancelled
2084 if(BUTTON_PRESS()) {
2085 break;
2086 }
2087
2088 LED_C_ON();
2089
2090 if(!iso14443a_select_card(uid, NULL, &cuid)) {
2091 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2092 continue;
2093 }
2094
2095 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2096 catch_up_cycles = 0;
2097
2098 // if we missed the sync time already, advance to the next nonce repeat
2099 while(GetCountSspClk() > sync_time) {
2100 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2101 }
2102
2103 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2104 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2105
2106 // Receive the (4 Byte) "random" nonce
2107 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2108 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2109 continue;
2110 }
2111
2112 previous_nt = nt;
2113 nt = bytes_to_num(receivedAnswer, 4);
2114
2115 // Transmit reader nonce with fake par
2116 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2117
2118 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2119 int nt_distance = dist_nt(previous_nt, nt);
2120 if (nt_distance == 0) {
2121 nt_attacked = nt;
2122 }
2123 else {
2124 if (nt_distance == -99999) { // invalid nonce received, try again
2125 continue;
2126 }
2127 sync_cycles = (sync_cycles - nt_distance);
2128 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2129 continue;
2130 }
2131 }
2132
2133 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2134 catch_up_cycles = -dist_nt(nt_attacked, nt);
2135 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2136 catch_up_cycles = 0;
2137 continue;
2138 }
2139 if (catch_up_cycles == last_catch_up) {
2140 consecutive_resyncs++;
2141 }
2142 else {
2143 last_catch_up = catch_up_cycles;
2144 consecutive_resyncs = 0;
2145 }
2146 if (consecutive_resyncs < 3) {
2147 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2148 }
2149 else {
2150 sync_cycles = sync_cycles + catch_up_cycles;
2151 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2152 }
2153 continue;
2154 }
2155
2156 consecutive_resyncs = 0;
2157
2158 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2159 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2160 {
2161 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2162
2163 if (nt_diff == 0)
2164 {
2165 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2166 }
2167
2168 led_on = !led_on;
2169 if(led_on) LED_B_ON(); else LED_B_OFF();
2170
2171 par_list[nt_diff] = SwapBits(par[0], 8);
2172 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2173
2174 // Test if the information is complete
2175 if (nt_diff == 0x07) {
2176 isOK = 1;
2177 break;
2178 }
2179
2180 nt_diff = (nt_diff + 1) & 0x07;
2181 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2182 par[0] = par_low;
2183 } else {
2184 if (nt_diff == 0 && first_try)
2185 {
2186 par[0]++;
2187 } else {
2188 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2189 }
2190 }
2191 }
2192
2193
2194 mf_nr_ar[3] &= 0x1F;
2195
2196 byte_t buf[28];
2197 memcpy(buf + 0, uid, 4);
2198 num_to_bytes(nt, 4, buf + 4);
2199 memcpy(buf + 8, par_list, 8);
2200 memcpy(buf + 16, ks_list, 8);
2201 memcpy(buf + 24, mf_nr_ar, 4);
2202
2203 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2204
2205 // Thats it...
2206 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2207 LEDsoff();
2208
2209 iso14a_set_tracing(FALSE);
2210 }
2211
2212 /**
2213 *MIFARE 1K simulate.
2214 *
2215 *@param flags :
2216 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2217 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2218 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2219 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2220 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2221 */
2222 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2223 {
2224 int cardSTATE = MFEMUL_NOFIELD;
2225 int _7BUID = 0;
2226 int vHf = 0; // in mV
2227 int res;
2228 uint32_t selTimer = 0;
2229 uint32_t authTimer = 0;
2230 uint16_t len = 0;
2231 uint8_t cardWRBL = 0;
2232 uint8_t cardAUTHSC = 0;
2233 uint8_t cardAUTHKEY = 0xff; // no authentication
2234 uint32_t cardRr = 0;
2235 uint32_t cuid = 0;
2236 //uint32_t rn_enc = 0;
2237 uint32_t ans = 0;
2238 uint32_t cardINTREG = 0;
2239 uint8_t cardINTBLOCK = 0;
2240 struct Crypto1State mpcs = {0, 0};
2241 struct Crypto1State *pcs;
2242 pcs = &mpcs;
2243 uint32_t numReads = 0;//Counts numer of times reader read a block
2244 uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf();
2245 uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE;
2246 uint8_t* response = get_bigbufptr_recvrespbuf();
2247 uint8_t* response_par = response + MAX_FRAME_SIZE;
2248
2249 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2250 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2251 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2252 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2253 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2254
2255 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2256 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2257
2258 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2259 // This can be used in a reader-only attack.
2260 // (it can also be retrieved via 'hf 14a list', but hey...
2261 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2262 uint8_t ar_nr_collected = 0;
2263
2264 // clear trace
2265 iso14a_clear_trace();
2266 iso14a_set_tracing(TRUE);
2267
2268 // Authenticate response - nonce
2269 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2270
2271 //-- Determine the UID
2272 // Can be set from emulator memory, incoming data
2273 // and can be 7 or 4 bytes long
2274 if (flags & FLAG_4B_UID_IN_DATA)
2275 {
2276 // 4B uid comes from data-portion of packet
2277 memcpy(rUIDBCC1,datain,4);
2278 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2279
2280 } else if (flags & FLAG_7B_UID_IN_DATA) {
2281 // 7B uid comes from data-portion of packet
2282 memcpy(&rUIDBCC1[1],datain,3);
2283 memcpy(rUIDBCC2, datain+3, 4);
2284 _7BUID = true;
2285 } else {
2286 // get UID from emul memory
2287 emlGetMemBt(receivedCmd, 7, 1);
2288 _7BUID = !(receivedCmd[0] == 0x00);
2289 if (!_7BUID) { // ---------- 4BUID
2290 emlGetMemBt(rUIDBCC1, 0, 4);
2291 } else { // ---------- 7BUID
2292 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2293 emlGetMemBt(rUIDBCC2, 3, 4);
2294 }
2295 }
2296
2297 /*
2298 * Regardless of what method was used to set the UID, set fifth byte and modify
2299 * the ATQA for 4 or 7-byte UID
2300 */
2301 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2302 if (_7BUID) {
2303 rATQA[0] = 0x44;
2304 rUIDBCC1[0] = 0x88;
2305 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2306 }
2307
2308 // We need to listen to the high-frequency, peak-detected path.
2309 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2310
2311
2312 if (MF_DBGLEVEL >= 1) {
2313 if (!_7BUID) {
2314 Dbprintf("4B UID: %02x%02x%02x%02x",
2315 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2316 } else {
2317 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2318 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2319 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2320 }
2321 }
2322
2323 bool finished = FALSE;
2324 while (!BUTTON_PRESS() && !finished) {
2325 WDT_HIT();
2326
2327 // find reader field
2328 // Vref = 3300mV, and an 10:1 voltage divider on the input
2329 // can measure voltages up to 33000 mV
2330 if (cardSTATE == MFEMUL_NOFIELD) {
2331 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2332 if (vHf > MF_MINFIELDV) {
2333 cardSTATE_TO_IDLE();
2334 LED_A_ON();
2335 }
2336 }
2337 if(cardSTATE == MFEMUL_NOFIELD) continue;
2338
2339 //Now, get data
2340
2341 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2342 if (res == 2) { //Field is off!
2343 cardSTATE = MFEMUL_NOFIELD;
2344 LEDsoff();
2345 continue;
2346 } else if (res == 1) {
2347 break; //return value 1 means button press
2348 }
2349
2350 // REQ or WUP request in ANY state and WUP in HALTED state
2351 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2352 selTimer = GetTickCount();
2353 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2354 cardSTATE = MFEMUL_SELECT1;
2355
2356 // init crypto block
2357 LED_B_OFF();
2358 LED_C_OFF();
2359 crypto1_destroy(pcs);
2360 cardAUTHKEY = 0xff;
2361 continue;
2362 }
2363
2364 switch (cardSTATE) {
2365 case MFEMUL_NOFIELD:
2366 case MFEMUL_HALTED:
2367 case MFEMUL_IDLE:{
2368 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2369 break;
2370 }
2371 case MFEMUL_SELECT1:{
2372 // select all
2373 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2374 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2375 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2376 break;
2377 }
2378
2379 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2380 {
2381 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2382 }
2383 // select card
2384 if (len == 9 &&
2385 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2386 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2387 cuid = bytes_to_num(rUIDBCC1, 4);
2388 if (!_7BUID) {
2389 cardSTATE = MFEMUL_WORK;
2390 LED_B_ON();
2391 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2392 break;
2393 } else {
2394 cardSTATE = MFEMUL_SELECT2;
2395 }
2396 }
2397 break;
2398 }
2399 case MFEMUL_AUTH1:{
2400 if( len != 8)
2401 {
2402 cardSTATE_TO_IDLE();
2403 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2404 break;
2405 }
2406 uint32_t ar = bytes_to_num(receivedCmd, 4);
2407 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2408
2409 //Collect AR/NR
2410 if(ar_nr_collected < 2){
2411 if(ar_nr_responses[2] != ar)
2412 {// Avoid duplicates... probably not necessary, ar should vary.
2413 ar_nr_responses[ar_nr_collected*4] = cuid;
2414 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2415 ar_nr_responses[ar_nr_collected*4+2] = ar;
2416 ar_nr_responses[ar_nr_collected*4+3] = nr;
2417 ar_nr_collected++;
2418 }
2419 }
2420
2421 // --- crypto
2422 crypto1_word(pcs, ar , 1);
2423 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2424
2425 // test if auth OK
2426 if (cardRr != prng_successor(nonce, 64)){
2427 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2428 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2429 cardRr, prng_successor(nonce, 64));
2430 // Shouldn't we respond anything here?
2431 // Right now, we don't nack or anything, which causes the
2432 // reader to do a WUPA after a while. /Martin
2433 // -- which is the correct response. /piwi
2434 cardSTATE_TO_IDLE();
2435 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2436 break;
2437 }
2438
2439 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2440
2441 num_to_bytes(ans, 4, rAUTH_AT);
2442 // --- crypto
2443 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2444 LED_C_ON();
2445 cardSTATE = MFEMUL_WORK;
2446 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2447 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2448 GetTickCount() - authTimer);
2449 break;
2450 }
2451 case MFEMUL_SELECT2:{
2452 if (!len) {
2453 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2454 break;
2455 }
2456 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2457 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2458 break;
2459 }
2460
2461 // select 2 card
2462 if (len == 9 &&
2463 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2464 EmSendCmd(rSAK, sizeof(rSAK));
2465 cuid = bytes_to_num(rUIDBCC2, 4);
2466 cardSTATE = MFEMUL_WORK;
2467 LED_B_ON();
2468 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2469 break;
2470 }
2471
2472 // i guess there is a command). go into the work state.
2473 if (len != 4) {
2474 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2475 break;
2476 }
2477 cardSTATE = MFEMUL_WORK;
2478 //goto lbWORK;
2479 //intentional fall-through to the next case-stmt
2480 }
2481
2482 case MFEMUL_WORK:{
2483 if (len == 0) {
2484 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2485 break;
2486 }
2487
2488 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2489
2490 if(encrypted_data) {
2491 // decrypt seqence
2492 mf_crypto1_decrypt(pcs, receivedCmd, len);
2493 }
2494
2495 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2496 authTimer = GetTickCount();
2497 cardAUTHSC = receivedCmd[1] / 4; // received block num
2498 cardAUTHKEY = receivedCmd[0] - 0x60;
2499 crypto1_destroy(pcs);//Added by martin
2500 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2501
2502 if (!encrypted_data) { // first authentication
2503 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2504
2505 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2506 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2507 } else { // nested authentication
2508 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2509 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2510 num_to_bytes(ans, 4, rAUTH_AT);
2511 }
2512 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2513 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2514 cardSTATE = MFEMUL_AUTH1;
2515 break;
2516 }
2517
2518 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2519 // BUT... ACK --> NACK
2520 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2521 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2522 break;
2523 }
2524
2525 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2526 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2527 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2528 break;
2529 }
2530
2531 if(len != 4) {
2532 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2533 break;
2534 }
2535
2536 if(receivedCmd[0] == 0x30 // read block
2537 || receivedCmd[0] == 0xA0 // write block
2538 || receivedCmd[0] == 0xC0 // inc
2539 || receivedCmd[0] == 0xC1 // dec
2540 || receivedCmd[0] == 0xC2 // restore
2541 || receivedCmd[0] == 0xB0) { // transfer
2542 if (receivedCmd[1] >= 16 * 4) {
2543 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2544 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2545 break;
2546 }
2547
2548 if (receivedCmd[1] / 4 != cardAUTHSC) {
2549 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2550 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2551 break;
2552 }
2553 }
2554 // read block
2555 if (receivedCmd[0] == 0x30) {
2556 if (MF_DBGLEVEL >= 4) {
2557 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2558 }
2559 emlGetMem(response, receivedCmd[1], 1);
2560 AppendCrc14443a(response, 16);
2561 mf_crypto1_encrypt(pcs, response, 18, response_par);
2562 EmSendCmdPar(response, 18, response_par);
2563 numReads++;
2564 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2565 Dbprintf("%d reads done, exiting", numReads);
2566 finished = true;
2567 }
2568 break;
2569 }
2570 // write block
2571 if (receivedCmd[0] == 0xA0) {
2572 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2573 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2574 cardSTATE = MFEMUL_WRITEBL2;
2575 cardWRBL = receivedCmd[1];
2576 break;
2577 }
2578 // increment, decrement, restore
2579 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2580 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2581 if (emlCheckValBl(receivedCmd[1])) {
2582 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2583 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2584 break;
2585 }
2586 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2587 if (receivedCmd[0] == 0xC1)
2588 cardSTATE = MFEMUL_INTREG_INC;
2589 if (receivedCmd[0] == 0xC0)
2590 cardSTATE = MFEMUL_INTREG_DEC;
2591 if (receivedCmd[0] == 0xC2)
2592 cardSTATE = MFEMUL_INTREG_REST;
2593 cardWRBL = receivedCmd[1];
2594 break;
2595 }
2596 // transfer
2597 if (receivedCmd[0] == 0xB0) {
2598 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2599 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2600 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2601 else
2602 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2603 break;
2604 }
2605 // halt
2606 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2607 LED_B_OFF();
2608 LED_C_OFF();
2609 cardSTATE = MFEMUL_HALTED;
2610 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2611 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2612 break;
2613 }
2614 // RATS
2615 if (receivedCmd[0] == 0xe0) {//RATS
2616 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2617 break;
2618 }
2619 // command not allowed
2620 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2621 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2622 break;
2623 }
2624 case MFEMUL_WRITEBL2:{
2625 if (len == 18){
2626 mf_crypto1_decrypt(pcs, receivedCmd, len);
2627 emlSetMem(receivedCmd, cardWRBL, 1);
2628 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2629 cardSTATE = MFEMUL_WORK;
2630 } else {
2631 cardSTATE_TO_IDLE();
2632 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2633 }
2634 break;
2635 }
2636
2637 case MFEMUL_INTREG_INC:{
2638 mf_crypto1_decrypt(pcs, receivedCmd, len);
2639 memcpy(&ans, receivedCmd, 4);
2640 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2641 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2642 cardSTATE_TO_IDLE();
2643 break;
2644 }
2645 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2646 cardINTREG = cardINTREG + ans;
2647 cardSTATE = MFEMUL_WORK;
2648 break;
2649 }
2650 case MFEMUL_INTREG_DEC:{
2651 mf_crypto1_decrypt(pcs, receivedCmd, len);
2652 memcpy(&ans, receivedCmd, 4);
2653 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2654 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2655 cardSTATE_TO_IDLE();
2656 break;
2657 }
2658 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2659 cardINTREG = cardINTREG - ans;
2660 cardSTATE = MFEMUL_WORK;
2661 break;
2662 }
2663 case MFEMUL_INTREG_REST:{
2664 mf_crypto1_decrypt(pcs, receivedCmd, len);
2665 memcpy(&ans, receivedCmd, 4);
2666 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2667 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2668 cardSTATE_TO_IDLE();
2669 break;
2670 }
2671 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2672 cardSTATE = MFEMUL_WORK;
2673 break;
2674 }
2675 }
2676 }
2677
2678 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2679 LEDsoff();
2680
2681 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2682 {
2683 //May just aswell send the collected ar_nr in the response aswell
2684 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2685 }
2686
2687 if(flags & FLAG_NR_AR_ATTACK)
2688 {
2689 if(ar_nr_collected > 1) {
2690 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2691 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2692 ar_nr_responses[0], // UID
2693 ar_nr_responses[1], //NT
2694 ar_nr_responses[2], //AR1
2695 ar_nr_responses[3], //NR1
2696 ar_nr_responses[6], //AR2
2697 ar_nr_responses[7] //NR2
2698 );
2699 } else {
2700 Dbprintf("Failed to obtain two AR/NR pairs!");
2701 if(ar_nr_collected >0) {
2702 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2703 ar_nr_responses[0], // UID
2704 ar_nr_responses[1], //NT
2705 ar_nr_responses[2], //AR1
2706 ar_nr_responses[3] //NR1
2707 );
2708 }
2709 }
2710 }
2711 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2712 }
2713
2714
2715
2716 //-----------------------------------------------------------------------------
2717 // MIFARE sniffer.
2718 //
2719 //-----------------------------------------------------------------------------
2720 void RAMFUNC SniffMifare(uint8_t param) {
2721 // param:
2722 // bit 0 - trigger from first card answer
2723 // bit 1 - trigger from first reader 7-bit request
2724
2725 // C(red) A(yellow) B(green)
2726 LEDsoff();
2727 // init trace buffer
2728 iso14a_clear_trace();
2729 iso14a_set_tracing(TRUE);
2730
2731 // The command (reader -> tag) that we're receiving.
2732 // The length of a received command will in most cases be no more than 18 bytes.
2733 // So 32 should be enough!
2734 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2735 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
2736 // The response (tag -> reader) that we're receiving.
2737 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2738 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
2739
2740 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2741 // into trace, along with its length and other annotations.
2742 //uint8_t *trace = (uint8_t *)BigBuf;
2743
2744 // The DMA buffer, used to stream samples from the FPGA
2745 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2746 uint8_t *data = dmaBuf;
2747 uint8_t previous_data = 0;
2748 int maxDataLen = 0;
2749 int dataLen = 0;
2750 bool ReaderIsActive = FALSE;
2751 bool TagIsActive = FALSE;
2752
2753 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2754
2755 // Set up the demodulator for tag -> reader responses.
2756 DemodInit(receivedResponse, receivedResponsePar);
2757
2758 // Set up the demodulator for the reader -> tag commands
2759 UartInit(receivedCmd, receivedCmdPar);
2760
2761 // Setup for the DMA.
2762 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2763
2764 LED_D_OFF();
2765
2766 // init sniffer
2767 MfSniffInit();
2768
2769 // And now we loop, receiving samples.
2770 for(uint32_t sniffCounter = 0; TRUE; ) {
2771
2772 if(BUTTON_PRESS()) {
2773 DbpString("cancelled by button");
2774 break;
2775 }
2776
2777 LED_A_ON();
2778 WDT_HIT();
2779
2780 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2781 // check if a transaction is completed (timeout after 2000ms).
2782 // if yes, stop the DMA transfer and send what we have so far to the client
2783 if (MfSniffSend(2000)) {
2784 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2785 sniffCounter = 0;
2786 data = dmaBuf;
2787 maxDataLen = 0;
2788 ReaderIsActive = FALSE;
2789 TagIsActive = FALSE;
2790 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2791 }
2792 }
2793
2794 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2795 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2796 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2797 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2798 } else {
2799 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2800 }
2801 // test for length of buffer
2802 if(dataLen > maxDataLen) { // we are more behind than ever...
2803 maxDataLen = dataLen;
2804 if(dataLen > 400) {
2805 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2806 break;
2807 }
2808 }
2809 if(dataLen < 1) continue;
2810
2811 // primary buffer was stopped ( <-- we lost data!
2812 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2813 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2814 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2815 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2816 }
2817 // secondary buffer sets as primary, secondary buffer was stopped
2818 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2819 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2820 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2821 }
2822
2823 LED_A_OFF();
2824
2825 if (sniffCounter & 0x01) {
2826
2827 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2828 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2829 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2830 LED_C_INV();
2831 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
2832
2833 /* And ready to receive another command. */
2834 UartReset();
2835
2836 /* And also reset the demod code */
2837 DemodReset();
2838 }
2839 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2840 }
2841
2842 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2843 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2844 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2845 LED_C_INV();
2846
2847 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
2848
2849 // And ready to receive another response.
2850 DemodReset();
2851 }
2852 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2853 }
2854 }
2855
2856 previous_data = *data;
2857 sniffCounter++;
2858 data++;
2859 if(data == dmaBuf + DMA_BUFFER_SIZE) {
2860 data = dmaBuf;
2861 }
2862
2863 } // main cycle
2864
2865 DbpString("COMMAND FINISHED");
2866
2867 FpgaDisableSscDma();
2868 MfSniffEnd();
2869
2870 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2871 LEDsoff();
2872 }
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