1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
24 // + 22279: : 0c 03 e8 01
26 // ...with an incorrect answer...
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
30 // We still left the error signalling bytes in the traces like 0xbb
32 // A correct trace should look like this:
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
37 //-----------------------------------------------------------------------------
39 #include "proxmark3.h"
44 // Needed for CRC in emulation mode;
45 // same construction as in ISO 14443;
46 // different initial value (CRC_ICLASS)
47 #include "iso14443crc.h"
49 static int timeout
= 4096;
52 // Sequence D: 11110000 modulation with subcarrier during first half
53 // Sequence E: 00001111 modulation with subcarrier during second half
54 // Sequence F: 00000000 no modulation with subcarrier
56 // Sequence X: 00001100 drop after half a period
57 // Sequence Y: 00000000 no drop
58 // Sequence Z: 11000000 drop at start
63 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
);
65 //-----------------------------------------------------------------------------
66 // The software UART that receives commands from the reader, and its state
68 //-----------------------------------------------------------------------------
72 STATE_START_OF_COMMUNICATION
,
93 static RAMFUNC
int OutOfNDecoding(int bit
)
99 Uart
.bitBuffer
= bit
^ 0xFF0;
103 Uart
.bitBuffer
<<= 4;
104 Uart
.bitBuffer
^= bit
;
108 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
111 if(Uart.byteCnt > 15) { return TRUE; }
117 if(Uart
.state
!= STATE_UNSYNCD
) {
120 if((Uart
.bitBuffer
& Uart
.syncBit
) ^ Uart
.syncBit
) {
126 if(((Uart
.bitBuffer
<< 1) & Uart
.syncBit
) ^ Uart
.syncBit
) {
132 if(bit
!= bitright
) { bit
= bitright
; }
135 // So, now we only have to deal with *bit*, lets see...
136 if(Uart
.posCnt
== 1) {
137 // measurement first half bitperiod
139 // Drop in first half means that we are either seeing
142 if(Uart
.nOutOfCnt
== 1) {
143 // End of Communication
144 Uart
.state
= STATE_UNSYNCD
;
146 if(Uart
.byteCnt
== 0) {
147 // Its not straightforward to show single EOFs
148 // So just leave it and do not return TRUE
149 Uart
.output
[Uart
.byteCnt
] = 0xf0;
152 // Calculate the parity bit for the client...
159 else if(Uart
.state
!= STATE_START_OF_COMMUNICATION
) {
160 // When not part of SOF or EOF, it is an error
161 Uart
.state
= STATE_UNSYNCD
;
168 // measurement second half bitperiod
169 // Count the bitslot we are in... (ISO 15693)
173 if(Uart
.dropPosition
) {
174 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
180 // It is an error if we already have seen a drop in current frame
181 Uart
.state
= STATE_UNSYNCD
;
185 Uart
.dropPosition
= Uart
.nOutOfCnt
;
192 if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
&& Uart
.OutOfCnt
== 4) {
195 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
196 if(Uart
.dropPosition
== 4) {
197 Uart
.state
= STATE_RECEIVING
;
200 else if(Uart
.dropPosition
== 3) {
201 Uart
.state
= STATE_RECEIVING
;
203 //Uart.output[Uart.byteCnt] = 0xdd;
207 Uart
.state
= STATE_UNSYNCD
;
210 Uart
.dropPosition
= 0;
215 if(!Uart
.dropPosition
) {
216 Uart
.state
= STATE_UNSYNCD
;
225 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
226 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
228 Uart
.shiftReg
^= ((Uart
.dropPosition
& 0x03) << 6);
230 Uart
.dropPosition
= 0;
232 if(Uart
.bitCnt
== 8) {
233 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
& 0xff);
236 // Calculate the parity bit for the client...
237 Uart
.parityBits
<<= 1;
238 Uart
.parityBits
^= OddByteParity
[(Uart
.shiftReg
& 0xff)];
246 else if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
) {
249 if(!Uart
.dropPosition
) {
250 Uart
.state
= STATE_UNSYNCD
;
256 Uart
.output
[Uart
.byteCnt
] = (Uart
.dropPosition
& 0xff);
259 // Calculate the parity bit for the client...
260 Uart
.parityBits
<<= 1;
261 Uart
.parityBits
^= OddByteParity
[(Uart
.dropPosition
& 0xff)];
266 Uart
.dropPosition
= 0;
271 Uart.output[Uart.byteCnt] = 0xAA;
273 Uart.output[Uart.byteCnt] = error & 0xFF;
275 Uart.output[Uart.byteCnt] = 0xAA;
277 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
279 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
281 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
283 Uart.output[Uart.byteCnt] = 0xAA;
291 bit
= Uart
.bitBuffer
& 0xf0;
293 bit
^= 0x0F; // drops become 1s ;-)
295 // should have been high or at least (4 * 128) / fc
296 // according to ISO this should be at least (9 * 128 + 20) / fc
297 if(Uart
.highCnt
== 8) {
298 // we went low, so this could be start of communication
299 // it turns out to be safer to choose a less significant
300 // syncbit... so we check whether the neighbour also represents the drop
301 Uart
.posCnt
= 1; // apparently we are busy with our first half bit period
302 Uart
.syncBit
= bit
& 8;
304 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; }
305 else if(bit
& 4) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; bit
<<= 2; }
306 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; }
307 else if(bit
& 2) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; bit
<<= 1; }
308 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0;
309 if(Uart
.syncBit
&& (Uart
.bitBuffer
& 8)) {
312 // the first half bit period is expected in next sample
317 else if(bit
& 1) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0; }
320 Uart
.state
= STATE_START_OF_COMMUNICATION
;
325 Uart
.OutOfCnt
= 4; // Start at 1/4, could switch to 1/256
326 Uart
.dropPosition
= 0;
335 if(Uart
.highCnt
< 8) {
344 //=============================================================================
346 //=============================================================================
351 DEMOD_START_OF_COMMUNICATION
,
352 DEMOD_START_OF_COMMUNICATION2
,
353 DEMOD_START_OF_COMMUNICATION3
,
357 DEMOD_END_OF_COMMUNICATION
,
358 DEMOD_END_OF_COMMUNICATION2
,
382 static RAMFUNC
int ManchesterDecoding(int v
)
389 Demod
.buffer
= Demod
.buffer2
;
390 Demod
.buffer2
= Demod
.buffer3
;
398 if(Demod
.state
==DEMOD_UNSYNCD
) {
399 Demod
.output
[Demod
.len
] = 0xfa;
402 Demod
.posCount
= 1; // This is the first half bit period, so after syncing handle the second part
405 Demod
.syncBit
= 0x08;
412 Demod
.syncBit
= 0x04;
419 Demod
.syncBit
= 0x02;
422 if(bit
& 0x01 && Demod
.syncBit
) {
423 Demod
.syncBit
= 0x01;
428 Demod
.state
= DEMOD_START_OF_COMMUNICATION
;
429 Demod
.sub
= SUB_FIRST_HALF
;
432 Demod
.parityBits
= 0;
435 //if(trigger) LED_A_OFF(); // Not useful in this case...
436 switch(Demod
.syncBit
) {
437 case 0x08: Demod
.samples
= 3; break;
438 case 0x04: Demod
.samples
= 2; break;
439 case 0x02: Demod
.samples
= 1; break;
440 case 0x01: Demod
.samples
= 0; break;
442 // SOF must be long burst... otherwise stay unsynced!!!
443 if(!(Demod
.buffer
& Demod
.syncBit
) || !(Demod
.buffer2
& Demod
.syncBit
)) {
444 Demod
.state
= DEMOD_UNSYNCD
;
448 // SOF must be long burst... otherwise stay unsynced!!!
449 if(!(Demod
.buffer2
& Demod
.syncBit
) || !(Demod
.buffer3
& Demod
.syncBit
)) {
450 Demod
.state
= DEMOD_UNSYNCD
;
460 modulation
= bit
& Demod
.syncBit
;
461 modulation
|= ((bit
<< 1) ^ ((Demod
.buffer
& 0x08) >> 3)) & Demod
.syncBit
;
462 //modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
466 if(Demod
.posCount
==0) {
469 Demod
.sub
= SUB_FIRST_HALF
;
472 Demod
.sub
= SUB_NONE
;
477 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
478 if(Demod.state!=DEMOD_ERROR_WAIT) {
479 Demod.state = DEMOD_ERROR_WAIT;
480 Demod.output[Demod.len] = 0xaa;
484 //else if(modulation) {
486 if(Demod
.sub
== SUB_FIRST_HALF
) {
487 Demod
.sub
= SUB_BOTH
;
490 Demod
.sub
= SUB_SECOND_HALF
;
493 else if(Demod
.sub
== SUB_NONE
) {
494 if(Demod
.state
== DEMOD_SOF_COMPLETE
) {
495 Demod
.output
[Demod
.len
] = 0x0f;
497 Demod
.parityBits
<<= 1;
498 Demod
.parityBits
^= OddByteParity
[0x0f];
499 Demod
.state
= DEMOD_UNSYNCD
;
504 Demod
.state
= DEMOD_ERROR_WAIT
;
507 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
508 Demod.state = DEMOD_ERROR_WAIT;
509 Demod.output[Demod.len] = 0xaa;
514 switch(Demod
.state
) {
515 case DEMOD_START_OF_COMMUNICATION
:
516 if(Demod
.sub
== SUB_BOTH
) {
517 //Demod.state = DEMOD_MANCHESTER_D;
518 Demod
.state
= DEMOD_START_OF_COMMUNICATION2
;
520 Demod
.sub
= SUB_NONE
;
523 Demod
.output
[Demod
.len
] = 0xab;
524 Demod
.state
= DEMOD_ERROR_WAIT
;
528 case DEMOD_START_OF_COMMUNICATION2
:
529 if(Demod
.sub
== SUB_SECOND_HALF
) {
530 Demod
.state
= DEMOD_START_OF_COMMUNICATION3
;
533 Demod
.output
[Demod
.len
] = 0xab;
534 Demod
.state
= DEMOD_ERROR_WAIT
;
538 case DEMOD_START_OF_COMMUNICATION3
:
539 if(Demod
.sub
== SUB_SECOND_HALF
) {
540 // Demod.state = DEMOD_MANCHESTER_D;
541 Demod
.state
= DEMOD_SOF_COMPLETE
;
542 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
546 Demod
.output
[Demod
.len
] = 0xab;
547 Demod
.state
= DEMOD_ERROR_WAIT
;
551 case DEMOD_SOF_COMPLETE
:
552 case DEMOD_MANCHESTER_D
:
553 case DEMOD_MANCHESTER_E
:
554 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
555 // 00001111 = 1 (0 in 14443)
556 if(Demod
.sub
== SUB_SECOND_HALF
) { // SUB_FIRST_HALF
558 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) ^ 0x100;
559 Demod
.state
= DEMOD_MANCHESTER_D
;
561 else if(Demod
.sub
== SUB_FIRST_HALF
) { // SUB_SECOND_HALF
563 Demod
.shiftReg
>>= 1;
564 Demod
.state
= DEMOD_MANCHESTER_E
;
566 else if(Demod
.sub
== SUB_BOTH
) {
567 Demod
.state
= DEMOD_MANCHESTER_F
;
570 Demod
.state
= DEMOD_ERROR_WAIT
;
575 case DEMOD_MANCHESTER_F
:
576 // Tag response does not need to be a complete byte!
577 if(Demod
.len
> 0 || Demod
.bitCount
> 0) {
578 if(Demod
.bitCount
> 1) { // was > 0, do not interpret last closing bit, is part of EOF
579 Demod
.shiftReg
>>= (9 - Demod
.bitCount
);
580 Demod
.output
[Demod
.len
] = Demod
.shiftReg
& 0xff;
582 // No parity bit, so just shift a 0
583 Demod
.parityBits
<<= 1;
586 Demod
.state
= DEMOD_UNSYNCD
;
590 Demod
.output
[Demod
.len
] = 0xad;
591 Demod
.state
= DEMOD_ERROR_WAIT
;
596 case DEMOD_ERROR_WAIT
:
597 Demod
.state
= DEMOD_UNSYNCD
;
601 Demod
.output
[Demod
.len
] = 0xdd;
602 Demod
.state
= DEMOD_UNSYNCD
;
606 /*if(Demod.bitCount>=9) {
607 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
610 Demod.parityBits <<= 1;
611 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
616 if(Demod
.bitCount
>=8) {
617 Demod
.shiftReg
>>= 1;
618 Demod
.output
[Demod
.len
] = (Demod
.shiftReg
& 0xff);
621 // FOR ISO15639 PARITY NOT SEND OTA, JUST CALCULATE IT FOR THE CLIENT
622 Demod
.parityBits
<<= 1;
623 Demod
.parityBits
^= OddByteParity
[(Demod
.shiftReg
& 0xff)];
630 Demod
.output
[Demod
.len
] = 0xBB;
632 Demod
.output
[Demod
.len
] = error
& 0xFF;
634 Demod
.output
[Demod
.len
] = 0xBB;
636 Demod
.output
[Demod
.len
] = bit
& 0xFF;
638 Demod
.output
[Demod
.len
] = Demod
.buffer
& 0xFF;
641 Demod
.output
[Demod
.len
] = Demod
.buffer2
& 0xFF;
643 Demod
.output
[Demod
.len
] = Demod
.syncBit
& 0xFF;
645 Demod
.output
[Demod
.len
] = 0xBB;
652 } // end (state != UNSYNCED)
657 //=============================================================================
658 // Finally, a `sniffer' for iClass communication
659 // Both sides of communication!
660 //=============================================================================
662 //-----------------------------------------------------------------------------
663 // Record the sequence of commands sent by the reader to the tag, with
664 // triggering so that we start recording at the point that the tag is moved
666 //-----------------------------------------------------------------------------
667 void RAMFUNC
SnoopIClass(void)
670 // #define RECV_CMD_OFFSET 3032
671 // #define RECV_RES_OFFSET 3096
672 // #define DMA_BUFFER_OFFSET 3160
673 // #define DMA_BUFFER_SIZE 4096
674 // #define TRACE_SIZE 3000
676 // We won't start recording the frames that we acquire until we trigger;
677 // a good trigger condition to get started is probably when we see a
678 // response from the tag.
679 //int triggered = FALSE; // FALSE to wait first for card
681 // The command (reader -> tag) that we're receiving.
682 // The length of a received command will in most cases be no more than 18 bytes.
683 // So 32 should be enough!
684 uint8_t *receivedCmd
= (((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
);
685 // The response (tag -> reader) that we're receiving.
686 uint8_t *receivedResponse
= (((uint8_t *)BigBuf
) + RECV_RES_OFFSET
);
688 // As we receive stuff, we copy it from receivedCmd or receivedResponse
689 // into trace, along with its length and other annotations.
690 //uint8_t *trace = (uint8_t *)BigBuf;
692 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
694 // reset traceLen to 0
695 iso14a_set_tracing(TRUE
);
696 iso14a_clear_trace();
697 iso14a_set_trigger(FALSE
);
699 // The DMA buffer, used to stream samples from the FPGA
700 int8_t *dmaBuf
= ((int8_t *)BigBuf
) + DMA_BUFFER_OFFSET
;
706 // Count of samples received so far, so that we can include timing
707 // information in the trace buffer.
711 memset(trace
, 0x44, RECV_CMD_OFFSET
);
713 // Set up the demodulator for tag -> reader responses.
714 Demod
.output
= receivedResponse
;
716 Demod
.state
= DEMOD_UNSYNCD
;
718 // Setup for the DMA.
721 lastRxCounter
= DMA_BUFFER_SIZE
;
722 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
724 // And the reader -> tag commands
725 memset(&Uart
, 0, sizeof(Uart
));
726 Uart
.output
= receivedCmd
;
727 Uart
.byteCntMax
= 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
728 Uart
.state
= STATE_UNSYNCD
;
730 // And put the FPGA in the appropriate mode
731 // Signal field is off with the appropriate LED
733 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_SNIFFER
);
734 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
741 // And now we loop, receiving samples.
745 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
747 if(behindBy
> maxBehindBy
) {
748 maxBehindBy
= behindBy
;
750 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy
);
754 if(behindBy
< 1) continue;
760 if(upTo
- dmaBuf
> DMA_BUFFER_SIZE
) {
761 upTo
-= DMA_BUFFER_SIZE
;
762 lastRxCounter
+= DMA_BUFFER_SIZE
;
763 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
764 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
773 //decbyte ^= ((smpl & 0x01) << (3 - div));
774 //decbyte ^= (((smpl & 0x01) | ((smpl & 0x02) >> 1)) << (3 - div)); // better already...
775 //decbyte ^= (((smpl & 0x01) | ((smpl & 0x02) >> 1) | ((smpl & 0x04) >> 2)) << (3 - div)); // even better...
777 decbyte
^= (1 << (3 - div
));
779 //decbyte ^= (MajorityNibble[(smpl & 0x0F)] << (3 - div));
781 // FOR READER SIDE COMMUMICATION...
782 //decbyte ^= ((smpl & 0x10) << (3 - div));
784 decbyter
^= (smpl
& 0x30);
788 if((div
+ 1) % 2 == 0) {
790 if(OutOfNDecoding((smpl
& 0xF0) >> 4)) {
791 rsamples
= samples
- Uart
.samples
;
794 trace
[traceLen
++] = ((rsamples
>> 0) & 0xff);
795 trace
[traceLen
++] = ((rsamples
>> 8) & 0xff);
796 trace
[traceLen
++] = ((rsamples
>> 16) & 0xff);
797 trace
[traceLen
++] = ((rsamples
>> 24) & 0xff);
798 trace
[traceLen
++] = ((Uart
.parityBits
>> 0) & 0xff);
799 trace
[traceLen
++] = ((Uart
.parityBits
>> 8) & 0xff);
800 trace
[traceLen
++] = ((Uart
.parityBits
>> 16) & 0xff);
801 trace
[traceLen
++] = ((Uart
.parityBits
>> 24) & 0xff);
802 trace
[traceLen
++] = Uart
.byteCnt
;
803 memcpy(trace
+traceLen
, receivedCmd
, Uart
.byteCnt
);
804 traceLen
+= Uart
.byteCnt
;
805 if(traceLen
> TRACE_SIZE
) break;
807 /* And ready to receive another command. */
808 Uart
.state
= STATE_UNSYNCD
;
809 /* And also reset the demod code, which might have been */
810 /* false-triggered by the commands from the reader. */
811 Demod
.state
= DEMOD_UNSYNCD
;
820 if(ManchesterDecoding(smpl
& 0x0F)) {
821 rsamples
= samples
- Demod
.samples
;
824 // timestamp, as a count of samples
825 trace
[traceLen
++] = ((rsamples
>> 0) & 0xff);
826 trace
[traceLen
++] = ((rsamples
>> 8) & 0xff);
827 trace
[traceLen
++] = ((rsamples
>> 16) & 0xff);
828 trace
[traceLen
++] = 0x80 | ((rsamples
>> 24) & 0xff);
829 trace
[traceLen
++] = ((Demod
.parityBits
>> 0) & 0xff);
830 trace
[traceLen
++] = ((Demod
.parityBits
>> 8) & 0xff);
831 trace
[traceLen
++] = ((Demod
.parityBits
>> 16) & 0xff);
832 trace
[traceLen
++] = ((Demod
.parityBits
>> 24) & 0xff);
834 trace
[traceLen
++] = Demod
.len
;
835 memcpy(trace
+traceLen
, receivedResponse
, Demod
.len
);
836 traceLen
+= Demod
.len
;
837 if(traceLen
> TRACE_SIZE
) break;
841 // And ready to receive another response.
842 memset(&Demod
, 0, sizeof(Demod
));
843 Demod
.output
= receivedResponse
;
844 Demod
.state
= DEMOD_UNSYNCD
;
854 DbpString("cancelled_a");
859 DbpString("COMMAND FINISHED");
861 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
862 Dbprintf("%x %x %x", Uart
.byteCntMax
, traceLen
, (int)Uart
.output
[0]);
865 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
866 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
867 Dbprintf("%x %x %x", Uart
.byteCntMax
, traceLen
, (int)Uart
.output
[0]);
874 void rotateCSN(uint8_t* originalCSN
, uint8_t* rotatedCSN
) {
876 for(i
= 0; i
< 8; i
++) {
877 rotatedCSN
[i
] = (originalCSN
[i
] >> 3) | (originalCSN
[(i
+1)%8] << 5);
881 //-----------------------------------------------------------------------------
882 // Wait for commands from reader
883 // Stop when button is pressed
884 // Or return TRUE when command is captured
885 //-----------------------------------------------------------------------------
886 static int GetIClassCommandFromReader(uint8_t *received
, int *len
, int maxLen
)
888 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
889 // only, since we are receiving, not transmitting).
890 // Signal field is off with the appropriate LED
892 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
894 // Now run a `software UART' on the stream of incoming samples.
895 Uart
.output
= received
;
896 Uart
.byteCntMax
= maxLen
;
897 Uart
.state
= STATE_UNSYNCD
;
902 if(BUTTON_PRESS()) return FALSE
;
904 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
905 AT91C_BASE_SSC
->SSC_THR
= 0x00;
907 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
908 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
909 /*if(OutOfNDecoding((b & 0xf0) >> 4)) {
913 if(OutOfNDecoding(b
& 0x0f)) {
922 //-----------------------------------------------------------------------------
923 // Prepare tag messages
924 //-----------------------------------------------------------------------------
925 static void CodeIClassTagAnswer(const uint8_t *cmd
, int len
)
932 ToSend
[++ToSendMax
] = 0x00;
933 ToSend
[++ToSendMax
] = 0x00;
934 ToSend
[++ToSendMax
] = 0x00;
935 ToSend
[++ToSendMax
] = 0xff;
936 ToSend
[++ToSendMax
] = 0xff;
937 ToSend
[++ToSendMax
] = 0xff;
938 ToSend
[++ToSendMax
] = 0x00;
939 ToSend
[++ToSendMax
] = 0xff;
941 for(i
= 0; i
< len
; i
++) {
946 for(j
= 0; j
< 8; j
++) {
948 ToSend
[++ToSendMax
] = 0x00;
949 ToSend
[++ToSendMax
] = 0xff;
951 ToSend
[++ToSendMax
] = 0xff;
952 ToSend
[++ToSendMax
] = 0x00;
959 ToSend
[++ToSendMax
] = 0xff;
960 ToSend
[++ToSendMax
] = 0x00;
961 ToSend
[++ToSendMax
] = 0xff;
962 ToSend
[++ToSendMax
] = 0xff;
963 ToSend
[++ToSendMax
] = 0xff;
964 ToSend
[++ToSendMax
] = 0x00;
965 ToSend
[++ToSendMax
] = 0x00;
966 ToSend
[++ToSendMax
] = 0x00;
968 // Convert from last byte pos to length
973 static void CodeIClassTagSOF()
978 ToSend
[++ToSendMax
] = 0x00;
979 ToSend
[++ToSendMax
] = 0x00;
980 ToSend
[++ToSendMax
] = 0x00;
981 ToSend
[++ToSendMax
] = 0xff;
982 ToSend
[++ToSendMax
] = 0xff;
983 ToSend
[++ToSendMax
] = 0xff;
984 ToSend
[++ToSendMax
] = 0x00;
985 ToSend
[++ToSendMax
] = 0xff;
987 // Convert from last byte pos to length
991 //-----------------------------------------------------------------------------
992 // Simulate iClass Card
993 // Only CSN (Card Serial Number)
995 //-----------------------------------------------------------------------------
996 void SimulateIClass(uint8_t arg0
, uint8_t *datain
)
998 uint8_t simType
= arg0
;
1000 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1002 // Enable and clear the trace
1005 memset(trace
, 0x44, TRACE_SIZE
);
1007 // CSN followed by two CRC bytes
1008 uint8_t response2
[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1009 uint8_t response3
[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1012 uint8_t response4
[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1015 // Use the CSN from commandline
1016 memcpy(response3
, datain
, 8);
1019 // Construct anticollision-CSN
1020 rotateCSN(response3
,response2
);
1022 // Compute CRC on both CSNs
1023 ComputeCrc14443(CRC_ICLASS
, response2
, 8, &response2
[8], &response2
[9]);
1024 ComputeCrc14443(CRC_ICLASS
, response3
, 8, &response3
[8], &response3
[9]);
1029 // Tag anticoll. CSN
1030 // Reader 81 anticoll. CSN
1035 uint8_t* respdata
= NULL
;
1039 // Respond SOF -- takes 8 bytes
1040 uint8_t *resp1
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
);
1043 // Anticollision CSN (rotated CSN)
1044 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
1045 uint8_t *resp2
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 10);
1049 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
1050 uint8_t *resp3
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 190);
1054 // 144: Takes 16 bytes for SOF/EOF and 8 * 16 = 128 bytes (2 bytes/bit)
1055 uint8_t *resp4
= (((uint8_t *)BigBuf
) + FREE_BUFFER_OFFSET
+ 370);
1059 uint8_t *receivedCmd
= (((uint8_t *)BigBuf
) + RECV_CMD_OFFSET
);
1060 memset(receivedCmd
, 0x44, RECV_CMD_SIZE
);
1063 // Prepare card messages
1066 // First card answer: SOF
1068 memcpy(resp1
, ToSend
, ToSendMax
); resp1Len
= ToSendMax
;
1070 // Anticollision CSN
1071 CodeIClassTagAnswer(response2
, sizeof(response2
));
1072 memcpy(resp2
, ToSend
, ToSendMax
); resp2Len
= ToSendMax
;
1075 CodeIClassTagAnswer(response3
, sizeof(response3
));
1076 memcpy(resp3
, ToSend
, ToSendMax
); resp3Len
= ToSendMax
;
1079 CodeIClassTagAnswer(response4
, sizeof(response4
));
1080 memcpy(resp4
, ToSend
, ToSendMax
); resp4Len
= ToSendMax
;
1083 // Start from off (no field generated)
1084 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1088 // We need to listen to the high-frequency, peak-detected path.
1089 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1092 // To control where we are in the protocol
1099 // Can be used to get a trigger for an oscilloscope..
1102 if(!GetIClassCommandFromReader(receivedCmd
, &len
, 100)) {
1103 DbpString("button press");
1110 // Okay, look at the command now.
1111 if(receivedCmd
[0] == 0x0a) {
1112 // Reader in anticollission phase
1113 resp
= resp1
; respLen
= resp1Len
; //order = 1;
1115 respsize
= sizeof(sof
);
1116 //resp = resp2; respLen = resp2Len; order = 2;
1117 //DbpString("Hello request from reader:");
1118 } else if(receivedCmd
[0] == 0x0c) {
1119 // Reader asks for anticollission CSN
1120 resp
= resp2
; respLen
= resp2Len
; //order = 2;
1121 respdata
= response2
;
1122 respsize
= sizeof(response2
);
1123 //DbpString("Reader requests anticollission CSN:");
1124 } else if(receivedCmd
[0] == 0x81) {
1125 // Reader selects anticollission CSN.
1126 // Tag sends the corresponding real CSN
1127 resp
= resp3
; respLen
= resp3Len
; //order = 3;
1128 respdata
= response3
;
1129 respsize
= sizeof(response3
);
1130 //DbpString("Reader selects anticollission CSN:");
1131 } else if(receivedCmd
[0] == 0x88) {
1132 // Read e-purse (88 02)
1133 resp
= resp4
; respLen
= resp4Len
; //order = 4;
1134 respdata
= response4
;
1135 respsize
= sizeof(response4
);
1137 } else if(receivedCmd
[0] == 0x05) {
1138 // Reader random and reader MAC!!!
1139 // Lets store this ;-)
1141 Dbprintf(" CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1142 response3[0], response3[1], response3[2],
1143 response3[3], response3[4], response3[5],
1144 response3[6], response3[7]);
1146 Dbprintf("READER AUTH (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",
1148 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1149 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1150 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1153 // We do not know what to answer, so lets keep quit
1154 resp
= resp1
; respLen
= 0; //order = 5;
1157 } else if(receivedCmd
[0] == 0x00 && len
== 1) {
1158 // Reader ends the session
1159 resp
= resp1
; respLen
= 0; //order = 0;
1163 // Never seen this command before
1164 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1166 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1167 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1168 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1170 resp
= resp1
; respLen
= 0; //order = 0;
1175 if(cmdsRecvd
> 999) {
1176 DbpString("1000 commands later...");
1184 SendIClassAnswer(resp
, respLen
, 21);
1188 LogTrace(receivedCmd
,len
, rsamples
, Uart
.parityBits
, TRUE
);
1189 if (respdata
!= NULL
) {
1190 LogTrace(respdata
,respsize
, rsamples
, SwapBits(GetParity(respdata
,respsize
),respsize
), FALSE
);
1192 if(traceLen
> TRACE_SIZE
) {
1193 DbpString("Trace full");
1198 memset(receivedCmd
, 0x44, RECV_CMD_SIZE
);
1201 Dbprintf("%x", cmdsRecvd
);
1206 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
)
1208 int i
= 0, d
=0;//, u = 0, d = 0;
1211 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
|FPGA_HF_SIMULATOR_MODULATE_424K
);
1213 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1215 while(!BUTTON_PRESS()) {
1216 if((AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
)){
1217 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1219 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)){
1232 AT91C_BASE_SSC
->SSC_THR
= b
;
1235 if (i
> respLen
+4) break;
1243 //-----------------------------------------------------------------------------
1244 // Transmit the command (to the tag) that was placed in ToSend[].
1245 //-----------------------------------------------------------------------------
1246 static void TransmitIClassCommand(const uint8_t *cmd
, int len
, int *samples
, int *wait
)
1249 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1250 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1257 for(c
= 0; c
< *wait
;) {
1258 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1259 AT91C_BASE_SSC
->SSC_THR
= 0x00; // For exact timing!
1262 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1263 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1270 bool firstpart
= TRUE
;
1273 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1275 // DOUBLE THE SAMPLES!
1277 sendbyte
= (cmd
[c
] & 0xf0) | (cmd
[c
] >> 4);
1280 sendbyte
= (cmd
[c
] & 0x0f) | (cmd
[c
] << 4);
1283 if(sendbyte
== 0xff) {
1286 AT91C_BASE_SSC
->SSC_THR
= sendbyte
;
1287 firstpart
= !firstpart
;
1293 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1294 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1299 if (samples
) *samples
= (c
+ *wait
) << 3;
1303 //-----------------------------------------------------------------------------
1304 // Prepare iClass reader command to send to FPGA
1305 //-----------------------------------------------------------------------------
1306 void CodeIClassCommand(const uint8_t * cmd
, int len
)
1313 // Start of Communication: 1 out of 4
1314 ToSend
[++ToSendMax
] = 0xf0;
1315 ToSend
[++ToSendMax
] = 0x00;
1316 ToSend
[++ToSendMax
] = 0x0f;
1317 ToSend
[++ToSendMax
] = 0x00;
1319 // Modulate the bytes
1320 for (i
= 0; i
< len
; i
++) {
1322 for(j
= 0; j
< 4; j
++) {
1323 for(k
= 0; k
< 4; k
++) {
1325 ToSend
[++ToSendMax
] = 0x0f;
1328 ToSend
[++ToSendMax
] = 0x00;
1335 // End of Communication
1336 ToSend
[++ToSendMax
] = 0x00;
1337 ToSend
[++ToSendMax
] = 0x00;
1338 ToSend
[++ToSendMax
] = 0xf0;
1339 ToSend
[++ToSendMax
] = 0x00;
1341 // Convert from last character reference to length
1345 void ReaderTransmitIClass(uint8_t* frame
, int len
)
1351 // This is tied to other size changes
1352 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1353 CodeIClassCommand(frame
,len
);
1356 TransmitIClassCommand(ToSend
, ToSendMax
, &samples
, &wait
);
1360 // Store reader command in buffer
1361 if (tracing
) LogTrace(frame
,len
,rsamples
,par
,TRUE
);
1364 //-----------------------------------------------------------------------------
1365 // Wait a certain time for tag response
1366 // If a response is captured return TRUE
1367 // If it takes too long return FALSE
1368 //-----------------------------------------------------------------------------
1369 static int GetIClassAnswer(uint8_t *receivedResponse
, int maxLen
, int *samples
, int *elapsed
) //uint8_t *buffer
1371 // buffer needs to be 512 bytes
1374 // Set FPGA mode to "reader listen mode", no modulation (listen
1375 // only, since we are receiving, not transmitting).
1376 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1378 // Now get the answer from the card
1379 Demod
.output
= receivedResponse
;
1381 Demod
.state
= DEMOD_UNSYNCD
;
1384 if (elapsed
) *elapsed
= 0;
1392 if(BUTTON_PRESS()) return FALSE
;
1394 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1395 AT91C_BASE_SSC
->SSC_THR
= 0x00; // To make use of exact timing of next command from reader!!
1396 if (elapsed
) (*elapsed
)++;
1398 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1399 if(c
< timeout
) { c
++; } else { return FALSE
; }
1400 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1403 /*if(ManchesterDecoding((b>>4) & 0xf)) {
1404 *samples = ((c - 1) << 3) + 4;
1407 if(ManchesterDecoding(b
& 0x0f)) {
1415 int ReaderReceiveIClass(uint8_t* receivedAnswer
)
1418 if (!GetIClassAnswer(receivedAnswer
,160,&samples
,0)) return FALSE
;
1419 rsamples
+= samples
;
1420 if (tracing
) LogTrace(receivedAnswer
,Demod
.len
,rsamples
,Demod
.parityBits
,FALSE
);
1421 if(samples
== 0) return FALSE
;
1425 // Reader iClass Anticollission
1426 void ReaderIClass(uint8_t arg0
) {
1427 uint8_t act_all
[] = { 0x0a };
1428 uint8_t identify
[] = { 0x0c };
1429 uint8_t select
[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1431 uint8_t* resp
= (((uint8_t *)BigBuf
) + 3560); // was 3560 - tied to other size changes
1433 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1435 // Reset trace buffer
1436 memset(trace
, 0x44, RECV_CMD_OFFSET
);
1441 // Start from off (no field generated)
1442 // Signal field is off with the appropriate LED
1444 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1447 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1449 // Now give it time to spin up.
1450 // Signal field is on with the appropriate LED
1451 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1458 if(traceLen
> TRACE_SIZE
) {
1459 DbpString("Trace full");
1463 if (BUTTON_PRESS()) break;
1466 ReaderTransmitIClass(act_all
, 1);
1468 if(ReaderReceiveIClass(resp
)) {
1469 ReaderTransmitIClass(identify
, 1);
1470 if(ReaderReceiveIClass(resp
) == 10) {
1472 memcpy(&select
[1],resp
,8);
1473 ReaderTransmitIClass(select
, sizeof(select
));
1475 if(ReaderReceiveIClass(resp
) == 10) {
1476 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1477 resp
[0], resp
[1], resp
[2],
1478 resp
[3], resp
[4], resp
[5],
1481 // Card selected, whats next... ;-)