1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "proxmark3.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1/crapto1.h"
21 #include "mifareutil.h"
23 #include "protocols.h"
27 static uint32_t iso14a_timeout
;
30 // the block number for the ISO14443-4 PCB
31 static uint8_t iso14_pcb_blocknum
= 0;
36 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37 #define REQUEST_GUARD_TIME (7000/16 + 1)
38 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40 // bool LastCommandWasRequest = FALSE;
43 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
45 // When the PM acts as reader and is receiving tag data, it takes
46 // 3 ticks delay in the AD converter
47 // 16 ticks until the modulation detector completes and sets curbit
48 // 8 ticks until bit_to_arm is assigned from curbit
49 // 8*16 ticks for the transfer from FPGA to ARM
50 // 4*16 ticks until we measure the time
51 // - 8*16 ticks because we measure the time of the previous transfer
52 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
54 // When the PM acts as a reader and is sending, it takes
55 // 4*16 ticks until we can write data to the sending hold register
56 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
57 // 8 ticks until the first transfer starts
58 // 8 ticks later the FPGA samples the data
59 // 1 tick to assign mod_sig_coil
60 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
62 // When the PM acts as tag and is receiving it takes
63 // 2 ticks delay in the RF part (for the first falling edge),
64 // 3 ticks for the A/D conversion,
65 // 8 ticks on average until the start of the SSC transfer,
66 // 8 ticks until the SSC samples the first data
67 // 7*16 ticks to complete the transfer from FPGA to ARM
68 // 8 ticks until the next ssp_clk rising edge
69 // 4*16 ticks until we measure the time
70 // - 8*16 ticks because we measure the time of the previous transfer
71 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
73 // The FPGA will report its internal sending delay in
74 uint16_t FpgaSendQueueDelay
;
75 // the 5 first bits are the number of bits buffered in mod_sig_buf
76 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
77 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
79 // When the PM acts as tag and is sending, it takes
80 // 4*16 ticks until we can write data to the sending hold register
81 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
82 // 8 ticks until the first transfer starts
83 // 8 ticks later the FPGA samples the data
84 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
85 // + 1 tick to assign mod_sig_coil
86 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
88 // When the PM acts as sniffer and is receiving tag data, it takes
89 // 3 ticks A/D conversion
90 // 14 ticks to complete the modulation detection
91 // 8 ticks (on average) until the result is stored in to_arm
92 // + the delays in transferring data - which is the same for
93 // sniffing reader and tag data and therefore not relevant
94 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
96 // When the PM acts as sniffer and is receiving reader data, it takes
97 // 2 ticks delay in analogue RF receiver (for the falling edge of the
98 // start bit, which marks the start of the communication)
99 // 3 ticks A/D conversion
100 // 8 ticks on average until the data is stored in to_arm.
101 // + the delays in transferring data - which is the same for
102 // sniffing reader and tag data and therefore not relevant
103 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
105 //variables used for timing purposes:
106 //these are in ssp_clk cycles:
107 static uint32_t NextTransferTime
;
108 static uint32_t LastTimeProxToAirStart
;
109 static uint32_t LastProxToAirDuration
;
113 // CARD TO READER - manchester
114 // Sequence D: 11110000 modulation with subcarrier during first half
115 // Sequence E: 00001111 modulation with subcarrier during second half
116 // Sequence F: 00000000 no modulation with subcarrier
117 // READER TO CARD - miller
118 // Sequence X: 00001100 drop after half a period
119 // Sequence Y: 00000000 no drop
120 // Sequence Z: 11000000 drop at start
129 void iso14a_set_trigger(bool enable
) {
134 void iso14a_set_timeout(uint32_t timeout
) {
135 iso14a_timeout
= timeout
;
136 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout
, iso14a_timeout
/ 106);
140 void iso14a_set_ATS_timeout(uint8_t *ats
) {
146 if (ats
[0] > 1) { // there is a format byte T0
147 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
148 if ((ats
[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
153 fwi
= (tb1
& 0xf0) >> 4; // frame waiting indicator (FWI)
154 fwt
= 256 * 16 * (1 << fwi
); // frame waiting time (FWT) in 1/fc
156 iso14a_set_timeout(fwt
/(8*16));
162 //-----------------------------------------------------------------------------
163 // Generate the parity value for a byte sequence
165 //-----------------------------------------------------------------------------
166 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
168 uint16_t paritybit_cnt
= 0;
169 uint16_t paritybyte_cnt
= 0;
170 uint8_t parityBits
= 0;
172 for (uint16_t i
= 0; i
< iLen
; i
++) {
173 // Generate the parity bits
174 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
175 if (paritybit_cnt
== 7) {
176 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
177 parityBits
= 0; // and advance to next Parity Byte
185 // save remaining parity bits
186 par
[paritybyte_cnt
] = parityBits
;
190 void AppendCrc14443a(uint8_t* data
, int len
)
192 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
195 void AppendCrc14443b(uint8_t* data
, int len
)
197 ComputeCrc14443(CRC_14443_B
,data
,len
,data
+len
,data
+len
+1);
201 //=============================================================================
202 // ISO 14443 Type A - Miller decoder
203 //=============================================================================
205 // This decoder is used when the PM3 acts as a tag.
206 // The reader will generate "pauses" by temporarily switching of the field.
207 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
208 // The FPGA does a comparison with a threshold and would deliver e.g.:
209 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
210 // The Miller decoder needs to identify the following sequences:
211 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
212 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
213 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
214 // Note 1: the bitstream may start at any time. We therefore need to sync.
215 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
216 //-----------------------------------------------------------------------------
219 // Lookup-Table to decide if 4 raw bits are a modulation.
220 // We accept the following:
221 // 0001 - a 3 tick wide pause
222 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
223 // 0111 - a 2 tick wide pause shifted left
224 // 1001 - a 2 tick wide pause shifted right
225 const bool Mod_Miller_LUT
[] = {
226 FALSE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, TRUE
,
227 FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
229 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
230 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
234 Uart
.state
= STATE_UNSYNCD
;
236 Uart
.len
= 0; // number of decoded data bytes
237 Uart
.parityLen
= 0; // number of decoded parity bytes
238 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
239 Uart
.parityBits
= 0; // holds 8 parity bits
244 void UartInit(uint8_t *data
, uint8_t *parity
)
247 Uart
.parity
= parity
;
248 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
252 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
253 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
256 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
258 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
260 Uart
.syncBit
= 9999; // not set
261 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
262 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
263 // we therefore look for a ...xx11111111111100x11111xxxxxx... pattern
264 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
265 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00000111 11111111 11101111 10000000
266 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00000111 11111111 10001111 10000000
267 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
268 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
269 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
270 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
271 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
272 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
273 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
274 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
276 if (Uart
.syncBit
!= 9999) { // found a sync bit
277 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
278 Uart
.startTime
-= Uart
.syncBit
;
279 Uart
.endTime
= Uart
.startTime
;
280 Uart
.state
= STATE_START_OF_COMMUNICATION
;
285 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
286 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
288 } else { // Modulation in first half = Sequence Z = logic "0"
289 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
293 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
294 Uart
.state
= STATE_MILLER_Z
;
295 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
296 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
297 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
298 Uart
.parityBits
<<= 1; // make room for the parity bit
299 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
302 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
303 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
310 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
312 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
313 Uart
.state
= STATE_MILLER_X
;
314 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
315 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
316 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
317 Uart
.parityBits
<<= 1; // make room for the new parity bit
318 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
321 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
322 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
326 } else { // no modulation in both halves - Sequence Y
327 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
328 Uart
.state
= STATE_UNSYNCD
;
329 Uart
.bitCount
--; // last "0" was part of EOC sequence
330 Uart
.shiftReg
<<= 1; // drop it
331 if(Uart
.bitCount
> 0) { // if we decoded some bits
332 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
333 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
334 Uart
.parityBits
<<= 1; // add a (void) parity bit
335 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
336 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
338 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
339 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
340 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
343 return TRUE
; // we are finished with decoding the raw data sequence
345 UartReset(); // Nothing received - start over
348 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
350 } else { // a logic "0"
352 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
353 Uart
.state
= STATE_MILLER_Y
;
354 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
355 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
356 Uart
.parityBits
<<= 1; // make room for the parity bit
357 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
360 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
361 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
371 return FALSE
; // not finished yet, need more data
376 //=============================================================================
377 // ISO 14443 Type A - Manchester decoder
378 //=============================================================================
380 // This decoder is used when the PM3 acts as a reader.
381 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
382 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
383 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
384 // The Manchester decoder needs to identify the following sequences:
385 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
386 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
387 // 8 ticks unmodulated: Sequence F = end of communication
388 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
389 // Note 1: the bitstream may start at any time. We therefore need to sync.
390 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
393 // Lookup-Table to decide if 4 raw bits are a modulation.
394 // We accept three or four "1" in any position
395 const bool Mod_Manchester_LUT
[] = {
396 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
397 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
400 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
401 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
406 Demod
.state
= DEMOD_UNSYNCD
;
407 Demod
.len
= 0; // number of decoded data bytes
409 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
410 Demod
.parityBits
= 0; //
411 Demod
.collisionPos
= 0; // Position of collision bit
412 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
418 void DemodInit(uint8_t *data
, uint8_t *parity
)
421 Demod
.parity
= parity
;
425 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
426 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
429 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
431 if (Demod
.state
== DEMOD_UNSYNCD
) {
433 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
434 if (Demod
.twoBits
== 0x0000) {
440 Demod
.syncBit
= 0xFFFF; // not set
441 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
442 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
443 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
444 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
445 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
446 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
447 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
448 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
449 if (Demod
.syncBit
!= 0xFFFF) {
450 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
451 Demod
.startTime
-= Demod
.syncBit
;
452 Demod
.bitCount
= offset
; // number of decoded data bits
453 Demod
.state
= DEMOD_MANCHESTER_DATA
;
459 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
460 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
461 if (!Demod
.collisionPos
) {
462 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
464 } // modulation in first half only - Sequence D = 1
466 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
467 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
468 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
469 Demod
.parityBits
<<= 1; // make room for the parity bit
470 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
473 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
474 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
475 Demod
.parityBits
= 0;
478 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
479 } else { // no modulation in first half
480 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
482 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
483 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
484 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
485 Demod
.parityBits
<<= 1; // make room for the new parity bit
486 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
489 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
490 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
491 Demod
.parityBits
= 0;
494 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
495 } else { // no modulation in both halves - End of communication
496 if(Demod
.bitCount
> 0) { // there are some remaining data bits
497 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
498 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
499 Demod
.parityBits
<<= 1; // add a (void) parity bit
500 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
501 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
503 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
504 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
505 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
508 return TRUE
; // we are finished with decoding the raw data sequence
509 } else { // nothing received. Start over
517 return FALSE
; // not finished yet, need more data
520 //=============================================================================
521 // Finally, a `sniffer' for ISO 14443 Type A
522 // Both sides of communication!
523 //=============================================================================
525 //-----------------------------------------------------------------------------
526 // Record the sequence of commands sent by the reader to the tag, with
527 // triggering so that we start recording at the point that the tag is moved
529 //-----------------------------------------------------------------------------
530 void RAMFUNC
SnoopIso14443a(uint8_t param
) {
532 // bit 0 - trigger from first card answer
533 // bit 1 - trigger from first reader 7-bit request
537 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
539 // Allocate memory from BigBuf for some buffers
540 // free all previous allocations first
543 // The command (reader -> tag) that we're receiving.
544 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
545 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
547 // The response (tag -> reader) that we're receiving.
548 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
549 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
551 // The DMA buffer, used to stream samples from the FPGA
552 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
558 uint8_t *data
= dmaBuf
;
559 uint8_t previous_data
= 0;
562 bool TagIsActive
= FALSE
;
563 bool ReaderIsActive
= FALSE
;
565 // Set up the demodulator for tag -> reader responses.
566 DemodInit(receivedResponse
, receivedResponsePar
);
568 // Set up the demodulator for the reader -> tag commands
569 UartInit(receivedCmd
, receivedCmdPar
);
571 // Setup and start DMA.
572 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
574 // We won't start recording the frames that we acquire until we trigger;
575 // a good trigger condition to get started is probably when we see a
576 // response from the tag.
577 // triggered == FALSE -- to wait first for card
578 bool triggered
= !(param
& 0x03);
580 // And now we loop, receiving samples.
581 for(uint32_t rsamples
= 0; TRUE
; ) {
584 DbpString("cancelled by button");
591 int register readBufDataP
= data
- dmaBuf
;
592 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
593 if (readBufDataP
<= dmaBufDataP
){
594 dataLen
= dmaBufDataP
- readBufDataP
;
596 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
598 // test for length of buffer
599 if(dataLen
> maxDataLen
) {
600 maxDataLen
= dataLen
;
601 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
602 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
606 if(dataLen
< 1) continue;
608 // primary buffer was stopped( <-- we lost data!
609 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
610 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
611 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
612 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
614 // secondary buffer sets as primary, secondary buffer was stopped
615 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
616 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
617 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
622 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
624 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
625 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
626 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
629 // check - if there is a short 7bit request from reader
630 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
633 if (!LogTrace(receivedCmd
,
635 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
636 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
640 /* And ready to receive another command. */
642 /* And also reset the demod code, which might have been */
643 /* false-triggered by the commands from the reader. */
647 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
650 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
651 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
652 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
655 if (!LogTrace(receivedResponse
,
657 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
658 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
662 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
664 // And ready to receive another response.
666 // And reset the Miller decoder including itS (now outdated) input buffer
667 UartInit(receivedCmd
, receivedCmdPar
);
671 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
675 previous_data
= *data
;
678 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
683 DbpString("COMMAND FINISHED");
686 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
687 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
691 //-----------------------------------------------------------------------------
692 // Prepare tag messages
693 //-----------------------------------------------------------------------------
694 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
698 // Correction bit, might be removed when not needed
703 ToSendStuffBit(1); // 1
709 ToSend
[++ToSendMax
] = SEC_D
;
710 LastProxToAirDuration
= 8 * ToSendMax
- 4;
712 for(uint16_t i
= 0; i
< len
; i
++) {
716 for(uint16_t j
= 0; j
< 8; j
++) {
718 ToSend
[++ToSendMax
] = SEC_D
;
720 ToSend
[++ToSendMax
] = SEC_E
;
725 // Get the parity bit
726 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
727 ToSend
[++ToSendMax
] = SEC_D
;
728 LastProxToAirDuration
= 8 * ToSendMax
- 4;
730 ToSend
[++ToSendMax
] = SEC_E
;
731 LastProxToAirDuration
= 8 * ToSendMax
;
736 ToSend
[++ToSendMax
] = SEC_F
;
738 // Convert from last byte pos to length
742 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
744 uint8_t par
[MAX_PARITY_SIZE
];
746 GetParity(cmd
, len
, par
);
747 CodeIso14443aAsTagPar(cmd
, len
, par
);
751 static void Code4bitAnswerAsTag(uint8_t cmd
)
757 // Correction bit, might be removed when not needed
762 ToSendStuffBit(1); // 1
768 ToSend
[++ToSendMax
] = SEC_D
;
771 for(i
= 0; i
< 4; i
++) {
773 ToSend
[++ToSendMax
] = SEC_D
;
774 LastProxToAirDuration
= 8 * ToSendMax
- 4;
776 ToSend
[++ToSendMax
] = SEC_E
;
777 LastProxToAirDuration
= 8 * ToSendMax
;
783 ToSend
[++ToSendMax
] = SEC_F
;
785 // Convert from last byte pos to length
789 //-----------------------------------------------------------------------------
790 // Wait for commands from reader
791 // Stop when button is pressed
792 // Or return TRUE when command is captured
793 //-----------------------------------------------------------------------------
794 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
796 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
797 // only, since we are receiving, not transmitting).
798 // Signal field is off with the appropriate LED
800 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
802 // Now run a `software UART' on the stream of incoming samples.
803 UartInit(received
, parity
);
806 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
811 if(BUTTON_PRESS()) return FALSE
;
813 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
814 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
815 if(MillerDecoding(b
, 0)) {
823 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
824 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
825 int EmSend4bit(uint8_t resp
);
826 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
827 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
828 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
829 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
830 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
831 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
833 static uint8_t* free_buffer_pointer
;
840 uint32_t ProxToAirDuration
;
841 } tag_response_info_t
;
843 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
844 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
845 // This will need the following byte array for a modulation sequence
846 // 144 data bits (18 * 8)
849 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
850 // 1 just for the case
852 // 166 bytes, since every bit that needs to be send costs us a byte
856 // Prepare the tag modulation bits from the message
857 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
859 // Make sure we do not exceed the free buffer space
860 if (ToSendMax
> max_buffer_size
) {
861 Dbprintf("Out of memory, when modulating bits for tag answer:");
862 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
866 // Copy the byte array, used for this modulation to the buffer position
867 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
869 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
870 response_info
->modulation_n
= ToSendMax
;
871 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
877 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
878 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
879 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
880 // -> need 273 bytes buffer
881 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273
883 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
884 // Retrieve and store the current buffer index
885 response_info
->modulation
= free_buffer_pointer
;
887 // Determine the maximum size we can use from our buffer
888 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
890 // Forward the prepare tag modulation function to the inner function
891 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
892 // Update the free buffer offset
893 free_buffer_pointer
+= ToSendMax
;
900 //-----------------------------------------------------------------------------
901 // Main loop of simulated tag: receive commands from reader, decide what
902 // response to send, and send it.
903 //-----------------------------------------------------------------------------
904 void SimulateIso14443aTag(int tagType
, int uid_1st
, int uid_2nd
, byte_t
* data
)
908 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
909 uint8_t response1
[2];
912 case 1: { // MIFARE Classic
913 // Says: I am Mifare 1k - original line
918 case 2: { // MIFARE Ultralight
919 // Says: I am a stupid memory tag, no crypto
924 case 3: { // MIFARE DESFire
925 // Says: I am a DESFire tag, ph33r me
930 case 4: { // ISO/IEC 14443-4
931 // Says: I am a javacard (JCOP)
936 case 5: { // MIFARE TNP3XXX
943 Dbprintf("Error: unkown tagtype (%d)",tagType
);
948 // The second response contains the (mandatory) first 24 bits of the UID
949 uint8_t response2
[5] = {0x00};
951 // Check if the uid uses the (optional) part
952 uint8_t response2a
[5] = {0x00};
956 num_to_bytes(uid_1st
,3,response2
+1);
957 num_to_bytes(uid_2nd
,4,response2a
);
958 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
960 // Configure the ATQA and SAK accordingly
961 response1
[0] |= 0x40;
964 num_to_bytes(uid_1st
,4,response2
);
965 // Configure the ATQA and SAK accordingly
966 response1
[0] &= 0xBF;
970 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
971 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
973 // Prepare the mandatory SAK (for 4 and 7 byte UID)
974 uint8_t response3
[3] = {0x00};
976 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
978 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
979 uint8_t response3a
[3] = {0x00};
980 response3a
[0] = sak
& 0xFB;
981 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
983 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
984 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
985 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
986 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
987 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
988 // TC(1) = 0x02: CID supported, NAD not supported
989 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
991 #define TAG_RESPONSE_COUNT 7
992 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
993 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
994 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
995 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
996 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
997 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
998 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
999 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1002 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1003 // Such a response is less time critical, so we can prepare them on the fly
1004 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1005 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1006 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1007 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1008 tag_response_info_t dynamic_response_info
= {
1009 .response
= dynamic_response_buffer
,
1011 .modulation
= dynamic_modulation_buffer
,
1015 // We need to listen to the high-frequency, peak-detected path.
1016 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1018 BigBuf_free_keep_EM();
1020 // allocate buffers:
1021 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1022 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1023 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1029 // Prepare the responses of the anticollision phase
1030 // there will be not enough time to do this at the moment the reader sends it REQA
1031 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1032 prepare_allocated_tag_modulation(&responses
[i
]);
1037 // To control where we are in the protocol
1041 // Just to allow some checks
1047 tag_response_info_t
* p_response
;
1051 // Clean receive command buffer
1052 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1053 DbpString("Button press");
1059 // Okay, look at the command now.
1061 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1062 p_response
= &responses
[0]; order
= 1;
1063 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1064 p_response
= &responses
[0]; order
= 6;
1065 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1066 p_response
= &responses
[1]; order
= 2;
1067 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1068 p_response
= &responses
[2]; order
= 20;
1069 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1070 p_response
= &responses
[3]; order
= 3;
1071 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1072 p_response
= &responses
[4]; order
= 30;
1073 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1074 EmSendCmdEx(data
+(4*receivedCmd
[1]),16,false);
1075 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1076 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1078 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1081 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1084 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1085 p_response
= &responses
[5]; order
= 7;
1086 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1087 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1088 EmSend4bit(CARD_NACK_NA
);
1091 p_response
= &responses
[6]; order
= 70;
1093 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1095 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1097 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1098 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1099 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr
,ar
);
1101 // Check for ISO 14443A-4 compliant commands, look at left nibble
1102 switch (receivedCmd
[0]) {
1105 case 0x0A: { // IBlock (command)
1106 dynamic_response_info
.response
[0] = receivedCmd
[0];
1107 dynamic_response_info
.response
[1] = 0x00;
1108 dynamic_response_info
.response
[2] = 0x90;
1109 dynamic_response_info
.response
[3] = 0x00;
1110 dynamic_response_info
.response_n
= 4;
1114 case 0x1B: { // Chaining command
1115 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1116 dynamic_response_info
.response_n
= 2;
1121 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1122 dynamic_response_info
.response_n
= 2;
1126 memcpy(dynamic_response_info
.response
,"\xAB\x00",2);
1127 dynamic_response_info
.response_n
= 2;
1131 case 0xC2: { // Readers sends deselect command
1132 memcpy(dynamic_response_info
.response
,"\xCA\x00",2);
1133 dynamic_response_info
.response_n
= 2;
1137 // Never seen this command before
1139 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1141 Dbprintf("Received unknown command (len=%d):",len
);
1142 Dbhexdump(len
,receivedCmd
,false);
1144 dynamic_response_info
.response_n
= 0;
1148 if (dynamic_response_info
.response_n
> 0) {
1149 // Copy the CID from the reader query
1150 dynamic_response_info
.response
[1] = receivedCmd
[1];
1152 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1153 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1154 dynamic_response_info
.response_n
+= 2;
1156 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1157 Dbprintf("Error preparing tag response");
1159 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1163 p_response
= &dynamic_response_info
;
1167 // Count number of wakeups received after a halt
1168 if(order
== 6 && lastorder
== 5) { happened
++; }
1170 // Count number of other messages after a halt
1171 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1173 if(cmdsRecvd
> 999) {
1174 DbpString("1000 commands later...");
1179 if (p_response
!= NULL
) {
1180 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1181 // do the tracing for the previous reader request and this tag answer:
1182 uint8_t par
[MAX_PARITY_SIZE
];
1183 GetParity(p_response
->response
, p_response
->response_n
, par
);
1185 EmLogTrace(Uart
.output
,
1187 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1188 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1190 p_response
->response
,
1191 p_response
->response_n
,
1192 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1193 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1198 Dbprintf("Trace Full. Simulation stopped.");
1203 Dbprintf("%x %x %x", happened
, happened2
, cmdsRecvd
);
1205 BigBuf_free_keep_EM();
1209 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1210 // of bits specified in the delay parameter.
1211 void PrepareDelayedTransfer(uint16_t delay
)
1213 uint8_t bitmask
= 0;
1214 uint8_t bits_to_shift
= 0;
1215 uint8_t bits_shifted
= 0;
1219 for (uint16_t i
= 0; i
< delay
; i
++) {
1220 bitmask
|= (0x01 << i
);
1222 ToSend
[ToSendMax
++] = 0x00;
1223 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1224 bits_to_shift
= ToSend
[i
] & bitmask
;
1225 ToSend
[i
] = ToSend
[i
] >> delay
;
1226 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1227 bits_shifted
= bits_to_shift
;
1233 //-------------------------------------------------------------------------------------
1234 // Transmit the command (to the tag) that was placed in ToSend[].
1235 // Parameter timing:
1236 // if NULL: transfer at next possible time, taking into account
1237 // request guard time and frame delay time
1238 // if == 0: transfer immediately and return time of transfer
1239 // if != 0: delay transfer until time specified
1240 //-------------------------------------------------------------------------------------
1241 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1244 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1246 uint32_t ThisTransferTime
= 0;
1249 if(*timing
== 0) { // Measure time
1250 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1252 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1254 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1255 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1256 LastTimeProxToAirStart
= *timing
;
1258 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1259 while(GetCountSspClk() < ThisTransferTime
);
1260 LastTimeProxToAirStart
= ThisTransferTime
;
1264 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1268 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1269 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1277 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1281 //-----------------------------------------------------------------------------
1282 // Prepare reader command (in bits, support short frames) to send to FPGA
1283 //-----------------------------------------------------------------------------
1284 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1292 // Start of Communication (Seq. Z)
1293 ToSend
[++ToSendMax
] = SEC_Z
;
1294 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1297 size_t bytecount
= nbytes(bits
);
1298 // Generate send structure for the data bits
1299 for (i
= 0; i
< bytecount
; i
++) {
1300 // Get the current byte to send
1302 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1304 for (j
= 0; j
< bitsleft
; j
++) {
1307 ToSend
[++ToSendMax
] = SEC_X
;
1308 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1313 ToSend
[++ToSendMax
] = SEC_Z
;
1314 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1317 ToSend
[++ToSendMax
] = SEC_Y
;
1324 // Only transmit parity bit if we transmitted a complete byte
1325 if (j
== 8 && parity
!= NULL
) {
1326 // Get the parity bit
1327 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1329 ToSend
[++ToSendMax
] = SEC_X
;
1330 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1335 ToSend
[++ToSendMax
] = SEC_Z
;
1336 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1339 ToSend
[++ToSendMax
] = SEC_Y
;
1346 // End of Communication: Logic 0 followed by Sequence Y
1349 ToSend
[++ToSendMax
] = SEC_Z
;
1350 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1353 ToSend
[++ToSendMax
] = SEC_Y
;
1356 ToSend
[++ToSendMax
] = SEC_Y
;
1358 // Convert to length of command:
1362 //-----------------------------------------------------------------------------
1363 // Prepare reader command to send to FPGA
1364 //-----------------------------------------------------------------------------
1365 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
)
1367 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1371 //-----------------------------------------------------------------------------
1372 // Wait for commands from reader
1373 // Stop when button is pressed (return 1) or field was gone (return 2)
1374 // Or return 0 when command is captured
1375 //-----------------------------------------------------------------------------
1376 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1380 uint32_t timer
= 0, vtime
= 0;
1384 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1385 // only, since we are receiving, not transmitting).
1386 // Signal field is off with the appropriate LED
1388 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1390 // Set ADC to read field strength
1391 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1392 AT91C_BASE_ADC
->ADC_MR
=
1393 ADC_MODE_PRESCALE(63) |
1394 ADC_MODE_STARTUP_TIME(1) |
1395 ADC_MODE_SAMPLE_HOLD_TIME(15);
1396 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1398 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1400 // Now run a 'software UART' on the stream of incoming samples.
1401 UartInit(received
, parity
);
1404 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1409 if (BUTTON_PRESS()) return 1;
1411 // test if the field exists
1412 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1414 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1415 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1416 if (analogCnt
>= 32) {
1417 if ((MAX_ADC_HF_VOLTAGE
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1418 vtime
= GetTickCount();
1419 if (!timer
) timer
= vtime
;
1420 // 50ms no field --> card to idle state
1421 if (vtime
- timer
> 50) return 2;
1423 if (timer
) timer
= 0;
1429 // receive and test the miller decoding
1430 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1431 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1432 if(MillerDecoding(b
, 0)) {
1442 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1446 uint32_t ThisTransferTime
;
1448 // Modulate Manchester
1449 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1451 // include correction bit if necessary
1452 if (Uart
.parityBits
& 0x01) {
1453 correctionNeeded
= TRUE
;
1455 if(correctionNeeded
) {
1456 // 1236, so correction bit needed
1462 // clear receiving shift register and holding register
1463 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1464 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1465 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1466 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1468 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1469 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1470 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1471 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1474 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1477 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1480 for(; i
< respLen
; ) {
1481 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1482 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1483 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1486 if(BUTTON_PRESS()) {
1491 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1492 uint8_t fpga_queued_bits
= FpgaSendQueueDelay
>> 3;
1493 for (i
= 0; i
<= fpga_queued_bits
/8 + 1; ) {
1494 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1495 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1496 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1501 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1506 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1507 Code4bitAnswerAsTag(resp
);
1508 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1509 // do the tracing for the previous reader request and this tag answer:
1511 GetParity(&resp
, 1, par
);
1512 EmLogTrace(Uart
.output
,
1514 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1515 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1519 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1520 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1525 int EmSend4bit(uint8_t resp
){
1526 return EmSend4bitEx(resp
, false);
1529 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1530 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1531 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1532 // do the tracing for the previous reader request and this tag answer:
1533 EmLogTrace(Uart
.output
,
1535 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1536 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1540 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1541 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1546 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1547 uint8_t par
[MAX_PARITY_SIZE
];
1548 GetParity(resp
, respLen
, par
);
1549 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1552 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1553 uint8_t par
[MAX_PARITY_SIZE
];
1554 GetParity(resp
, respLen
, par
);
1555 return EmSendCmdExPar(resp
, respLen
, false, par
);
1558 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1559 return EmSendCmdExPar(resp
, respLen
, false, par
);
1562 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1563 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1566 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1567 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1568 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1569 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1570 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1571 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1572 reader_EndTime
= tag_StartTime
- exact_fdt
;
1573 reader_StartTime
= reader_EndTime
- reader_modlen
;
1574 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
)) {
1576 } else return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1582 //-----------------------------------------------------------------------------
1583 // Wait a certain time for tag response
1584 // If a response is captured return TRUE
1585 // If it takes too long return FALSE
1586 //-----------------------------------------------------------------------------
1587 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1591 // Set FPGA mode to "reader listen mode", no modulation (listen
1592 // only, since we are receiving, not transmitting).
1593 // Signal field is on with the appropriate LED
1595 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1597 // Now get the answer from the card
1598 DemodInit(receivedResponse
, receivedResponsePar
);
1601 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1607 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1608 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1609 if(ManchesterDecoding(b
, offset
, 0)) {
1610 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1612 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1620 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1622 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1624 // Send command to tag
1625 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1629 // Log reader command in trace buffer
1631 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1636 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1638 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1642 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1644 // Generate parity and redirect
1645 uint8_t par
[MAX_PARITY_SIZE
];
1646 GetParity(frame
, len
/8, par
);
1647 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1651 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1653 // Generate parity and redirect
1654 uint8_t par
[MAX_PARITY_SIZE
];
1655 GetParity(frame
, len
, par
);
1656 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1659 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1661 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
)) return FALSE
;
1663 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1668 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1670 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return FALSE
;
1672 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1677 /* performs iso14443a anticollision procedure
1678 * fills the uid pointer unless NULL
1679 * fills resp_data unless NULL */
1680 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
) {
1681 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1682 uint8_t sel_all
[] = { 0x93,0x20 };
1683 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1684 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1685 uint8_t resp
[MAX_FRAME_SIZE
]; // theoretically. A usual RATS will be much smaller
1686 uint8_t resp_par
[MAX_PARITY_SIZE
];
1688 size_t uid_resp_len
;
1690 uint8_t sak
= 0x04; // cascade uid
1691 int cascade_level
= 0;
1694 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1695 ReaderTransmitBitsPar(wupa
,7,0, NULL
);
1698 if(!ReaderReceive(resp
, resp_par
)) return 0;
1701 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1702 p_hi14a_card
->uidlen
= 0;
1703 memset(p_hi14a_card
->uid
,0,10);
1708 memset(uid_ptr
,0,10);
1711 // check for proprietary anticollision:
1712 if ((resp
[0] & 0x1F) == 0) {
1716 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1717 // which case we need to make a cascade 2 request and select - this is a long UID
1718 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1719 for(; sak
& 0x04; cascade_level
++) {
1720 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1721 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1724 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1725 if (!ReaderReceive(resp
, resp_par
)) return 0;
1727 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1728 memset(uid_resp
, 0, 4);
1729 uint16_t uid_resp_bits
= 0;
1730 uint16_t collision_answer_offset
= 0;
1731 // anti-collision-loop:
1732 while (Demod
.collisionPos
) {
1733 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1734 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1735 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1736 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1738 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1740 // construct anticollosion command:
1741 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1742 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1743 sel_uid
[2+i
] = uid_resp
[i
];
1745 collision_answer_offset
= uid_resp_bits
%8;
1746 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1747 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1749 // finally, add the last bits and BCC of the UID
1750 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1751 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1752 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1755 } else { // no collision, use the response to SELECT_ALL as current uid
1756 memcpy(uid_resp
, resp
, 4);
1760 // calculate crypto UID. Always use last 4 Bytes.
1762 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1765 // Construct SELECT UID command
1766 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1767 memcpy(sel_uid
+2, uid_resp
, 4); // the UID
1768 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1769 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1770 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1773 if (!ReaderReceive(resp
, resp_par
)) return 0;
1776 // Test if more parts of the uid are coming
1777 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1778 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1779 // http://www.nxp.com/documents/application_note/AN10927.pdf
1780 uid_resp
[0] = uid_resp
[1];
1781 uid_resp
[1] = uid_resp
[2];
1782 uid_resp
[2] = uid_resp
[3];
1788 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1792 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1793 p_hi14a_card
->uidlen
+= uid_resp_len
;
1798 p_hi14a_card
->sak
= sak
;
1799 p_hi14a_card
->ats_len
= 0;
1802 // non iso14443a compliant tag
1803 if( (sak
& 0x20) == 0) return 2;
1805 // Request for answer to select
1806 AppendCrc14443a(rats
, 2);
1807 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1809 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
1813 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
1814 p_hi14a_card
->ats_len
= len
;
1817 // reset the PCB block number
1818 iso14_pcb_blocknum
= 0;
1820 // set default timeout based on ATS
1821 iso14a_set_ATS_timeout(resp
);
1826 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1827 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1828 // Set up the synchronous serial port
1830 // connect Demodulated Signal to ADC:
1831 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1833 // Signal field is on with the appropriate LED
1834 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
1835 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
1840 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
1847 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
1848 iso14a_set_timeout(1050); // 10ms default
1851 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
1852 uint8_t parity
[MAX_PARITY_SIZE
];
1853 uint8_t real_cmd
[cmd_len
+4];
1854 real_cmd
[0] = 0x0a; //I-Block
1855 // put block number into the PCB
1856 real_cmd
[0] |= iso14_pcb_blocknum
;
1857 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1858 memcpy(real_cmd
+2, cmd
, cmd_len
);
1859 AppendCrc14443a(real_cmd
,cmd_len
+2);
1861 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
1862 size_t len
= ReaderReceive(data
, parity
);
1863 uint8_t *data_bytes
= (uint8_t *) data
;
1865 return 0; //DATA LINK ERROR
1866 // if we received an I- or R(ACK)-Block with a block number equal to the
1867 // current block number, toggle the current block number
1868 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
1869 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
1870 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1871 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
1873 iso14_pcb_blocknum
^= 1;
1879 //-----------------------------------------------------------------------------
1880 // Read an ISO 14443a tag. Send out commands and store answers.
1882 //-----------------------------------------------------------------------------
1883 void ReaderIso14443a(UsbCommand
*c
)
1885 iso14a_command_t param
= c
->arg
[0];
1886 uint8_t *cmd
= c
->d
.asBytes
;
1887 size_t len
= c
->arg
[1] & 0xffff;
1888 size_t lenbits
= c
->arg
[1] >> 16;
1889 uint32_t timeout
= c
->arg
[2];
1891 byte_t buf
[USB_CMD_DATA_SIZE
];
1892 uint8_t par
[MAX_PARITY_SIZE
];
1894 if(param
& ISO14A_CONNECT
) {
1900 if(param
& ISO14A_REQUEST_TRIGGER
) {
1901 iso14a_set_trigger(TRUE
);
1904 if(param
& ISO14A_CONNECT
) {
1905 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
1906 if(!(param
& ISO14A_NO_SELECT
)) {
1907 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
1908 arg0
= iso14443a_select_card(NULL
,card
,NULL
);
1909 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
1913 if(param
& ISO14A_SET_TIMEOUT
) {
1914 iso14a_set_timeout(timeout
);
1917 if(param
& ISO14A_APDU
) {
1918 arg0
= iso14_apdu(cmd
, len
, buf
);
1919 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1922 if(param
& ISO14A_RAW
) {
1923 if(param
& ISO14A_APPEND_CRC
) {
1924 if(param
& ISO14A_TOPAZMODE
) {
1925 AppendCrc14443b(cmd
,len
);
1927 AppendCrc14443a(cmd
,len
);
1930 if (lenbits
) lenbits
+= 16;
1932 if(lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
1933 if(param
& ISO14A_TOPAZMODE
) {
1934 int bits_to_send
= lenbits
;
1936 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
1938 while (bits_to_send
> 0) {
1939 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
1943 GetParity(cmd
, lenbits
/8, par
);
1944 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
1946 } else { // want to send complete bytes only
1947 if(param
& ISO14A_TOPAZMODE
) {
1949 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
1951 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
1954 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
1957 arg0
= ReaderReceive(buf
, par
);
1958 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1961 if(param
& ISO14A_REQUEST_TRIGGER
) {
1962 iso14a_set_trigger(FALSE
);
1965 if(param
& ISO14A_NO_DISCONNECT
) {
1969 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1974 // Determine the distance between two nonces.
1975 // Assume that the difference is small, but we don't know which is first.
1976 // Therefore try in alternating directions.
1977 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
1980 uint32_t nttmp1
, nttmp2
;
1982 if (nt1
== nt2
) return 0;
1987 for (i
= 1; i
< 32768; i
++) {
1988 nttmp1
= prng_successor(nttmp1
, 1);
1989 if (nttmp1
== nt2
) return i
;
1990 nttmp2
= prng_successor(nttmp2
, 1);
1991 if (nttmp2
== nt1
) return -i
;
1994 return(-99999); // either nt1 or nt2 are invalid nonces
1998 //-----------------------------------------------------------------------------
1999 // Recover several bits of the cypher stream. This implements (first stages of)
2000 // the algorithm described in "The Dark Side of Security by Obscurity and
2001 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2002 // (article by Nicolas T. Courtois, 2009)
2003 //-----------------------------------------------------------------------------
2004 void ReaderMifare(bool first_try
)
2007 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
2008 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2009 static uint8_t mf_nr_ar3
;
2011 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
];
2012 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
];
2015 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2018 // free eventually allocated BigBuf memory. We want all for tracing.
2025 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2026 static byte_t par_low
= 0;
2028 uint8_t uid
[10] ={0};
2032 uint32_t previous_nt
= 0;
2033 static uint32_t nt_attacked
= 0;
2034 byte_t par_list
[8] = {0x00};
2035 byte_t ks_list
[8] = {0x00};
2037 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2038 static uint32_t sync_time
;
2039 static int32_t sync_cycles
;
2040 int catch_up_cycles
= 0;
2041 int last_catch_up
= 0;
2042 uint16_t elapsed_prng_sequences
;
2043 uint16_t consecutive_resyncs
= 0;
2048 sync_time
= GetCountSspClk() & 0xfffffff8;
2049 sync_cycles
= PRNG_SEQUENCE_LENGTH
; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the tag nonces).
2054 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2056 mf_nr_ar
[3] = mf_nr_ar3
;
2065 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2066 #define MAX_SYNC_TRIES 32
2067 #define NUM_DEBUG_INFOS 8 // per strategy
2068 #define MAX_STRATEGY 3
2069 uint16_t unexpected_random
= 0;
2070 uint16_t sync_tries
= 0;
2071 int16_t debug_info_nr
= -1;
2072 uint16_t strategy
= 0;
2073 int32_t debug_info
[MAX_STRATEGY
][NUM_DEBUG_INFOS
];
2074 uint32_t select_time
;
2077 for(uint16_t i
= 0; TRUE
; i
++) {
2082 // Test if the action was cancelled
2083 if(BUTTON_PRESS()) {
2088 if (strategy
== 2) {
2089 // test with additional hlt command
2091 int len
= mifare_sendcmd_short(NULL
, false, 0x50, 0x00, receivedAnswer
, receivedAnswerPar
, &halt_time
);
2092 if (len
&& MF_DBGLEVEL
>= 3) {
2093 Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len
);
2097 if (strategy
== 3) {
2098 // test with FPGA power off/on
2099 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2101 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2105 if(!iso14443a_select_card(uid
, NULL
, &cuid
)) {
2106 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2109 select_time
= GetCountSspClk();
2111 elapsed_prng_sequences
= 1;
2112 if (debug_info_nr
== -1) {
2113 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2114 catch_up_cycles
= 0;
2116 // if we missed the sync time already, advance to the next nonce repeat
2117 while(GetCountSspClk() > sync_time
) {
2118 elapsed_prng_sequences
++;
2119 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2122 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2123 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2125 // collect some information on tag nonces for debugging:
2126 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2127 if (strategy
== 0) {
2128 // nonce distances at fixed time after card select:
2129 sync_time
= select_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2130 } else if (strategy
== 1) {
2131 // nonce distances at fixed time between authentications:
2132 sync_time
= sync_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2133 } else if (strategy
== 2) {
2134 // nonce distances at fixed time after halt:
2135 sync_time
= halt_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2137 // nonce_distances at fixed time after power on
2138 sync_time
= DEBUG_FIXED_SYNC_CYCLES
;
2140 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2143 // Receive the (4 Byte) "random" nonce
2144 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2145 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2150 nt
= bytes_to_num(receivedAnswer
, 4);
2152 // Transmit reader nonce with fake par
2153 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2155 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2156 int nt_distance
= dist_nt(previous_nt
, nt
);
2157 if (nt_distance
== 0) {
2160 if (nt_distance
== -99999) { // invalid nonce received
2161 unexpected_random
++;
2162 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2163 isOK
= -3; // Card has an unpredictable PRNG. Give up
2166 continue; // continue trying...
2169 if (++sync_tries
> MAX_SYNC_TRIES
) {
2170 if (strategy
> MAX_STRATEGY
|| MF_DBGLEVEL
< 3) {
2171 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2173 } else { // continue for a while, just to collect some debug info
2174 debug_info
[strategy
][debug_info_nr
] = nt_distance
;
2176 if (debug_info_nr
== NUM_DEBUG_INFOS
) {
2183 sync_cycles
= (sync_cycles
- nt_distance
/elapsed_prng_sequences
);
2184 if (sync_cycles
<= 0) {
2185 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2187 if (MF_DBGLEVEL
>= 3) {
2188 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2194 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2195 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2196 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2197 catch_up_cycles
= 0;
2200 catch_up_cycles
/= elapsed_prng_sequences
;
2201 if (catch_up_cycles
== last_catch_up
) {
2202 consecutive_resyncs
++;
2205 last_catch_up
= catch_up_cycles
;
2206 consecutive_resyncs
= 0;
2208 if (consecutive_resyncs
< 3) {
2209 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2212 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2213 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2215 catch_up_cycles
= 0;
2216 consecutive_resyncs
= 0;
2221 consecutive_resyncs
= 0;
2223 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2224 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2225 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2228 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2232 if(led_on
) LED_B_ON(); else LED_B_OFF();
2234 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2235 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2237 // Test if the information is complete
2238 if (nt_diff
== 0x07) {
2243 nt_diff
= (nt_diff
+ 1) & 0x07;
2244 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2247 if (nt_diff
== 0 && first_try
)
2250 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2255 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2261 mf_nr_ar
[3] &= 0x1F;
2264 if (MF_DBGLEVEL
>= 3) {
2265 for (uint16_t i
= 0; i
<= MAX_STRATEGY
; i
++) {
2266 for(uint16_t j
= 0; j
< NUM_DEBUG_INFOS
; j
++) {
2267 Dbprintf("collected debug info[%d][%d] = %d", i
, j
, debug_info
[i
][j
]);
2274 memcpy(buf
+ 0, uid
, 4);
2275 num_to_bytes(nt
, 4, buf
+ 4);
2276 memcpy(buf
+ 8, par_list
, 8);
2277 memcpy(buf
+ 16, ks_list
, 8);
2278 memcpy(buf
+ 24, mf_nr_ar
, 4);
2280 cmd_send(CMD_ACK
, isOK
, 0, 0, buf
, 28);
2283 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2302 *MIFARE 1K simulate.
2305 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2306 * FLAG_4B_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2307 * FLAG_7B_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2308 * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section not finished
2309 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2310 * FLAG_RANDOM_NONCE - means we should generate some pseudo-random nonce data (only allows moebius attack)
2311 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is infinite ...
2312 * (unless reader attack mode enabled then it runs util it gets enough nonces to recover all keys attmpted)
2314 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2316 int cardSTATE
= MFEMUL_NOFIELD
;
2317 int _UID_LEN
= 0; // 4, 7, 10
2318 int vHf
= 0; // in mV
2320 uint32_t selTimer
= 0;
2321 uint32_t authTimer
= 0;
2323 uint8_t cardWRBL
= 0;
2324 uint8_t cardAUTHSC
= 0;
2325 uint8_t cardAUTHKEY
= 0xff; // no authentication
2326 uint32_t cardRr
= 0;
2328 //uint32_t rn_enc = 0;
2330 uint32_t cardINTREG
= 0;
2331 uint8_t cardINTBLOCK
= 0;
2332 struct Crypto1State mpcs
= {0, 0};
2333 struct Crypto1State
*pcs
;
2335 uint32_t numReads
= 0;//Counts numer of times reader read a block
2336 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2337 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
];
2338 uint8_t response
[MAX_MIFARE_FRAME_SIZE
];
2339 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
];
2341 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2342 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2343 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2344 uint8_t rUIDBCC3
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2346 uint8_t rSAKfinal
[]= {0x08, 0xb6, 0xdd}; // mifare 1k indicated
2347 uint8_t rSAK1
[] = {0x04, 0xda, 0x17}; // indicate UID not finished
2349 uint8_t rAUTH_NT
[] = {0x01, 0x02, 0x03, 0x04};
2350 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2352 //Here, we collect UID,sector,keytype,NT,AR,NR,NT2,AR2,NR2
2353 // This will be used in the reader-only attack.
2355 //allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys
2356 #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack()
2357 nonces_t ar_nr_resp
[ATTACK_KEY_COUNT
*2]; //*2 for 2 separate attack types (nml, moebius)
2358 memset(ar_nr_resp
, 0x00, sizeof(ar_nr_resp
));
2360 uint8_t ar_nr_collected
[ATTACK_KEY_COUNT
*2]; //*2 for 2nd attack type (moebius)
2361 memset(ar_nr_collected
, 0x00, sizeof(ar_nr_collected
));
2362 uint8_t nonce1_count
= 0;
2363 uint8_t nonce2_count
= 0;
2364 uint8_t moebius_n_count
= 0;
2365 bool gettingMoebius
= false;
2366 uint8_t mM
= 0; //moebius_modifier for collection storage
2368 // Authenticate response - nonce
2370 if (flags
& FLAG_RANDOM_NONCE
) {
2373 nonce
= bytes_to_num(rAUTH_NT
, 4);
2376 //-- Determine the UID
2377 // Can be set from emulator memory, incoming data
2378 // and can be 7 or 4 bytes long
2379 if (flags
& FLAG_4B_UID_IN_DATA
)
2381 // 4B uid comes from data-portion of packet
2382 memcpy(rUIDBCC1
,datain
,4);
2383 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2385 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2386 // 7B uid comes from data-portion of packet
2387 memcpy(&rUIDBCC1
[1],datain
,3);
2388 memcpy(rUIDBCC2
, datain
+3, 4);
2390 } else if (flags
& FLAG_10B_UID_IN_DATA
) {
2391 memcpy(&rUIDBCC1
[1], datain
, 3);
2392 memcpy(&rUIDBCC2
[1], datain
+3, 3);
2393 memcpy( rUIDBCC3
, datain
+6, 4);
2396 // get UID from emul memory - guess at length
2397 emlGetMemBt(receivedCmd
, 7, 1);
2398 if (receivedCmd
[0] == 0x00) { // ---------- 4BUID
2399 emlGetMemBt(rUIDBCC1
, 0, 4);
2401 } else { // ---------- 7BUID
2402 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2403 emlGetMemBt(rUIDBCC2
, 3, 4);
2411 cuid
= bytes_to_num(rUIDBCC1
, 4);
2413 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2414 if (MF_DBGLEVEL
>= 2) {
2415 Dbprintf("4B UID: %02x%02x%02x%02x",
2426 cuid
= bytes_to_num(rUIDBCC2
, 4);
2430 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2431 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2432 if (MF_DBGLEVEL
>= 2) {
2433 Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x",
2446 //sak_10[0] &= 0xFB;
2448 cuid
= bytes_to_num(rUIDBCC3
, 4);
2453 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2454 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2455 rUIDBCC3
[4] = rUIDBCC3
[0] ^ rUIDBCC3
[1] ^ rUIDBCC3
[2] ^ rUIDBCC3
[3];
2457 if (MF_DBGLEVEL
>= 2) {
2458 Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2476 // We need to listen to the high-frequency, peak-detected path.
2477 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2479 // free eventually allocated BigBuf memory but keep Emulator Memory
2480 BigBuf_free_keep_EM();
2486 bool finished
= FALSE
;
2487 bool button_pushed
= BUTTON_PRESS();
2488 while (!button_pushed
&& !finished
&& !usb_poll_validate_length()) {
2491 // find reader field
2492 if (cardSTATE
== MFEMUL_NOFIELD
) {
2493 vHf
= (MAX_ADC_HF_VOLTAGE
* AvgAdc(ADC_CHAN_HF
)) >> 10;
2494 if (vHf
> MF_MINFIELDV
) {
2495 cardSTATE_TO_IDLE();
2499 if (cardSTATE
== MFEMUL_NOFIELD
) continue;
2502 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2503 if (res
== 2) { //Field is off!
2504 cardSTATE
= MFEMUL_NOFIELD
;
2507 } else if (res
== 1) {
2508 break; //return value 1 means button press
2511 // REQ or WUP request in ANY state and WUP in HALTED state
2512 if (len
== 1 && ((receivedCmd
[0] == ISO14443A_CMD_REQA
&& cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == ISO14443A_CMD_WUPA
)) {
2513 selTimer
= GetTickCount();
2514 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == ISO14443A_CMD_WUPA
));
2515 cardSTATE
= MFEMUL_SELECT1
;
2517 // init crypto block
2520 crypto1_destroy(pcs
);
2522 if (flags
& FLAG_RANDOM_NONCE
) {
2528 switch (cardSTATE
) {
2529 case MFEMUL_NOFIELD
:
2532 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2535 case MFEMUL_SELECT1
:{
2536 // select all - 0x93 0x20
2537 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&& receivedCmd
[1] == 0x20)) {
2538 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2539 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2543 // select card - 0x93 0x70 ...
2545 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&& receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2546 if (MF_DBGLEVEL
>= 4)
2547 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2551 cardSTATE
= MFEMUL_WORK
;
2553 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2554 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2557 cardSTATE
= MFEMUL_SELECT2
;
2558 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2561 cardSTATE
= MFEMUL_SELECT2
;
2562 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2567 cardSTATE_TO_IDLE();
2571 case MFEMUL_SELECT3
:{
2573 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2576 // select all cl3 - 0x97 0x20
2577 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&& receivedCmd
[1] == 0x20)) {
2578 EmSendCmd(rUIDBCC3
, sizeof(rUIDBCC3
));
2581 // select card cl3 - 0x97 0x70
2583 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&&
2584 receivedCmd
[1] == 0x70 &&
2585 memcmp(&receivedCmd
[2], rUIDBCC3
, 4) == 0) ) {
2587 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2588 cardSTATE
= MFEMUL_WORK
;
2590 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer
);
2593 cardSTATE_TO_IDLE();
2598 cardSTATE_TO_IDLE();
2599 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2603 uint32_t nr
= bytes_to_num(receivedCmd
, 4);
2604 uint32_t ar
= bytes_to_num(&receivedCmd
[4], 4);
2606 // Collect AR/NR per keytype & sector
2607 if(flags
& FLAG_NR_AR_ATTACK
) {
2608 for (uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
2609 if ( ar_nr_collected
[i
+mM
]==0 || ((cardAUTHSC
== ar_nr_resp
[i
+mM
].sector
) && (cardAUTHKEY
== ar_nr_resp
[i
+mM
].keytype
) && (ar_nr_collected
[i
+mM
] > 0)) ) {
2610 // if first auth for sector, or matches sector and keytype of previous auth
2611 if (ar_nr_collected
[i
+mM
] < 2) {
2612 // if we haven't already collected 2 nonces for this sector
2613 if (ar_nr_resp
[ar_nr_collected
[i
+mM
]].ar
!= ar
) {
2614 // Avoid duplicates... probably not necessary, ar should vary.
2615 if (ar_nr_collected
[i
+mM
]==0) {
2616 // first nonce collect
2617 ar_nr_resp
[i
+mM
].cuid
= cuid
;
2618 ar_nr_resp
[i
+mM
].sector
= cardAUTHSC
;
2619 ar_nr_resp
[i
+mM
].keytype
= cardAUTHKEY
;
2620 ar_nr_resp
[i
+mM
].nonce
= nonce
;
2621 ar_nr_resp
[i
+mM
].nr
= nr
;
2622 ar_nr_resp
[i
+mM
].ar
= ar
;
2624 // add this nonce to first moebius nonce
2625 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].cuid
= cuid
;
2626 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].sector
= cardAUTHSC
;
2627 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].keytype
= cardAUTHKEY
;
2628 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].nonce
= nonce
;
2629 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].nr
= nr
;
2630 ar_nr_resp
[i
+ATTACK_KEY_COUNT
].ar
= ar
;
2631 ar_nr_collected
[i
+ATTACK_KEY_COUNT
]++;
2632 } else { // second nonce collect (std and moebius)
2633 ar_nr_resp
[i
+mM
].nonce2
= nonce
;
2634 ar_nr_resp
[i
+mM
].nr2
= nr
;
2635 ar_nr_resp
[i
+mM
].ar2
= ar
;
2636 if (!gettingMoebius
) {
2638 // check if this was the last second nonce we need for std attack
2639 if ( nonce2_count
== nonce1_count
) {
2640 // done collecting std test switch to moebius
2641 // first finish incrementing last sample
2642 ar_nr_collected
[i
+mM
]++;
2643 // switch to moebius collection
2644 gettingMoebius
= true;
2645 mM
= ATTACK_KEY_COUNT
;
2646 if (flags
& FLAG_RANDOM_NONCE
) {
2655 // if we've collected all the nonces we need - finish.
2656 if (nonce1_count
== moebius_n_count
) finished
= true;
2659 ar_nr_collected
[i
+mM
]++;
2662 // we found right spot for this nonce stop looking
2669 crypto1_word(pcs
, nr
, 1);
2670 cardRr
= ar
^ crypto1_word(pcs
, 0, 0);
2673 if (cardRr
!= prng_successor(nonce
, 64)){
2674 if (MF_DBGLEVEL
>= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2675 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2676 cardRr
, prng_successor(nonce
, 64));
2677 // Shouldn't we respond anything here?
2678 // Right now, we don't nack or anything, which causes the
2679 // reader to do a WUPA after a while. /Martin
2680 // -- which is the correct response. /piwi
2681 cardSTATE_TO_IDLE();
2682 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2687 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2689 num_to_bytes(ans
, 4, rAUTH_AT
);
2691 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2693 cardSTATE
= MFEMUL_WORK
;
2694 if (MF_DBGLEVEL
>= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2695 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2696 GetTickCount() - authTimer
);
2699 case MFEMUL_SELECT2
:{
2701 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2704 // select all cl2 - 0x95 0x20
2705 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&& receivedCmd
[1] == 0x20)) {
2706 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2710 // select cl2 card - 0x95 0x70 xxxxxxxxxxxx
2712 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&& receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0)) {
2715 EmSendCmd(rSAKfinal
, sizeof(rSAKfinal
));
2716 cardSTATE
= MFEMUL_WORK
;
2718 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2721 EmSendCmd(rSAK1
, sizeof(rSAK1
));
2722 cardSTATE
= MFEMUL_SELECT3
;
2729 // i guess there is a command). go into the work state.
2731 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2734 cardSTATE
= MFEMUL_WORK
;
2736 //intentional fall-through to the next case-stmt
2741 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2745 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2747 if(encrypted_data
) {
2749 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2752 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2754 // if authenticating to a block that shouldn't exist - as long as we are not doing the reader attack
2755 if (receivedCmd
[1] >= 16 * 4 && !(flags
& FLAG_NR_AR_ATTACK
)) {
2756 //is this the correct response to an auth on a out of range block? marshmellow
2757 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2758 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2762 authTimer
= GetTickCount();
2763 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2764 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2765 crypto1_destroy(pcs
);//Added by martin
2766 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2767 //uint64_t key=emlGetKey(cardAUTHSC, cardAUTHKEY);
2768 //Dbprintf("key: %04x%08x",(uint32_t)(key>>32)&0xFFFF,(uint32_t)(key&0xFFFFFFFF));
2770 if (!encrypted_data
) { // first authentication
2771 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2773 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2774 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2775 } else { // nested authentication
2776 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2777 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2778 num_to_bytes(ans
, 4, rAUTH_AT
);
2781 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2782 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2783 cardSTATE
= MFEMUL_AUTH1
;
2787 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2788 // BUT... ACK --> NACK
2789 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2790 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2794 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2795 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2796 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2801 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2805 if(receivedCmd
[0] == 0x30 // read block
2806 || receivedCmd
[0] == 0xA0 // write block
2807 || receivedCmd
[0] == 0xC0 // inc
2808 || receivedCmd
[0] == 0xC1 // dec
2809 || receivedCmd
[0] == 0xC2 // restore
2810 || receivedCmd
[0] == 0xB0) { // transfer
2811 if (receivedCmd
[1] >= 16 * 4) {
2812 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2813 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2817 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2818 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2819 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02x) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2824 if (receivedCmd
[0] == 0x30) {
2825 if (MF_DBGLEVEL
>= 4) {
2826 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2828 emlGetMem(response
, receivedCmd
[1], 1);
2829 AppendCrc14443a(response
, 16);
2830 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2831 EmSendCmdPar(response
, 18, response_par
);
2833 if(exitAfterNReads
> 0 && numReads
== exitAfterNReads
) {
2834 Dbprintf("%d reads done, exiting", numReads
);
2840 if (receivedCmd
[0] == 0xA0) {
2841 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2842 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2843 cardSTATE
= MFEMUL_WRITEBL2
;
2844 cardWRBL
= receivedCmd
[1];
2847 // increment, decrement, restore
2848 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2849 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2850 if (emlCheckValBl(receivedCmd
[1])) {
2851 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2852 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2855 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2856 if (receivedCmd
[0] == 0xC1)
2857 cardSTATE
= MFEMUL_INTREG_INC
;
2858 if (receivedCmd
[0] == 0xC0)
2859 cardSTATE
= MFEMUL_INTREG_DEC
;
2860 if (receivedCmd
[0] == 0xC2)
2861 cardSTATE
= MFEMUL_INTREG_REST
;
2862 cardWRBL
= receivedCmd
[1];
2866 if (receivedCmd
[0] == 0xB0) {
2867 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2868 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2869 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2871 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2875 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2878 cardSTATE
= MFEMUL_HALTED
;
2879 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2880 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2884 if (receivedCmd
[0] == 0xe0) {//RATS
2885 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2888 // command not allowed
2889 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2890 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2893 case MFEMUL_WRITEBL2
:{
2895 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2896 emlSetMem(receivedCmd
, cardWRBL
, 1);
2897 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2898 cardSTATE
= MFEMUL_WORK
;
2900 cardSTATE_TO_IDLE();
2901 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2906 case MFEMUL_INTREG_INC
:{
2907 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2908 memcpy(&ans
, receivedCmd
, 4);
2909 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2910 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2911 cardSTATE_TO_IDLE();
2914 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2915 cardINTREG
= cardINTREG
+ ans
;
2916 cardSTATE
= MFEMUL_WORK
;
2919 case MFEMUL_INTREG_DEC
:{
2920 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2921 memcpy(&ans
, receivedCmd
, 4);
2922 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2923 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2924 cardSTATE_TO_IDLE();
2927 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2928 cardINTREG
= cardINTREG
- ans
;
2929 cardSTATE
= MFEMUL_WORK
;
2932 case MFEMUL_INTREG_REST
:{
2933 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2934 memcpy(&ans
, receivedCmd
, 4);
2935 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2936 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2937 cardSTATE_TO_IDLE();
2940 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2941 cardSTATE
= MFEMUL_WORK
;
2945 button_pushed
= BUTTON_PRESS();
2948 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2951 if(flags
& FLAG_NR_AR_ATTACK
&& MF_DBGLEVEL
>= 1) {
2952 for ( uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
2953 if (ar_nr_collected
[i
] == 2) {
2954 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i
<ATTACK_KEY_COUNT
/2) ? "keyA" : "keyB", ar_nr_resp
[i
].sector
);
2955 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2956 ar_nr_resp
[i
].cuid
, //UID
2957 ar_nr_resp
[i
].nonce
, //NT
2958 ar_nr_resp
[i
].nr
, //NR1
2959 ar_nr_resp
[i
].ar
, //AR1
2960 ar_nr_resp
[i
].nr2
, //NR2
2961 ar_nr_resp
[i
].ar2
//AR2
2965 for ( uint8_t i
= ATTACK_KEY_COUNT
; i
< ATTACK_KEY_COUNT
*2; i
++) {
2966 if (ar_nr_collected
[i
] == 2) {
2967 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i
<ATTACK_KEY_COUNT
/2) ? "keyA" : "keyB", ar_nr_resp
[i
].sector
);
2968 Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x",
2969 ar_nr_resp
[i
].cuid
, //UID
2970 ar_nr_resp
[i
].nonce
, //NT
2971 ar_nr_resp
[i
].nr
, //NR1
2972 ar_nr_resp
[i
].ar
, //AR1
2973 ar_nr_resp
[i
].nonce2
,//NT2
2974 ar_nr_resp
[i
].nr2
, //NR2
2975 ar_nr_resp
[i
].ar2
//AR2
2980 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
2982 if(flags
& FLAG_INTERACTIVE
) { // Interactive mode flag, means we need to send ACK
2983 //Send the collected ar_nr in the response
2984 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,button_pushed
,0,&ar_nr_resp
,sizeof(ar_nr_resp
));
2989 //-----------------------------------------------------------------------------
2992 //-----------------------------------------------------------------------------
2993 void RAMFUNC
SniffMifare(uint8_t param
) {
2995 // bit 0 - trigger from first card answer
2996 // bit 1 - trigger from first reader 7-bit request
2998 // C(red) A(yellow) B(green)
3000 // init trace buffer
3004 // The command (reader -> tag) that we're receiving.
3005 // The length of a received command will in most cases be no more than 18 bytes.
3006 // So 32 should be enough!
3007 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
3008 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
];
3009 // The response (tag -> reader) that we're receiving.
3010 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
];
3011 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
];
3013 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
3015 // free eventually allocated BigBuf memory
3017 // allocate the DMA buffer, used to stream samples from the FPGA
3018 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
3019 uint8_t *data
= dmaBuf
;
3020 uint8_t previous_data
= 0;
3023 bool ReaderIsActive
= FALSE
;
3024 bool TagIsActive
= FALSE
;
3026 // Set up the demodulator for tag -> reader responses.
3027 DemodInit(receivedResponse
, receivedResponsePar
);
3029 // Set up the demodulator for the reader -> tag commands
3030 UartInit(receivedCmd
, receivedCmdPar
);
3032 // Setup for the DMA.
3033 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3040 // And now we loop, receiving samples.
3041 for(uint32_t sniffCounter
= 0; TRUE
; ) {
3043 if(BUTTON_PRESS()) {
3044 DbpString("cancelled by button");
3051 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
3052 // check if a transaction is completed (timeout after 2000ms).
3053 // if yes, stop the DMA transfer and send what we have so far to the client
3054 if (MfSniffSend(2000)) {
3055 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3059 ReaderIsActive
= FALSE
;
3060 TagIsActive
= FALSE
;
3061 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3065 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
3066 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
3067 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
3068 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
3070 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
3072 // test for length of buffer
3073 if(dataLen
> maxDataLen
) { // we are more behind than ever...
3074 maxDataLen
= dataLen
;
3075 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
3076 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
3080 if(dataLen
< 1) continue;
3082 // primary buffer was stopped ( <-- we lost data!
3083 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
3084 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
3085 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
3086 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
3088 // secondary buffer sets as primary, secondary buffer was stopped
3089 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
3090 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
3091 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
3096 if (sniffCounter
& 0x01) {
3098 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
3099 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
3100 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
3102 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
3104 /* And ready to receive another command. */
3105 UartInit(receivedCmd
, receivedCmdPar
);
3107 /* And also reset the demod code */
3110 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
3113 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
3114 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
3115 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
3118 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
3120 // And ready to receive another response.
3122 // And reset the Miller decoder including its (now outdated) input buffer
3123 UartInit(receivedCmd
, receivedCmdPar
);
3125 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
3129 previous_data
= *data
;
3132 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
3138 DbpString("COMMAND FINISHED");
3140 FpgaDisableSscDma();
3143 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);