3 struct common_area common_area
__attribute__((section(".commonarea")));
4 unsigned int start_addr
, end_addr
, bootrom_unlocked
;
5 extern char _bootrom_start
, _bootrom_end
, _flash_start
, _flash_end
;
7 static void ConfigClocks(void)
9 // we are using a 16 MHz crystal as the basis for everything
10 // slow clock runs at 32Khz typical regardless of crystal
12 // enable system clock and USB clock
13 AT91C_BASE_PMC
->PMC_SCER
= AT91C_PMC_PCK
| AT91C_PMC_UDP
;
15 // enable the clock to the following peripherals
16 AT91C_BASE_PMC
->PMC_PCER
=
24 // worst case scenario, with 16Mhz xtal startup delay is 14.5ms
25 // with a slow clock running at it worst case (max) frequency of 42khz
26 // max startup delay = (14.5ms*42k)/8 = 76 = 0x4C round up to 0x50
28 // enable main oscillator and set startup delay
29 AT91C_BASE_PMC
->PMC_MOR
=
31 PMC_MAIN_OSC_STARTUP_DELAY(0x50);
33 // wait for main oscillator to stabilize
34 while ( !(AT91C_BASE_PMC
->PMC_SR
& PMC_MAIN_OSC_STABILIZED
) )
37 // minimum PLL clock frequency is 80 MHz in range 00 (96 here so okay)
38 // frequency is crystal * multiplier / divisor = 16Mhz * 12 / 2 = 96Mhz
39 AT91C_BASE_PMC
->PMC_PLLR
=
41 PMC_PLL_COUNT_BEFORE_LOCK(0x50) |
42 PMC_PLL_FREQUENCY_RANGE(0) |
43 PMC_PLL_MULTIPLIER(12) |
44 PMC_PLL_USB_DIVISOR(1);
46 // wait for PLL to lock
47 while ( !(AT91C_BASE_PMC
->PMC_SR
& PMC_MAIN_OSC_PLL_LOCK
) )
50 // we want a master clock (MCK) to be PLL clock / 2 = 96Mhz / 2 = 48Mhz
51 // as per datasheet, this register must be programmed in two operations
52 // when changing to PLL, program the prescaler first then the source
53 AT91C_BASE_PMC
->PMC_MCKR
= PMC_CLK_PRESCALE_DIV_2
;
55 // wait for main clock ready signal
56 while ( !(AT91C_BASE_PMC
->PMC_SR
& PMC_MAIN_OSC_MCK_READY
) )
59 // set the source to PLL
60 AT91C_BASE_PMC
->PMC_MCKR
= AT91C_PMC_CSS_PLL_CLK
| PMC_CLK_PRESCALE_DIV_2
;
62 // wait for main clock ready signal
63 while ( !(AT91C_BASE_PMC
->PMC_SR
& PMC_MAIN_OSC_MCK_READY
) )
67 static void Fatal(void)
72 void UsbPacketReceived(BYTE
*packet
, int len
)
75 UsbCommand
*c
= (UsbCommand
*)packet
;
78 if(len
!= sizeof(*c
)) {
85 c
->cmd
= CMD_DEVICE_INFO
;
86 c
->arg
[0] = DEVICE_INFO_FLAG_BOOTROM_PRESENT
| DEVICE_INFO_FLAG_CURRENT_MODE_BOOTROM
|
87 DEVICE_INFO_FLAG_UNDERSTANDS_START_FLASH
;
88 if(common_area
.flags
.osimage_present
) c
->arg
[0] |= DEVICE_INFO_FLAG_OSIMAGE_PRESENT
;
89 UsbSendPacket(packet
, len
);
93 /* The temporary write buffer of the embedded flash controller is mapped to the
94 * whole memory region, only the last 8 bits are decoded.
96 p
= (volatile DWORD
*)&_flash_start
;
97 for(i
= 0; i
< 12; i
++) {
98 p
[i
+c
->arg
[0]] = c
->d
.asDwords
[i
];
102 case CMD_FINISH_WRITE
:
103 p
= (volatile DWORD
*)&_flash_start
;
104 for(i
= 0; i
< 4; i
++) {
105 p
[i
+60] = c
->d
.asDwords
[i
];
108 /* Check that the address that we are supposed to write to is within our allowed region */
109 if( ((c
->arg
[0]+AT91C_IFLASH_PAGE_SIZE
-1) >= end_addr
) || (c
->arg
[0] < start_addr
) ) {
113 UsbSendPacket(packet
, len
);
115 /* Translate address to flash page and do flash, update here for the 512k part */
116 AT91C_BASE_EFC0
->EFC_FCR
= MC_FLASH_COMMAND_KEY
|
117 MC_FLASH_COMMAND_PAGEN((c
->arg
[0]-(int)&_flash_start
)/AT91C_IFLASH_PAGE_SIZE
) |
118 AT91C_MC_FCMD_START_PROG
;
123 while(!((sr
= AT91C_BASE_EFC0
->EFC_FSR
) & MC_FLASH_STATUS_READY
))
125 if(sr
& (MC_FLASH_STATUS_LOCKE
| MC_FLASH_STATUS_PROGE
)) {
128 UsbSendPacket(packet
, len
);
132 case CMD_HARDWARE_RESET
:
133 USB_D_PLUS_PULLUP_OFF();
134 AT91C_BASE_RSTC
->RSTC_RCR
= RST_CONTROL_KEY
| AT91C_RSTC_PROCRST
;
137 case CMD_START_FLASH
:
138 if(c
->arg
[2] == START_FLASH_MAGIC
) bootrom_unlocked
= 1;
139 else bootrom_unlocked
= 0;
141 int prot_start
= (int)&_bootrom_start
;
142 int prot_end
= (int)&_bootrom_end
;
143 int allow_start
= (int)&_flash_start
;
144 int allow_end
= (int)&_flash_end
;
145 int cmd_start
= c
->arg
[0];
146 int cmd_end
= c
->arg
[1];
148 /* Only allow command if the bootrom is unlocked, or the parameters are outside of the protected
149 * bootrom area. In any case they must be within the flash area.
151 if( (bootrom_unlocked
|| ((cmd_start
>= prot_end
) || (cmd_end
< prot_start
)))
152 && (cmd_start
>= allow_start
) && (cmd_end
<= allow_end
) ) {
153 start_addr
= cmd_start
;
156 start_addr
= end_addr
= 0;
159 UsbSendPacket(packet
, len
);
171 UsbSendPacket(packet
, len
);
175 static void flash_mode(int externally_entered
)
179 bootrom_unlocked
= 0;
187 if(!externally_entered
&& !BUTTON_PRESS()) {
188 /* Perform a reset to leave flash mode */
189 USB_D_PLUS_PULLUP_OFF();
191 AT91C_BASE_RSTC
->RSTC_RCR
= RST_CONTROL_KEY
| AT91C_RSTC_PROCRST
;
194 if(externally_entered
&& BUTTON_PRESS()) {
195 /* Let the user's button press override the automatic leave */
196 externally_entered
= 0;
201 extern char _osimage_entry
;
205 // First set up all the I/O pins; GPIOs configured directly, other ones
206 // just need to be assigned to the appropriate peripheral.
208 // Kill all the pullups, especially the one on USB D+; leave them for
209 // the unused pins, though.
210 AT91C_BASE_PIOA
->PIO_PPUDR
=
228 // (and add GPIO_FPGA_ON)
229 // These pins are outputs
230 AT91C_BASE_PIOA
->PIO_OER
=
237 // PIO controls the following pins
238 AT91C_BASE_PIOA
->PIO_PER
=
245 USB_D_PLUS_PULLUP_OFF();
251 // if 512K FLASH part - TODO make some defines :)
252 if ((AT91C_BASE_DBGU
->DBGU_CIDR
| 0xf00) == 0xa00) {
253 AT91C_BASE_EFC0
->EFC_FMR
=
254 MC_FLASH_MODE_FLASH_WAIT_STATES(1) |
255 MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48);
256 AT91C_BASE_EFC1
->EFC_FMR
=
257 MC_FLASH_MODE_FLASH_WAIT_STATES(1) |
258 MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48);
260 AT91C_BASE_EFC0
->EFC_FMR
=
261 MC_FLASH_MODE_FLASH_WAIT_STATES(0) |
262 MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);
265 // Initialize all system clocks
270 int common_area_present
= 0;
271 switch(AT91C_BASE_RSTC
->RSTC_RSR
& AT91C_RSTC_RSTTYP
) {
272 case AT91C_RSTC_RSTTYP_WATCHDOG
:
273 case AT91C_RSTC_RSTTYP_SOFTWARE
:
274 case AT91C_RSTC_RSTTYP_USER
:
275 /* In these cases the common_area in RAM should be ok, retain it if it's there */
276 if(common_area
.magic
== COMMON_AREA_MAGIC
&& common_area
.version
== 1) {
277 common_area_present
= 1;
280 default: /* Otherwise, initialize it from scratch */
284 if(!common_area_present
){
285 /* Common area not ok, initialize it */
286 int i
; for(i
=0; i
<sizeof(common_area
); i
++) { /* Makeshift memset, no need to drag util.c into this */
287 ((char*)&common_area
)[i
] = 0;
289 common_area
.magic
= COMMON_AREA_MAGIC
;
290 common_area
.version
= 1;
291 common_area
.flags
.bootrom_present
= 1;
294 common_area
.flags
.bootrom_present
= 1;
295 if(common_area
.command
== COMMON_AREA_COMMAND_ENTER_FLASH_MODE
) {
296 common_area
.command
= COMMON_AREA_COMMAND_NONE
;
298 } else if(BUTTON_PRESS()) {
301 // jump to Flash address of the osimage entry point (LSBit set for thumb mode)
302 asm("bx %0\n" : : "r" ( ((int)&_osimage_entry
) | 0x1 ) );