cvs.zerfleddert.de Git - proxmark3-svn/blob - fpga/hi_read_rx_xcorr.v

   1 //-----------------------------------------------------------------------------
   2 //
   3 // Jonathan Westhues, April 2006
   4 //-----------------------------------------------------------------------------
   5
   6 module hi_read_rx_xcorr(
   7     pck0, ck_1356meg, ck_1356megb,
   8     pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
   9     adc_d, adc_clk,
  10     ssp_frame, ssp_din, ssp_dout, ssp_clk,
  11     cross_hi, cross_lo,
  12     dbg,
  13     xcorr_is_848, snoop, xcorr_quarter_freq
  14 );
  15     input pck0, ck_1356meg, ck_1356megb;
  16     output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
  17     input [7:0] adc_d;
  18     output adc_clk;
  19     input ssp_dout;
  20     output ssp_frame, ssp_din, ssp_clk;
  21     input cross_hi, cross_lo;
  22     output dbg;
  23     input xcorr_is_848, snoop, xcorr_quarter_freq;
  24
  25 // Carrier is steady on through this, unless we're snooping.
  26 assign pwr_hi = ck_1356megb & (~snoop);
  27 assign pwr_oe1 = 1'b0;
  28 assign pwr_oe3 = 1'b0;
  29 assign pwr_oe4 = 1'b0;
  30 // Unused.
  31 assign pwr_lo = 1'b0;
  32 assign pwr_oe2 = 1'b0;
  33
  34 assign adc_clk = ck_1356megb;  // sample frequency is 13,56 MHz
  35
  36 // When we're a reader, we just need to do the BPSK demod; but when we're an
  37 // eavesdropper, we also need to pick out the commands sent by the reader,
  38 // using AM. Do this the same way that we do it for the simulated tag.
  39 reg after_hysteresis, after_hysteresis_prev, after_hysteresis_prev_prev;
  40 reg [11:0] has_been_low_for;
  41 always @(negedge adc_clk)
  42 begin
  43     if(& adc_d[7:0]) after_hysteresis <= 1'b1;
  44     else if(~(| adc_d[7:0])) after_hysteresis <= 1'b0;
  45
  46     if(after_hysteresis)
  47     begin
  48         has_been_low_for <= 7'b0;
  49     end
  50     else
  51     begin
  52         if(has_been_low_for == 12'd4095)
  53         begin
  54             has_been_low_for <= 12'd0;
  55             after_hysteresis <= 1'b1;
  56         end
  57         else
  58             has_been_low_for <= has_been_low_for + 1;
  59     end
  60 end
  61
  62
  63 // Let us report a correlation every 64 samples. I.e.
  64 // one Q/I pair after 4 subcarrier cycles for the 848kHz subcarrier,
  65 // one Q/I pair after 2 subcarrier cycles for the 424kHz subcarriers,
  66 // one Q/I pair for each subcarrier cyle for the 212kHz subcarrier.
  67 // We need a 6-bit counter for the timing.
  68 reg [5:0] corr_i_cnt;
  69 always @(negedge adc_clk)
  70 begin
  71         corr_i_cnt <= corr_i_cnt + 1;
  72 end
  73
  74 // And a couple of registers in which to accumulate the correlations. From the 64 samples
  75 // we would add at most 32 times the difference between unmodulated and modulated signal. It should
  76 // be safe to assume that a tag will not be able to modulate the carrier signal by more than 25%.
  77 // 32 * 255 * 0,25 = 2040, which can be held in 11 bits. Add 1 bit for sign.
  78 // Temporary we might need more bits. For the 212kHz subcarrier we could possible add 32 times the
  79 // maximum signal value before a first subtraction would occur. 32 * 255 = 8160 can be held in 13 bits.
  80 // Add one bit for sign -> need 14 bit registers but final result will fit into 12 bits.
  81 reg signed [13:0] corr_i_accum;
  82 reg signed [13:0] corr_q_accum;
  83 // we will report maximum 8 significant bits
  84 reg signed [7:0] corr_i_out;
  85 reg signed [7:0] corr_q_out;
  86 // clock and frame signal for communication to ARM
  87 reg ssp_clk;
  88 reg ssp_frame;
  89
  90
  91 // The subcarrier reference signals
  92 reg subcarrier_I;
  93 reg subcarrier_Q;
  94
  95 always @(corr_i_cnt or xcorr_is_848 or xcorr_quarter_freq)
  96 begin
  97         if (xcorr_is_848 & ~xcorr_quarter_freq)                         // 848 kHz
  98                 begin
  99                         subcarrier_I = ~corr_i_cnt[3];
 100                         subcarrier_Q = ~(corr_i_cnt[3] ^ corr_i_cnt[2]);
 101                 end
 102         else if (xcorr_is_848 & xcorr_quarter_freq)                     // 212 kHz
 103                 begin
 104                         subcarrier_I = ~corr_i_cnt[5];
 105                         subcarrier_Q = ~(corr_i_cnt[5] ^ corr_i_cnt[4]);
 106                 end
 107         else
 108                 begin                                                                                   // 424 kHz
 109                         subcarrier_I = ~corr_i_cnt[4];
 110                         subcarrier_Q = ~(corr_i_cnt[4] ^ corr_i_cnt[3]);
 111                 end
 112 end
 113
 114 // ADC data appears on the rising edge, so sample it on the falling edge
 115 always @(negedge adc_clk)
 116 begin
 117     // These are the correlators: we correlate against in-phase and quadrature
 118     // versions of our reference signal, and keep the (signed) result to
 119     // send out later over the SSP.
 120     if(corr_i_cnt == 6'd0)
 121     begin
 122         if(snoop)
 123         begin
 124                         // Send 7 most significant bits of tag signal (signed), plus 1 bit reader signal
 125                         if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
 126                                 corr_i_out <= {corr_i_accum[11:5], after_hysteresis_prev_prev};
 127                         else // truncate to maximum value
 128                                 if (corr_i_accum[13] == 1'b0)
 129                                         corr_i_out <= {7'b0111111, after_hysteresis_prev_prev};
 130                                 else
 131                                         corr_i_out <= {7'b1000000, after_hysteresis_prev_prev};
 132                         if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
 133                                 corr_q_out <= {corr_q_accum[11:5], after_hysteresis_prev};
 134                         else // truncate to maximum value
 135                                 if (corr_q_accum[13] == 1'b0)
 136                                         corr_q_out <= {7'b0111111, after_hysteresis_prev};
 137                                 else
 138                                         corr_q_out <= {7'b1000000, after_hysteresis_prev};
 139                         after_hysteresis_prev_prev <= after_hysteresis;
 140         end
 141         else
 142         begin
 143             // Send 8 bits of tag signal
 144                         if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
 145                                 corr_i_out <= corr_i_accum[11:4];
 146                         else // truncate to maximum value
 147                                 if (corr_i_accum[13] == 1'b0)
 148                                         corr_i_out <= 8'b01111111;
 149                                 else
 150                                         corr_i_out <= 8'b10000000;
 151                         if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
 152                                 corr_q_out <= corr_q_accum[11:4];
 153                         else // truncate to maximum value
 154                                 if (corr_q_accum[13] == 1'b0)
 155                                         corr_q_out <= 8'b01111111;
 156                                 else
 157                                         corr_q_out <= 8'b10000000;
 158         end
 159                 // Initialize next correlation.
 160                 // Both I and Q reference signals are high when corr_i_nct == 0. Therefore need to accumulate.
 161         corr_i_accum <= $signed({1'b0,adc_d});
 162         corr_q_accum <= $signed({1'b0,adc_d});
 163     end
 164     else
 165     begin
 166         if (subcarrier_I)
 167             corr_i_accum <= corr_i_accum + $signed({1'b0,adc_d});
 168         else
 169             corr_i_accum <= corr_i_accum - $signed({1'b0,adc_d});
 170
 171         if (subcarrier_Q)
 172             corr_q_accum <= corr_q_accum + $signed({1'b0,adc_d});
 173         else
 174             corr_q_accum <= corr_q_accum - $signed({1'b0,adc_d});
 175
 176     end
 177
 178         // for each Q/I pair report two reader signal samples when sniffing
 179     if(corr_i_cnt == 6'd32)
 180         after_hysteresis_prev <= after_hysteresis;
 181
 182     // Then the result from last time is serialized and send out to the ARM.
 183     // We get one report each cycle, and each report is 16 bits, so the
 184     // ssp_clk should be the adc_clk divided by 64/16 = 4.
 185
 186     if(corr_i_cnt[1:0] == 2'b10)
 187         ssp_clk <= 1'b0;
 188
 189     if(corr_i_cnt[1:0] == 2'b00)
 190     begin
 191         ssp_clk <= 1'b1;
 192         // Don't shift if we just loaded new data, obviously.
 193         if(corr_i_cnt != 6'd0)
 194         begin
 195             corr_i_out[7:0] <= {corr_i_out[6:0], corr_q_out[7]};
 196             corr_q_out[7:1] <= corr_q_out[6:0];
 197         end
 198     end
 199
 200     // set ssp_frame signal for corr_i_cnt = 0..3
 201     // (send one frame with 16 Bits)
 202     if(corr_i_cnt[5:2] == 4'b0000)
 203         ssp_frame = 1'b1;
 204     else
 205         ssp_frame = 1'b0;
 206
 207 end
 208
 209 assign ssp_din = corr_i_out[7];
 210
 211 assign dbg = corr_i_cnt[3];
 212
 213 endmodule