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Support TCP ports for proxmark (#720)
[proxmark3-svn] / armsrc / iso15693.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "depricated"
51 // *) document all the functions
52
53
54 #include "proxmark3.h"
55 #include "util.h"
56 #include "apps.h"
57 #include "string.h"
58 #include "iso15693tools.h"
59 #include "protocols.h"
60 #include "cmd.h"
61
62 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
63
64 static int DEBUG = 0;
65
66 ///////////////////////////////////////////////////////////////////////
67 // ISO 15693 Part 2 - Air Interface
68 // This section basicly contains transmission and receiving of bits
69 ///////////////////////////////////////////////////////////////////////
70
71 #define FrameSOF Iso15693FrameSOF
72 #define Logic0 Iso15693Logic0
73 #define Logic1 Iso15693Logic1
74 #define FrameEOF Iso15693FrameEOF
75
76 #define Crc(data,datalen) Iso15693Crc(data,datalen)
77 #define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
78 #define sprintUID(target,uid) Iso15693sprintUID(target,uid)
79
80 // approximate amplitude=sqrt(ci^2+cq^2) by amplitude = max(|ci|,|cq|) + 1/2*min(|ci|,|cq|)
81 #define AMPLITUDE(ci, cq) (MAX(ABS(ci), ABS(cq)) + MIN(ABS(ci), ABS(cq))/2)
82
83 // buffers
84 #define ISO15693_DMA_BUFFER_SIZE 128
85 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
86 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
87
88 // timing. Delays in SSP_CLK ticks.
89 #define DELAY_READER_TO_ARM 8
90 #define DELAY_ARM_TO_READER 1
91 #define DELAY_ISO15693_VCD_TO_VICC 132 // 132/423.75kHz = 311.5us from end of EOF to start of tag response
92
93 // ---------------------------
94 // Signal Processing
95 // ---------------------------
96
97 // prepare data using "1 out of 4" code for later transmission
98 // resulting data rate is 26.48 kbit/s (fc/512)
99 // cmd ... data
100 // n ... length of data
101 static void CodeIso15693AsReader(uint8_t *cmd, int n)
102 {
103 int i, j;
104
105 ToSendReset();
106
107 // Give it a bit of slack at the beginning
108 for(i = 0; i < 24; i++) {
109 ToSendStuffBit(1);
110 }
111
112 // SOF for 1of4
113 ToSendStuffBit(0);
114 ToSendStuffBit(1);
115 ToSendStuffBit(1);
116 ToSendStuffBit(1);
117 ToSendStuffBit(1);
118 ToSendStuffBit(0);
119 ToSendStuffBit(1);
120 ToSendStuffBit(1);
121 for(i = 0; i < n; i++) {
122 for(j = 0; j < 8; j += 2) {
123 int these = (cmd[i] >> j) & 3;
124 switch(these) {
125 case 0:
126 ToSendStuffBit(1);
127 ToSendStuffBit(0);
128 ToSendStuffBit(1);
129 ToSendStuffBit(1);
130 ToSendStuffBit(1);
131 ToSendStuffBit(1);
132 ToSendStuffBit(1);
133 ToSendStuffBit(1);
134 break;
135 case 1:
136 ToSendStuffBit(1);
137 ToSendStuffBit(1);
138 ToSendStuffBit(1);
139 ToSendStuffBit(0);
140 ToSendStuffBit(1);
141 ToSendStuffBit(1);
142 ToSendStuffBit(1);
143 ToSendStuffBit(1);
144 break;
145 case 2:
146 ToSendStuffBit(1);
147 ToSendStuffBit(1);
148 ToSendStuffBit(1);
149 ToSendStuffBit(1);
150 ToSendStuffBit(1);
151 ToSendStuffBit(0);
152 ToSendStuffBit(1);
153 ToSendStuffBit(1);
154 break;
155 case 3:
156 ToSendStuffBit(1);
157 ToSendStuffBit(1);
158 ToSendStuffBit(1);
159 ToSendStuffBit(1);
160 ToSendStuffBit(1);
161 ToSendStuffBit(1);
162 ToSendStuffBit(1);
163 ToSendStuffBit(0);
164 break;
165 }
166 }
167 }
168 // EOF
169 ToSendStuffBit(1);
170 ToSendStuffBit(1);
171 ToSendStuffBit(0);
172 ToSendStuffBit(1);
173
174 // Fill remainder of last byte with 1
175 for(i = 0; i < 4; i++) {
176 ToSendStuffBit(1);
177 }
178
179 ToSendMax++;
180 }
181
182 // encode data using "1 out of 256" scheme
183 // data rate is 1,66 kbit/s (fc/8192)
184 // is designed for more robust communication over longer distances
185 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
186 {
187 int i, j;
188
189 ToSendReset();
190
191 // Give it a bit of slack at the beginning
192 for(i = 0; i < 24; i++) {
193 ToSendStuffBit(1);
194 }
195
196 // SOF for 1of256
197 ToSendStuffBit(0);
198 ToSendStuffBit(1);
199 ToSendStuffBit(1);
200 ToSendStuffBit(1);
201 ToSendStuffBit(1);
202 ToSendStuffBit(1);
203 ToSendStuffBit(1);
204 ToSendStuffBit(0);
205
206 for(i = 0; i < n; i++) {
207 for (j = 0; j<=255; j++) {
208 if (cmd[i]==j) {
209 ToSendStuffBit(1);
210 ToSendStuffBit(0);
211 } else {
212 ToSendStuffBit(1);
213 ToSendStuffBit(1);
214 }
215 }
216 }
217 // EOF
218 ToSendStuffBit(1);
219 ToSendStuffBit(1);
220 ToSendStuffBit(0);
221 ToSendStuffBit(1);
222
223 // Fill remainder of last byte with 1
224 for(i = 0; i < 4; i++) {
225 ToSendStuffBit(1);
226 }
227
228 ToSendMax++;
229 }
230
231
232 static void CodeIso15693AsTag(uint8_t *cmd, int n)
233 {
234 ToSendReset();
235
236 // SOF
237 ToSendStuffBit(0);
238 ToSendStuffBit(0);
239 ToSendStuffBit(0);
240 ToSendStuffBit(1);
241 ToSendStuffBit(1);
242 ToSendStuffBit(1);
243 ToSendStuffBit(0);
244 ToSendStuffBit(1);
245
246 // data
247 for(int i = 0; i < n; i++) {
248 for(int j = 0; j < 8; j++) {
249 if ((cmd[i] >> j) & 0x01) {
250 ToSendStuffBit(0);
251 ToSendStuffBit(1);
252 } else {
253 ToSendStuffBit(1);
254 ToSendStuffBit(0);
255 }
256 }
257 }
258
259 // EOF
260 ToSendStuffBit(1);
261 ToSendStuffBit(0);
262 ToSendStuffBit(1);
263 ToSendStuffBit(1);
264 ToSendStuffBit(1);
265 ToSendStuffBit(0);
266 ToSendStuffBit(0);
267 ToSendStuffBit(0);
268
269 ToSendMax++;
270 }
271
272
273 // Transmit the command (to the tag) that was placed in cmd[].
274 static void TransmitTo15693Tag(const uint8_t *cmd, int len)
275 {
276 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
277 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
278
279 LED_B_ON();
280 for(int c = 0; c < len; ) {
281 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
282 AT91C_BASE_SSC->SSC_THR = ~cmd[c];
283 c++;
284 }
285 WDT_HIT();
286 }
287 LED_B_OFF();
288 }
289
290 //-----------------------------------------------------------------------------
291 // Transmit the tag response (to the reader) that was placed in cmd[].
292 //-----------------------------------------------------------------------------
293 static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
294 {
295 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
297
298 uint8_t shift_delay = start_time & 0x00000007;
299 uint8_t bitmask = 0x00;
300 for (int i = 0; i < shift_delay; i++) {
301 bitmask |= (0x01 << i);
302 }
303
304 while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
305 AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
306
307 LED_C_ON();
308 uint8_t bits_to_shift = 0x00;
309 for(size_t c = 0; c <= len; c++) {
310 uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
311 bits_to_shift = cmd[c] & bitmask;
312 for (int i = 7; i >= 0; i--) {
313 for (int j = 0; j < (slow?4:1); ) {
314 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
315 if (bits_to_send >> i & 0x01) {
316 AT91C_BASE_SSC->SSC_THR = 0xff;
317 } else {
318 AT91C_BASE_SSC->SSC_THR = 0x00;
319 }
320 j++;
321 }
322 WDT_HIT();
323 }
324 }
325 }
326 LED_C_OFF();
327 }
328
329
330 //=============================================================================
331 // An ISO 15693 decoder for tag responses (one subcarrier only).
332 // Uses cross correlation to identify the SOF, each bit, and EOF.
333 // This function is called 8 times per bit (every 2 subcarrier cycles).
334 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
335 // i.e. function is called every 4,72us
336 // LED handling:
337 // LED C -> ON once we have received the SOF and are expecting the rest.
338 // LED C -> OFF once we have received EOF or are unsynced
339 //
340 // Returns: true if we received a EOF
341 // false if we are still waiting for some more
342 //=============================================================================
343
344 #define SUBCARRIER_DETECT_THRESHOLD 2
345 #define SOF_CORRELATOR_LEN (1<<5)
346
347 typedef struct DecodeTag {
348 enum {
349 STATE_TAG_UNSYNCD,
350 STATE_TAG_AWAIT_SOF_1,
351 STATE_TAG_AWAIT_SOF_2,
352 STATE_TAG_RECEIVING_DATA,
353 STATE_TAG_AWAIT_EOF
354 } state;
355 int bitCount;
356 int posCount;
357 enum {
358 LOGIC0,
359 LOGIC1,
360 SOF_PART1,
361 SOF_PART2
362 } lastBit;
363 uint16_t shiftReg;
364 uint8_t *output;
365 int len;
366 int sum1, sum2;
367 uint8_t SOF_low;
368 uint8_t SOF_high;
369 uint8_t SOF_last;
370 int32_t SOF_corr;
371 int32_t SOF_corr_prev;
372 uint8_t SOF_correlator[SOF_CORRELATOR_LEN];
373 } DecodeTag_t;
374
375 static int Handle15693SamplesFromTag(int8_t ci, int8_t cq, DecodeTag_t *DecodeTag)
376 {
377 switch(DecodeTag->state) {
378 case STATE_TAG_UNSYNCD:
379 // initialize SOF correlator. We are looking for 12 samples low and 12 samples high.
380 DecodeTag->SOF_low = 0;
381 DecodeTag->SOF_high = 12;
382 DecodeTag->SOF_last = 23;
383 memset(DecodeTag->SOF_correlator, 0x00, DecodeTag->SOF_last + 1);
384 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
385 DecodeTag->SOF_corr = DecodeTag->SOF_correlator[DecodeTag->SOF_last];
386 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
387 // initialize Decoder
388 DecodeTag->posCount = 0;
389 DecodeTag->bitCount = 0;
390 DecodeTag->len = 0;
391 DecodeTag->state = STATE_TAG_AWAIT_SOF_1;
392 break;
393
394 case STATE_TAG_AWAIT_SOF_1:
395 // calculate the correlation in real time. Look at differences only.
396 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_low++];
397 DecodeTag->SOF_corr -= 2*DecodeTag->SOF_correlator[DecodeTag->SOF_high++];
398 DecodeTag->SOF_last++;
399 DecodeTag->SOF_low &= (SOF_CORRELATOR_LEN-1);
400 DecodeTag->SOF_high &= (SOF_CORRELATOR_LEN-1);
401 DecodeTag->SOF_last &= (SOF_CORRELATOR_LEN-1);
402 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
403 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_last];
404
405 // if correlation increases for 10 consecutive samples, we are close to maximum correlation
406 if (DecodeTag->SOF_corr > DecodeTag->SOF_corr_prev + SUBCARRIER_DETECT_THRESHOLD) {
407 DecodeTag->posCount++;
408 } else {
409 DecodeTag->posCount = 0;
410 }
411
412 if (DecodeTag->posCount == 10) { // correlation increased 10 times
413 DecodeTag->state = STATE_TAG_AWAIT_SOF_2;
414 }
415
416 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
417
418 break;
419
420 case STATE_TAG_AWAIT_SOF_2:
421 // calculate the correlation in real time. Look at differences only.
422 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_low++];
423 DecodeTag->SOF_corr -= 2*DecodeTag->SOF_correlator[DecodeTag->SOF_high++];
424 DecodeTag->SOF_last++;
425 DecodeTag->SOF_low &= (SOF_CORRELATOR_LEN-1);
426 DecodeTag->SOF_high &= (SOF_CORRELATOR_LEN-1);
427 DecodeTag->SOF_last &= (SOF_CORRELATOR_LEN-1);
428 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
429 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_last];
430
431 if (DecodeTag->SOF_corr >= DecodeTag->SOF_corr_prev) { // we are looking for the maximum correlation
432 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
433 } else {
434 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF
435 DecodeTag->sum1 = DecodeTag->SOF_correlator[DecodeTag->SOF_last];
436 DecodeTag->sum2 = 0;
437 DecodeTag->posCount = 2;
438 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
439 LED_C_ON();
440 }
441
442 break;
443
444 case STATE_TAG_RECEIVING_DATA:
445 if (DecodeTag->posCount == 1) {
446 DecodeTag->sum1 = 0;
447 DecodeTag->sum2 = 0;
448 }
449
450 if (DecodeTag->posCount <= 4) {
451 DecodeTag->sum1 += AMPLITUDE(ci, cq);
452 } else {
453 DecodeTag->sum2 += AMPLITUDE(ci, cq);
454 }
455
456 if (DecodeTag->posCount == 8) {
457 int16_t corr_1 = (DecodeTag->sum2 - DecodeTag->sum1) / 4;
458 int16_t corr_0 = (DecodeTag->sum1 - DecodeTag->sum2) / 4;
459 int16_t corr_EOF = (DecodeTag->sum1 + DecodeTag->sum2) / 8;
460 if (corr_EOF > corr_0 && corr_EOF > corr_1) {
461 DecodeTag->state = STATE_TAG_AWAIT_EOF;
462 } else if (corr_1 > corr_0) {
463 // logic 1
464 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
465 DecodeTag->lastBit = SOF_PART2;
466 } else {
467 DecodeTag->lastBit = LOGIC1;
468 DecodeTag->shiftReg >>= 1;
469 DecodeTag->shiftReg |= 0x80;
470 DecodeTag->bitCount++;
471 if (DecodeTag->bitCount == 8) {
472 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
473 DecodeTag->len++;
474 DecodeTag->bitCount = 0;
475 DecodeTag->shiftReg = 0;
476 }
477 }
478 } else {
479 // logic 0
480 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
481 DecodeTag->state = STATE_TAG_UNSYNCD;
482 LED_C_OFF();
483 } else {
484 DecodeTag->lastBit = LOGIC0;
485 DecodeTag->shiftReg >>= 1;
486 DecodeTag->bitCount++;
487 if (DecodeTag->bitCount == 8) {
488 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
489 DecodeTag->len++;
490 DecodeTag->bitCount = 0;
491 DecodeTag->shiftReg = 0;
492 }
493 }
494 }
495 DecodeTag->posCount = 0;
496 }
497 DecodeTag->posCount++;
498 break;
499
500 case STATE_TAG_AWAIT_EOF:
501 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
502 LED_C_OFF();
503 return true;
504 } else {
505 DecodeTag->state = STATE_TAG_UNSYNCD;
506 LED_C_OFF();
507 }
508 break;
509
510 default:
511 DecodeTag->state = STATE_TAG_UNSYNCD;
512 LED_C_OFF();
513 break;
514 }
515
516 return false;
517 }
518
519
520 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data)
521 {
522 DecodeTag->output = data;
523 DecodeTag->state = STATE_TAG_UNSYNCD;
524 }
525
526 /*
527 * Receive and decode the tag response, also log to tracebuffer
528 */
529 static int GetIso15693AnswerFromTag(uint8_t* response, int timeout)
530 {
531 int maxBehindBy = 0;
532 int lastRxCounter, samples = 0;
533 int8_t ci, cq;
534 bool gotFrame = false;
535
536 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
537
538 // the Decoder data structure
539 DecodeTag_t DecodeTag;
540 DecodeTagInit(&DecodeTag, response);
541
542 // wait for last transfer to complete
543 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
544
545 // And put the FPGA in the appropriate mode
546 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
547
548 // Setup and start DMA.
549 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
550 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
551 uint16_t *upTo = dmaBuf;
552 lastRxCounter = ISO15693_DMA_BUFFER_SIZE;
553
554 for(;;) {
555 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO15693_DMA_BUFFER_SIZE-1);
556 if(behindBy > maxBehindBy) {
557 maxBehindBy = behindBy;
558 }
559
560 if (behindBy < 1) continue;
561
562 ci = (int8_t)(*upTo >> 8);
563 cq = (int8_t)(*upTo & 0xff);
564
565 upTo++;
566 lastRxCounter--;
567 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
568 upTo = dmaBuf; // start reading the circular buffer from the beginning
569 lastRxCounter += ISO15693_DMA_BUFFER_SIZE;
570 }
571 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
572 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
573 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
574 }
575 samples++;
576
577 if (Handle15693SamplesFromTag(ci, cq, &DecodeTag)) {
578 gotFrame = true;
579 break;
580 }
581
582 if(samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
583 DecodeTag.len = 0;
584 break;
585 }
586
587 }
588
589 FpgaDisableSscDma();
590
591 if (DEBUG) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
592 maxBehindBy, samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
593
594 if (tracing && DecodeTag.len > 0) {
595 LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false);
596 }
597
598 return DecodeTag.len;
599 }
600
601
602 //=============================================================================
603 // An ISO15693 decoder for reader commands.
604 //
605 // This function is called 4 times per bit (every 2 subcarrier cycles).
606 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
607 // LED handling:
608 // LED B -> ON once we have received the SOF and are expecting the rest.
609 // LED B -> OFF once we have received EOF or are in error state or unsynced
610 //
611 // Returns: true if we received a EOF
612 // false if we are still waiting for some more
613 //=============================================================================
614
615 typedef struct DecodeReader {
616 enum {
617 STATE_READER_UNSYNCD,
618 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
619 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
620 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
621 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
622 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
623 STATE_READER_RECEIVE_DATA_1_OUT_OF_256
624 } state;
625 enum {
626 CODING_1_OUT_OF_4,
627 CODING_1_OUT_OF_256
628 } Coding;
629 uint8_t shiftReg;
630 uint8_t bitCount;
631 int byteCount;
632 int byteCountMax;
633 int posCount;
634 int sum1, sum2;
635 uint8_t *output;
636 } DecodeReader_t;
637
638
639 static int Handle15693SampleFromReader(uint8_t bit, DecodeReader_t* DecodeReader)
640 {
641 switch(DecodeReader->state) {
642 case STATE_READER_UNSYNCD:
643 if(!bit) {
644 // we went low, so this could be the beginning of a SOF
645 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
646 DecodeReader->posCount = 1;
647 }
648 break;
649
650 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
651 DecodeReader->posCount++;
652 if(bit) { // detected rising edge
653 if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
654 DecodeReader->state = STATE_READER_UNSYNCD;
655 } else { // SOF
656 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
657 }
658 } else {
659 if(DecodeReader->posCount > 5) { // stayed low for too long
660 DecodeReader->state = STATE_READER_UNSYNCD;
661 } else {
662 // do nothing, keep waiting
663 }
664 }
665 break;
666
667 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
668 DecodeReader->posCount++;
669 if(!bit) { // detected a falling edge
670 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
671 DecodeReader->state = STATE_READER_UNSYNCD;
672 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
673 DecodeReader->Coding = CODING_1_OUT_OF_4;
674 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
675 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
676 DecodeReader->state = STATE_READER_UNSYNCD;
677 } else { // SOF for 1 out of 4 coding
678 DecodeReader->Coding = CODING_1_OUT_OF_256;
679 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
680 }
681 } else {
682 if(DecodeReader->posCount > 29) { // stayed high for too long
683 DecodeReader->state = STATE_READER_UNSYNCD;
684 } else {
685 // do nothing, keep waiting
686 }
687 }
688 break;
689
690 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
691 DecodeReader->posCount++;
692 if (bit) { // detected rising edge
693 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
694 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
695 DecodeReader->state = STATE_READER_UNSYNCD;
696 } else {
697 DecodeReader->posCount = 1;
698 DecodeReader->bitCount = 0;
699 DecodeReader->byteCount = 0;
700 DecodeReader->sum1 = 1;
701 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
702 LED_B_ON();
703 }
704 } else { // CODING_1_OUT_OF_4
705 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
706 DecodeReader->state = STATE_READER_UNSYNCD;
707 } else {
708 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
709 }
710 }
711 } else {
712 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
713 if (DecodeReader->posCount > 34) { // signal stayed low for too long
714 DecodeReader->state = STATE_READER_UNSYNCD;
715 } else {
716 // do nothing, keep waiting
717 }
718 } else { // CODING_1_OUT_OF_4
719 if (DecodeReader->posCount > 26) { // signal stayed low for too long
720 DecodeReader->state = STATE_READER_UNSYNCD;
721 } else {
722 // do nothing, keep waiting
723 }
724 }
725 }
726 break;
727
728 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
729 DecodeReader->posCount++;
730 if (bit) {
731 if (DecodeReader->posCount == 33) {
732 DecodeReader->posCount = 1;
733 DecodeReader->bitCount = 0;
734 DecodeReader->byteCount = 0;
735 DecodeReader->sum1 = 1;
736 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
737 LED_B_ON();
738 } else {
739 // do nothing, keep waiting
740 }
741 } else { // unexpected falling edge
742 DecodeReader->state = STATE_READER_UNSYNCD;
743 }
744 break;
745
746 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
747 DecodeReader->posCount++;
748 if (DecodeReader->posCount == 1) {
749 DecodeReader->sum1 = bit;
750 } else if (DecodeReader->posCount <= 4) {
751 DecodeReader->sum1 += bit;
752 } else if (DecodeReader->posCount == 5) {
753 DecodeReader->sum2 = bit;
754 } else {
755 DecodeReader->sum2 += bit;
756 }
757 if (DecodeReader->posCount == 8) {
758 DecodeReader->posCount = 0;
759 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
760 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
761 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
762 if (corr01 > corr11 && corr01 > corr10) { // EOF
763 LED_B_OFF(); // Finished receiving
764 DecodeReader->state = STATE_READER_UNSYNCD;
765 if (DecodeReader->byteCount != 0) {
766 return true;
767 }
768 }
769 if (corr10 > corr11) { // detected a 2bit position
770 DecodeReader->shiftReg >>= 2;
771 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
772 }
773 if (DecodeReader->bitCount == 15) { // we have a full byte
774 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
775 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
776 // buffer overflow, give up
777 LED_B_OFF();
778 DecodeReader->state = STATE_READER_UNSYNCD;
779 }
780 DecodeReader->bitCount = 0;
781 } else {
782 DecodeReader->bitCount++;
783 }
784 }
785 break;
786
787 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
788 DecodeReader->posCount++;
789 if (DecodeReader->posCount == 1) {
790 DecodeReader->sum1 = bit;
791 } else if (DecodeReader->posCount <= 4) {
792 DecodeReader->sum1 += bit;
793 } else if (DecodeReader->posCount == 5) {
794 DecodeReader->sum2 = bit;
795 } else {
796 DecodeReader->sum2 += bit;
797 }
798 if (DecodeReader->posCount == 8) {
799 DecodeReader->posCount = 0;
800 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
801 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
802 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
803 if (corr01 > corr11 && corr01 > corr10) { // EOF
804 LED_B_OFF(); // Finished receiving
805 DecodeReader->state = STATE_READER_UNSYNCD;
806 if (DecodeReader->byteCount != 0) {
807 return true;
808 }
809 }
810 if (corr10 > corr11) { // detected the bit position
811 DecodeReader->shiftReg = DecodeReader->bitCount;
812 }
813 if (DecodeReader->bitCount == 255) { // we have a full byte
814 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
815 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
816 // buffer overflow, give up
817 LED_B_OFF();
818 DecodeReader->state = STATE_READER_UNSYNCD;
819 }
820 }
821 DecodeReader->bitCount++;
822 }
823 break;
824
825 default:
826 LED_B_OFF();
827 DecodeReader->state = STATE_READER_UNSYNCD;
828 break;
829 }
830
831 return false;
832 }
833
834
835 static void DecodeReaderInit(uint8_t *data, uint16_t max_len, DecodeReader_t* DecodeReader)
836 {
837 DecodeReader->output = data;
838 DecodeReader->byteCountMax = max_len;
839 DecodeReader->state = STATE_READER_UNSYNCD;
840 DecodeReader->byteCount = 0;
841 DecodeReader->bitCount = 0;
842 DecodeReader->posCount = 0;
843 DecodeReader->shiftReg = 0;
844 }
845
846
847 //-----------------------------------------------------------------------------
848 // Receive a command (from the reader to us, where we are the simulated tag),
849 // and store it in the given buffer, up to the given maximum length. Keeps
850 // spinning, waiting for a well-framed command, until either we get one
851 // (returns true) or someone presses the pushbutton on the board (false).
852 //
853 // Assume that we're called with the SSC (to the FPGA) and ADC path set
854 // correctly.
855 //-----------------------------------------------------------------------------
856
857 static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
858 {
859 int maxBehindBy = 0;
860 int lastRxCounter, samples = 0;
861 bool gotFrame = false;
862 uint8_t b;
863
864 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
865
866 // the decoder data structure
867 DecodeReader_t DecodeReader = {0};
868 DecodeReaderInit(received, max_len, &DecodeReader);
869
870 // wait for last transfer to complete
871 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
872
873 LED_D_OFF();
874 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
875
876 // clear receive register and wait for next transfer
877 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
878 (void) temp;
879 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
880
881 uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
882
883 // Setup and start DMA.
884 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
885 uint8_t *upTo = dmaBuf;
886 lastRxCounter = ISO15693_DMA_BUFFER_SIZE;
887
888 for(;;) {
889 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO15693_DMA_BUFFER_SIZE-1);
890 if(behindBy > maxBehindBy) {
891 maxBehindBy = behindBy;
892 }
893
894 if (behindBy < 1) continue;
895
896 b = *upTo++;
897 lastRxCounter--;
898 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
899 upTo = dmaBuf; // start reading the circular buffer from the beginning
900 lastRxCounter += ISO15693_DMA_BUFFER_SIZE;
901 }
902 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
903 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
904 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
905 }
906
907 for (int i = 7; i >= 0; i--) {
908 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
909 *eof_time = bit_time + samples - DELAY_READER_TO_ARM; // end of EOF
910 gotFrame = true;
911 break;
912 }
913 samples++;
914 }
915
916 if (gotFrame) {
917 break;
918 }
919
920 if (BUTTON_PRESS()) {
921 DecodeReader.byteCount = 0;
922 break;
923 }
924
925 WDT_HIT();
926 }
927
928
929 FpgaDisableSscDma();
930
931 if (DEBUG) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
932 maxBehindBy, samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
933
934 if (tracing && DecodeReader.byteCount > 0) {
935 LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, 0, NULL, true);
936 }
937
938 return DecodeReader.byteCount;
939 }
940
941
942 static void BuildIdentifyRequest(void);
943 //-----------------------------------------------------------------------------
944 // Start to read an ISO 15693 tag. We send an identify request, then wait
945 // for the response. The response is not demodulated, just left in the buffer
946 // so that it can be downloaded to a PC and processed there.
947 //-----------------------------------------------------------------------------
948 void AcquireRawAdcSamplesIso15693(void)
949 {
950 LEDsoff();
951 LED_A_ON();
952
953 uint8_t *dest = BigBuf_get_addr();
954
955 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
956 BuildIdentifyRequest();
957
958 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
959
960 // Give the tags time to energize
961 LED_D_ON();
962 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
963 SpinDelay(100);
964
965 // Now send the command
966 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
967 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
968
969 LED_B_ON();
970 for(int c = 0; c < ToSendMax; ) {
971 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
972 AT91C_BASE_SSC->SSC_THR = ~ToSend[c];
973 c++;
974 }
975 WDT_HIT();
976 }
977 LED_B_OFF();
978
979 // wait for last transfer to complete
980 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
981
982 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
983 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
984
985 for(int c = 0; c < 4000; ) {
986 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
987 uint16_t iq = AT91C_BASE_SSC->SSC_RHR;
988 // The samples are correlations against I and Q versions of the
989 // tone that the tag AM-modulates. We just want power,
990 // so abs(I) + abs(Q) is close to what we want.
991 int8_t i = (int8_t)(iq >> 8);
992 int8_t q = (int8_t)(iq & 0xff);
993 uint8_t r = AMPLITUDE(i, q);
994 dest[c++] = r;
995 }
996 }
997
998 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
999 LEDsoff();
1000 }
1001
1002
1003 // TODO: there is no trigger condition. The 14000 samples represent a time frame of 66ms.
1004 // It is unlikely that we get something meaningful.
1005 // TODO: Currently we only record tag answers. Add tracing of reader commands.
1006 // TODO: would we get something at all? The carrier is switched on...
1007 void RecordRawAdcSamplesIso15693(void)
1008 {
1009 LEDsoff();
1010 LED_A_ON();
1011
1012 uint8_t *dest = BigBuf_get_addr();
1013
1014 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1015 // Setup SSC
1016 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1017
1018 // Start from off (no field generated)
1019 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1020 SpinDelay(200);
1021
1022 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1023
1024 SpinDelay(100);
1025
1026 LED_D_ON();
1027 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1028
1029 for(int c = 0; c < 14000;) {
1030 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1031 uint16_t iq = AT91C_BASE_SSC->SSC_RHR;
1032 // The samples are correlations against I and Q versions of the
1033 // tone that the tag AM-modulates. We just want power,
1034 // so abs(I) + abs(Q) is close to what we want.
1035 int8_t i = (int8_t)(iq >> 8);
1036 int8_t q = (int8_t)(iq & 0xff);
1037 uint8_t r = AMPLITUDE(i, q);
1038 dest[c++] = r;
1039 }
1040 }
1041
1042 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1043 LED_D_OFF();
1044 Dbprintf("finished recording");
1045 LED_A_OFF();
1046 }
1047
1048
1049 // Initialize the proxmark as iso15k reader
1050 // (this might produces glitches that confuse some tags
1051 static void Iso15693InitReader() {
1052 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1053 // Setup SSC
1054 // FpgaSetupSsc();
1055
1056 // Start from off (no field generated)
1057 LED_D_OFF();
1058 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1059 SpinDelay(10);
1060
1061 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1062 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1063
1064 // Give the tags time to energize
1065 LED_D_ON();
1066 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1067 SpinDelay(250);
1068 }
1069
1070 ///////////////////////////////////////////////////////////////////////
1071 // ISO 15693 Part 3 - Air Interface
1072 // This section basically contains transmission and receiving of bits
1073 ///////////////////////////////////////////////////////////////////////
1074
1075 // Encode (into the ToSend buffers) an identify request, which is the first
1076 // thing that you must send to a tag to get a response.
1077 static void BuildIdentifyRequest(void)
1078 {
1079 uint8_t cmd[5];
1080
1081 uint16_t crc;
1082 // one sub-carrier, inventory, 1 slot, fast rate
1083 // AFI is at bit 5 (1<<4) when doing an INVENTORY
1084 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
1085 // inventory command code
1086 cmd[1] = 0x01;
1087 // no mask
1088 cmd[2] = 0x00;
1089 //Now the CRC
1090 crc = Crc(cmd, 3);
1091 cmd[3] = crc & 0xff;
1092 cmd[4] = crc >> 8;
1093
1094 CodeIso15693AsReader(cmd, sizeof(cmd));
1095 }
1096
1097 // uid is in transmission order (which is reverse of display order)
1098 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1099 {
1100 uint8_t cmd[13];
1101
1102 uint16_t crc;
1103 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1104 // followed by teh block data
1105 // one sub-carrier, inventory, 1 slot, fast rate
1106 cmd[0] = (1 << 6)| (1 << 5) | (1 << 1); // no SELECT bit, ADDR bit, OPTION bit
1107 // READ BLOCK command code
1108 cmd[1] = 0x20;
1109 // UID may be optionally specified here
1110 // 64-bit UID
1111 cmd[2] = uid[0];
1112 cmd[3] = uid[1];
1113 cmd[4] = uid[2];
1114 cmd[5] = uid[3];
1115 cmd[6] = uid[4];
1116 cmd[7] = uid[5];
1117 cmd[8] = uid[6];
1118 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1119 // Block number to read
1120 cmd[10] = blockNumber;//0x00;
1121 //Now the CRC
1122 crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1123 cmd[11] = crc & 0xff;
1124 cmd[12] = crc >> 8;
1125
1126 CodeIso15693AsReader(cmd, sizeof(cmd));
1127 }
1128
1129
1130 // Now the VICC>VCD responses when we are simulating a tag
1131 static void BuildInventoryResponse(uint8_t *uid)
1132 {
1133 uint8_t cmd[12];
1134
1135 uint16_t crc;
1136
1137 cmd[0] = 0; // No error, no protocol format extension
1138 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1139 // 64-bit UID
1140 cmd[2] = uid[7]; //0x32;
1141 cmd[3] = uid[6]; //0x4b;
1142 cmd[4] = uid[5]; //0x03;
1143 cmd[5] = uid[4]; //0x01;
1144 cmd[6] = uid[3]; //0x00;
1145 cmd[7] = uid[2]; //0x10;
1146 cmd[8] = uid[1]; //0x05;
1147 cmd[9] = uid[0]; //0xe0;
1148 //Now the CRC
1149 crc = Crc(cmd, 10);
1150 cmd[10] = crc & 0xff;
1151 cmd[11] = crc >> 8;
1152
1153 CodeIso15693AsTag(cmd, sizeof(cmd));
1154 }
1155
1156 // Universal Method for sending to and recv bytes from a tag
1157 // init ... should we initialize the reader?
1158 // speed ... 0 low speed, 1 hi speed
1159 // **recv will return you a pointer to the received data
1160 // If you do not need the answer use NULL for *recv[]
1161 // return: lenght of received data
1162 int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t **recv) {
1163
1164 LED_A_ON();
1165 LED_B_OFF();
1166 LED_C_OFF();
1167
1168 if (init) Iso15693InitReader();
1169
1170 int answerLen=0;
1171 uint8_t *answer = BigBuf_get_addr() + 4000;
1172 if (recv != NULL) memset(answer, 0, 100);
1173
1174 if (!speed) {
1175 // low speed (1 out of 256)
1176 CodeIso15693AsReader256(send, sendlen);
1177 } else {
1178 // high speed (1 out of 4)
1179 CodeIso15693AsReader(send, sendlen);
1180 }
1181
1182 TransmitTo15693Tag(ToSend,ToSendMax);
1183 // Now wait for a response
1184 if (recv!=NULL) {
1185 answerLen = GetIso15693AnswerFromTag(answer, 100);
1186 *recv=answer;
1187 }
1188
1189 LED_A_OFF();
1190
1191 return answerLen;
1192 }
1193
1194
1195 // --------------------------------------------------------------------
1196 // Debug Functions
1197 // --------------------------------------------------------------------
1198
1199 // Decodes a message from a tag and displays its metadata and content
1200 #define DBD15STATLEN 48
1201 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1202 char status[DBD15STATLEN+1]={0};
1203 uint16_t crc;
1204
1205 if (len>3) {
1206 if (d[0]&(1<<3))
1207 strncat(status,"ProtExt ",DBD15STATLEN);
1208 if (d[0]&1) {
1209 // error
1210 strncat(status,"Error ",DBD15STATLEN);
1211 switch (d[1]) {
1212 case 0x01:
1213 strncat(status,"01:notSupp",DBD15STATLEN);
1214 break;
1215 case 0x02:
1216 strncat(status,"02:notRecog",DBD15STATLEN);
1217 break;
1218 case 0x03:
1219 strncat(status,"03:optNotSupp",DBD15STATLEN);
1220 break;
1221 case 0x0f:
1222 strncat(status,"0f:noInfo",DBD15STATLEN);
1223 break;
1224 case 0x10:
1225 strncat(status,"10:dontExist",DBD15STATLEN);
1226 break;
1227 case 0x11:
1228 strncat(status,"11:lockAgain",DBD15STATLEN);
1229 break;
1230 case 0x12:
1231 strncat(status,"12:locked",DBD15STATLEN);
1232 break;
1233 case 0x13:
1234 strncat(status,"13:progErr",DBD15STATLEN);
1235 break;
1236 case 0x14:
1237 strncat(status,"14:lockErr",DBD15STATLEN);
1238 break;
1239 default:
1240 strncat(status,"unknownErr",DBD15STATLEN);
1241 }
1242 strncat(status," ",DBD15STATLEN);
1243 } else {
1244 strncat(status,"NoErr ",DBD15STATLEN);
1245 }
1246
1247 crc=Crc(d,len-2);
1248 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1249 strncat(status,"CrcOK",DBD15STATLEN);
1250 else
1251 strncat(status,"CrcFail!",DBD15STATLEN);
1252
1253 Dbprintf("%s",status);
1254 }
1255 }
1256
1257
1258
1259 ///////////////////////////////////////////////////////////////////////
1260 // Functions called via USB/Client
1261 ///////////////////////////////////////////////////////////////////////
1262
1263 void SetDebugIso15693(uint32_t debug) {
1264 DEBUG=debug;
1265 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1266 return;
1267 }
1268
1269 //-----------------------------------------------------------------------------
1270 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector
1271 // all demodulation performed in arm rather than host. - greg
1272 //-----------------------------------------------------------------------------
1273 void ReaderIso15693(uint32_t parameter)
1274 {
1275 LEDsoff();
1276 LED_A_ON();
1277
1278 int answerLen1 = 0;
1279 uint8_t TagUID[8] = {0x00};
1280
1281 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1282
1283 uint8_t *answer1 = BigBuf_get_addr() + 4000;
1284 memset(answer1, 0x00, 200);
1285
1286 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1287 // Setup SSC
1288 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1289
1290 // Start from off (no field generated)
1291 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1292 SpinDelay(200);
1293
1294 // Give the tags time to energize
1295 LED_D_ON();
1296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1297 SpinDelay(200);
1298
1299 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1300 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1301
1302 // Now send the IDENTIFY command
1303 BuildIdentifyRequest();
1304
1305 TransmitTo15693Tag(ToSend,ToSendMax);
1306
1307 // Now wait for a response
1308 answerLen1 = GetIso15693AnswerFromTag(answer1, 100) ;
1309
1310 if (answerLen1 >=12) // we should do a better check than this
1311 {
1312 TagUID[0] = answer1[2];
1313 TagUID[1] = answer1[3];
1314 TagUID[2] = answer1[4];
1315 TagUID[3] = answer1[5];
1316 TagUID[4] = answer1[6];
1317 TagUID[5] = answer1[7];
1318 TagUID[6] = answer1[8]; // IC Manufacturer code
1319 TagUID[7] = answer1[9]; // always E0
1320
1321 }
1322
1323 Dbprintf("%d octets read from IDENTIFY request:", answerLen1);
1324 DbdecodeIso15693Answer(answerLen1, answer1);
1325 Dbhexdump(answerLen1, answer1, false);
1326
1327 // UID is reverse
1328 if (answerLen1 >= 12)
1329 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1330 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1331 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1332
1333
1334 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1335 // DbdecodeIso15693Answer(answerLen2,answer2);
1336 // Dbhexdump(answerLen2,answer2,true);
1337
1338 // Dbprintf("%d octets read from XXX request:", answerLen3);
1339 // DbdecodeIso15693Answer(answerLen3,answer3);
1340 // Dbhexdump(answerLen3,answer3,true);
1341
1342 // read all pages
1343 if (answerLen1 >= 12 && DEBUG) {
1344 uint8_t *answer2 = BigBuf_get_addr() + 4100;
1345 int i = 0;
1346 while (i < 32) { // sanity check, assume max 32 pages
1347 BuildReadBlockRequest(TagUID, i);
1348 TransmitTo15693Tag(ToSend, ToSendMax);
1349 int answerLen2 = GetIso15693AnswerFromTag(answer2, 100);
1350 if (answerLen2 > 0) {
1351 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen2);
1352 DbdecodeIso15693Answer(answerLen2, answer2);
1353 Dbhexdump(answerLen2, answer2, false);
1354 if ( *((uint32_t*) answer2) == 0x07160101 ) break; // exit on NoPageErr
1355 }
1356 i++;
1357 }
1358 }
1359
1360 // for the time being, switch field off to protect rdv4.0
1361 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1362 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1363 LED_D_OFF();
1364
1365 LED_A_OFF();
1366 }
1367
1368
1369 // Simulate an ISO15693 TAG.
1370 // For Inventory command: print command and send Inventory Response with given UID
1371 // TODO: interpret other reader commands and send appropriate response
1372 void SimTagIso15693(uint32_t parameter, uint8_t *uid)
1373 {
1374 LEDsoff();
1375 LED_A_ON();
1376
1377 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1378 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1379 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1380 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1381
1382 StartCountSspClk();
1383
1384 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1385
1386 // Build a suitable response to the reader INVENTORY command
1387 BuildInventoryResponse(uid);
1388
1389 // Listen to reader
1390 while (!BUTTON_PRESS()) {
1391 uint32_t eof_time = 0, start_time = 0;
1392 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1393
1394 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1395 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1396 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC - DELAY_ARM_TO_READER;
1397 TransmitTo15693Reader(ToSend, ToSendMax, start_time, slow);
1398 }
1399
1400 Dbprintf("%d bytes read from reader:", cmd_len);
1401 Dbhexdump(cmd_len, cmd, false);
1402 }
1403
1404 LEDsoff();
1405 }
1406
1407
1408 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1409 // (some manufactures offer a way to read the AFI, though)
1410 void BruteforceIso15693Afi(uint32_t speed)
1411 {
1412 LEDsoff();
1413 LED_A_ON();
1414
1415 uint8_t data[20];
1416 uint8_t *recv=data;
1417 int datalen=0, recvlen=0;
1418
1419 Iso15693InitReader();
1420
1421 // first without AFI
1422 // Tags should respond without AFI and with AFI=0 even when AFI is active
1423
1424 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1425 data[1] = ISO15693_INVENTORY;
1426 data[2] = 0; // mask length
1427 datalen = AddCrc(data,3);
1428 recvlen = SendDataTag(data, datalen, false, speed, &recv);
1429 WDT_HIT();
1430 if (recvlen>=12) {
1431 Dbprintf("NoAFI UID=%s",sprintUID(NULL,&recv[2]));
1432 }
1433
1434 // now with AFI
1435
1436 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1437 data[1] = ISO15693_INVENTORY;
1438 data[2] = 0; // AFI
1439 data[3] = 0; // mask length
1440
1441 for (int i=0;i<256;i++) {
1442 data[2]=i & 0xFF;
1443 datalen=AddCrc(data,4);
1444 recvlen=SendDataTag(data, datalen, false, speed, &recv);
1445 WDT_HIT();
1446 if (recvlen>=12) {
1447 Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL,&recv[2]));
1448 }
1449 }
1450 Dbprintf("AFI Bruteforcing done.");
1451
1452 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1453 LEDsoff();
1454 }
1455
1456 // Allows to directly send commands to the tag via the client
1457 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1458
1459 int recvlen=0;
1460 uint8_t *recvbuf = BigBuf_get_addr();
1461
1462 LED_A_ON();
1463
1464 if (DEBUG) {
1465 Dbprintf("SEND");
1466 Dbhexdump(datalen, data, false);
1467 }
1468
1469 recvlen = SendDataTag(data, datalen, true, speed, (recv?&recvbuf:NULL));
1470
1471 if (recv) {
1472 cmd_send(CMD_ACK, recvlen>48?48:recvlen, 0, 0, recvbuf, 48);
1473
1474 if (DEBUG) {
1475 Dbprintf("RECV");
1476 DbdecodeIso15693Answer(recvlen,recvbuf);
1477 Dbhexdump(recvlen, recvbuf, false);
1478 }
1479 }
1480
1481 // for the time being, switch field off to protect rdv4.0
1482 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1483 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1484 LED_D_OFF();
1485
1486 LED_A_OFF();
1487 }
1488
1489
1490
1491
1492 // --------------------------------------------------------------------
1493 // -- Misc & deprecated functions
1494 // --------------------------------------------------------------------
1495
1496 /*
1497
1498 // do not use; has a fix UID
1499 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1500 {
1501 uint8_t cmd[12];
1502
1503 uint16_t crc;
1504 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1505 // followed by teh block data
1506 // one sub-carrier, inventory, 1 slot, fast rate
1507 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1508 // System Information command code
1509 cmd[1] = 0x2B;
1510 // UID may be optionally specified here
1511 // 64-bit UID
1512 cmd[2] = 0x32;
1513 cmd[3]= 0x4b;
1514 cmd[4] = 0x03;
1515 cmd[5] = 0x01;
1516 cmd[6] = 0x00;
1517 cmd[7] = 0x10;
1518 cmd[8] = 0x05;
1519 cmd[9]= 0xe0; // always e0 (not exactly unique)
1520 //Now the CRC
1521 crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1522 cmd[10] = crc & 0xff;
1523 cmd[11] = crc >> 8;
1524
1525 CodeIso15693AsReader(cmd, sizeof(cmd));
1526 }
1527
1528
1529 // do not use; has a fix UID
1530 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1531 {
1532 uint8_t cmd[14];
1533
1534 uint16_t crc;
1535 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1536 // followed by teh block data
1537 // one sub-carrier, inventory, 1 slot, fast rate
1538 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1539 // READ Multi BLOCK command code
1540 cmd[1] = 0x23;
1541 // UID may be optionally specified here
1542 // 64-bit UID
1543 cmd[2] = 0x32;
1544 cmd[3]= 0x4b;
1545 cmd[4] = 0x03;
1546 cmd[5] = 0x01;
1547 cmd[6] = 0x00;
1548 cmd[7] = 0x10;
1549 cmd[8] = 0x05;
1550 cmd[9]= 0xe0; // always e0 (not exactly unique)
1551 // First Block number to read
1552 cmd[10] = 0x00;
1553 // Number of Blocks to read
1554 cmd[11] = 0x2f; // read quite a few
1555 //Now the CRC
1556 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1557 cmd[12] = crc & 0xff;
1558 cmd[13] = crc >> 8;
1559
1560 CodeIso15693AsReader(cmd, sizeof(cmd));
1561 }
1562
1563 // do not use; has a fix UID
1564 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1565 {
1566 uint8_t cmd[14];
1567
1568 uint16_t crc;
1569 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1570 // followed by teh block data
1571 // one sub-carrier, inventory, 1 slot, fast rate
1572 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1573 // READ BLOCK command code
1574 cmd[1] = CmdCode;
1575 // UID may be optionally specified here
1576 // 64-bit UID
1577 cmd[2] = 0x32;
1578 cmd[3]= 0x4b;
1579 cmd[4] = 0x03;
1580 cmd[5] = 0x01;
1581 cmd[6] = 0x00;
1582 cmd[7] = 0x10;
1583 cmd[8] = 0x05;
1584 cmd[9]= 0xe0; // always e0 (not exactly unique)
1585 // Parameter
1586 cmd[10] = 0x00;
1587 cmd[11] = 0x0a;
1588
1589 // cmd[12] = 0x00;
1590 // cmd[13] = 0x00; //Now the CRC
1591 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1592 cmd[12] = crc & 0xff;
1593 cmd[13] = crc >> 8;
1594
1595 CodeIso15693AsReader(cmd, sizeof(cmd));
1596 }
1597
1598 // do not use; has a fix UID
1599 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1600 {
1601 uint8_t cmd[14];
1602
1603 uint16_t crc;
1604 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1605 // followed by teh block data
1606 // one sub-carrier, inventory, 1 slot, fast rate
1607 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1608 // READ BLOCK command code
1609 cmd[1] = CmdCode;
1610 // UID may be optionally specified here
1611 // 64-bit UID
1612 cmd[2] = 0x32;
1613 cmd[3]= 0x4b;
1614 cmd[4] = 0x03;
1615 cmd[5] = 0x01;
1616 cmd[6] = 0x00;
1617 cmd[7] = 0x10;
1618 cmd[8] = 0x05;
1619 cmd[9]= 0xe0; // always e0 (not exactly unique)
1620 // Parameter
1621 cmd[10] = 0x05; // for custom codes this must be manufcturer code
1622 cmd[11] = 0x00;
1623
1624 // cmd[12] = 0x00;
1625 // cmd[13] = 0x00; //Now the CRC
1626 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1627 cmd[12] = crc & 0xff;
1628 cmd[13] = crc >> 8;
1629
1630 CodeIso15693AsReader(cmd, sizeof(cmd));
1631 }
1632
1633
1634
1635
1636 */
1637
1638
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