]> cvs.zerfleddert.de Git - proxmark3-svn/blob - armsrc/iclass.c
fix 'hf iclass sim':
[proxmark3-svn] / armsrc / iclass.c
1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "iclass.h"
40
41 #include "proxmark3.h"
42 #include "apps.h"
43 #include "util.h"
44 #include "string.h"
45 #include "printf.h"
46 #include "common.h"
47 #include "cmd.h"
48 #include "iso14443a.h"
49 #include "iso15693.h"
50 // Needed for CRC in emulation mode;
51 // same construction as in ISO 14443;
52 // different initial value (CRC_ICLASS)
53 #include "iso14443crc.h"
54 #include "iso15693tools.h"
55 #include "protocols.h"
56 #include "optimized_cipher.h"
57 #include "usb_cdc.h" // for usb_poll_validate_length
58 #include "fpgaloader.h"
59
60 static int timeout = 4096;
61
62 //-----------------------------------------------------------------------------
63 // The software UART that receives commands from the reader, and its state
64 // variables.
65 //-----------------------------------------------------------------------------
66 static struct {
67 enum {
68 STATE_UNSYNCD,
69 STATE_START_OF_COMMUNICATION,
70 STATE_RECEIVING
71 } state;
72 uint16_t shiftReg;
73 int bitCnt;
74 int byteCnt;
75 int byteCntMax;
76 int posCnt;
77 int nOutOfCnt;
78 int OutOfCnt;
79 int syncBit;
80 int samples;
81 int highCnt;
82 int swapper;
83 int counter;
84 int bitBuffer;
85 int dropPosition;
86 uint8_t *output;
87 } Uart;
88
89 static RAMFUNC int OutOfNDecoding(int bit) {
90 //int error = 0;
91 int bitright;
92
93 if (!Uart.bitBuffer) {
94 Uart.bitBuffer = bit ^ 0xFF0;
95 return false;
96 } else {
97 Uart.bitBuffer <<= 4;
98 Uart.bitBuffer ^= bit;
99 }
100
101 /*if (Uart.swapper) {
102 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
103 Uart.byteCnt++;
104 Uart.swapper = 0;
105 if (Uart.byteCnt > 15) { return true; }
106 }
107 else {
108 Uart.swapper = 1;
109 }*/
110
111 if (Uart.state != STATE_UNSYNCD) {
112 Uart.posCnt++;
113
114 if ((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
115 bit = 0x00;
116 } else {
117 bit = 0x01;
118 }
119 if (((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
120 bitright = 0x00;
121 } else {
122 bitright = 0x01;
123 }
124 if (bit != bitright) {
125 bit = bitright;
126 }
127
128
129 // So, now we only have to deal with *bit*, lets see...
130 if (Uart.posCnt == 1) {
131 // measurement first half bitperiod
132 if (!bit) {
133 // Drop in first half means that we are either seeing
134 // an SOF or an EOF.
135
136 if (Uart.nOutOfCnt == 1) {
137 // End of Communication
138 Uart.state = STATE_UNSYNCD;
139 Uart.highCnt = 0;
140 if (Uart.byteCnt == 0) {
141 // Its not straightforward to show single EOFs
142 // So just leave it and do not return true
143 Uart.output[0] = 0xf0;
144 Uart.byteCnt++;
145 } else {
146 return true;
147 }
148 } else if (Uart.state != STATE_START_OF_COMMUNICATION) {
149 // When not part of SOF or EOF, it is an error
150 Uart.state = STATE_UNSYNCD;
151 Uart.highCnt = 0;
152 //error = 4;
153 }
154 }
155 } else {
156 // measurement second half bitperiod
157 // Count the bitslot we are in... (ISO 15693)
158 Uart.nOutOfCnt++;
159
160 if (!bit) {
161 if (Uart.dropPosition) {
162 if (Uart.state == STATE_START_OF_COMMUNICATION) {
163 //error = 1;
164 } else {
165 //error = 7;
166 }
167 // It is an error if we already have seen a drop in current frame
168 Uart.state = STATE_UNSYNCD;
169 Uart.highCnt = 0;
170 } else {
171 Uart.dropPosition = Uart.nOutOfCnt;
172 }
173 }
174
175 Uart.posCnt = 0;
176
177
178 if (Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
179 Uart.nOutOfCnt = 0;
180
181 if (Uart.state == STATE_START_OF_COMMUNICATION) {
182 if (Uart.dropPosition == 4) {
183 Uart.state = STATE_RECEIVING;
184 Uart.OutOfCnt = 256;
185 } else if (Uart.dropPosition == 3) {
186 Uart.state = STATE_RECEIVING;
187 Uart.OutOfCnt = 4;
188 //Uart.output[Uart.byteCnt] = 0xdd;
189 //Uart.byteCnt++;
190 } else {
191 Uart.state = STATE_UNSYNCD;
192 Uart.highCnt = 0;
193 }
194 Uart.dropPosition = 0;
195 } else {
196 // RECEIVING DATA
197 // 1 out of 4
198 if (!Uart.dropPosition) {
199 Uart.state = STATE_UNSYNCD;
200 Uart.highCnt = 0;
201 //error = 9;
202 } else {
203 Uart.shiftReg >>= 2;
204
205 // Swap bit order
206 Uart.dropPosition--;
207 //if (Uart.dropPosition == 1) { Uart.dropPosition = 2; }
208 //else if (Uart.dropPosition == 2) { Uart.dropPosition = 1; }
209
210 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
211 Uart.bitCnt += 2;
212 Uart.dropPosition = 0;
213
214 if (Uart.bitCnt == 8) {
215 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
216 Uart.byteCnt++;
217 Uart.bitCnt = 0;
218 Uart.shiftReg = 0;
219 }
220 }
221 }
222 } else if (Uart.nOutOfCnt == Uart.OutOfCnt) {
223 // RECEIVING DATA
224 // 1 out of 256
225 if (!Uart.dropPosition) {
226 Uart.state = STATE_UNSYNCD;
227 Uart.highCnt = 0;
228 //error = 3;
229 } else {
230 Uart.dropPosition--;
231 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
232 Uart.byteCnt++;
233 Uart.bitCnt = 0;
234 Uart.shiftReg = 0;
235 Uart.nOutOfCnt = 0;
236 Uart.dropPosition = 0;
237 }
238 }
239
240 /*if (error) {
241 Uart.output[Uart.byteCnt] = 0xAA;
242 Uart.byteCnt++;
243 Uart.output[Uart.byteCnt] = error & 0xFF;
244 Uart.byteCnt++;
245 Uart.output[Uart.byteCnt] = 0xAA;
246 Uart.byteCnt++;
247 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
248 Uart.byteCnt++;
249 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
250 Uart.byteCnt++;
251 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = 0xAA;
254 Uart.byteCnt++;
255 return true;
256 }*/
257 }
258
259 } else {
260 bit = Uart.bitBuffer & 0xf0;
261 bit >>= 4;
262 bit ^= 0x0F; // drops become 1s ;-)
263 if (bit) {
264 // should have been high or at least (4 * 128) / fc
265 // according to ISO this should be at least (9 * 128 + 20) / fc
266 if (Uart.highCnt == 8) {
267 // we went low, so this could be start of communication
268 // it turns out to be safer to choose a less significant
269 // syncbit... so we check whether the neighbour also represents the drop
270 Uart.posCnt = 1; // apparently we are busy with our first half bit period
271 Uart.syncBit = bit & 8;
272 Uart.samples = 3;
273 if (!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
274 else if (bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
275 if (!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
276 else if (bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
277 if (!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
278 if (Uart.syncBit && (Uart.bitBuffer & 8)) {
279 Uart.syncBit = 8;
280
281 // the first half bit period is expected in next sample
282 Uart.posCnt = 0;
283 Uart.samples = 3;
284 }
285 } else if (bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
286
287 Uart.syncBit <<= 4;
288 Uart.state = STATE_START_OF_COMMUNICATION;
289 Uart.bitCnt = 0;
290 Uart.byteCnt = 0;
291 Uart.nOutOfCnt = 0;
292 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
293 Uart.dropPosition = 0;
294 Uart.shiftReg = 0;
295 //error = 0;
296 } else {
297 Uart.highCnt = 0;
298 }
299 } else if (Uart.highCnt < 8) {
300 Uart.highCnt++;
301 }
302 }
303
304 return false;
305 }
306
307
308 //=============================================================================
309 // Manchester
310 //=============================================================================
311
312 static struct {
313 enum {
314 DEMOD_UNSYNCD,
315 DEMOD_START_OF_COMMUNICATION,
316 DEMOD_START_OF_COMMUNICATION2,
317 DEMOD_START_OF_COMMUNICATION3,
318 DEMOD_SOF_COMPLETE,
319 DEMOD_MANCHESTER_D,
320 DEMOD_MANCHESTER_E,
321 DEMOD_END_OF_COMMUNICATION,
322 DEMOD_END_OF_COMMUNICATION2,
323 DEMOD_MANCHESTER_F,
324 DEMOD_ERROR_WAIT
325 } state;
326 int bitCount;
327 int posCount;
328 int syncBit;
329 uint16_t shiftReg;
330 int buffer;
331 int buffer2;
332 int buffer3;
333 int buff;
334 int samples;
335 int len;
336 enum {
337 SUB_NONE,
338 SUB_FIRST_HALF,
339 SUB_SECOND_HALF,
340 SUB_BOTH
341 } sub;
342 uint8_t *output;
343 } Demod;
344
345 static RAMFUNC int ManchesterDecoding(int v) {
346 int bit;
347 int modulation;
348 int error = 0;
349
350 bit = Demod.buffer;
351 Demod.buffer = Demod.buffer2;
352 Demod.buffer2 = Demod.buffer3;
353 Demod.buffer3 = v;
354
355 if (Demod.buff < 3) {
356 Demod.buff++;
357 return false;
358 }
359
360 if (Demod.state==DEMOD_UNSYNCD) {
361 Demod.output[Demod.len] = 0xfa;
362 Demod.syncBit = 0;
363 //Demod.samples = 0;
364 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
365
366 if (bit & 0x08) {
367 Demod.syncBit = 0x08;
368 }
369
370 if (bit & 0x04) {
371 if (Demod.syncBit) {
372 bit <<= 4;
373 }
374 Demod.syncBit = 0x04;
375 }
376
377 if (bit & 0x02) {
378 if (Demod.syncBit) {
379 bit <<= 2;
380 }
381 Demod.syncBit = 0x02;
382 }
383
384 if (bit & 0x01 && Demod.syncBit) {
385 Demod.syncBit = 0x01;
386 }
387
388 if (Demod.syncBit) {
389 Demod.len = 0;
390 Demod.state = DEMOD_START_OF_COMMUNICATION;
391 Demod.sub = SUB_FIRST_HALF;
392 Demod.bitCount = 0;
393 Demod.shiftReg = 0;
394 Demod.samples = 0;
395 if (Demod.posCount) {
396 switch (Demod.syncBit) {
397 case 0x08: Demod.samples = 3; break;
398 case 0x04: Demod.samples = 2; break;
399 case 0x02: Demod.samples = 1; break;
400 case 0x01: Demod.samples = 0; break;
401 }
402 // SOF must be long burst... otherwise stay unsynced!!!
403 if (!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
404 Demod.state = DEMOD_UNSYNCD;
405 }
406 } else {
407 // SOF must be long burst... otherwise stay unsynced!!!
408 if (!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
409 Demod.state = DEMOD_UNSYNCD;
410 error = 0x88;
411 }
412
413 }
414 error = 0;
415
416 }
417 } else {
418 // state is DEMOD is in SYNC from here on.
419 modulation = bit & Demod.syncBit;
420 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
421
422 Demod.samples += 4;
423
424 if (Demod.posCount == 0) {
425 Demod.posCount = 1;
426 if (modulation) {
427 Demod.sub = SUB_FIRST_HALF;
428 } else {
429 Demod.sub = SUB_NONE;
430 }
431 } else {
432 Demod.posCount = 0;
433 if (modulation) {
434 if (Demod.sub == SUB_FIRST_HALF) {
435 Demod.sub = SUB_BOTH;
436 } else {
437 Demod.sub = SUB_SECOND_HALF;
438 }
439 } else if (Demod.sub == SUB_NONE) {
440 if (Demod.state == DEMOD_SOF_COMPLETE) {
441 Demod.output[Demod.len] = 0x0f;
442 Demod.len++;
443 Demod.state = DEMOD_UNSYNCD;
444 return true;
445 } else {
446 Demod.state = DEMOD_ERROR_WAIT;
447 error = 0x33;
448 }
449 }
450
451 switch(Demod.state) {
452 case DEMOD_START_OF_COMMUNICATION:
453 if (Demod.sub == SUB_BOTH) {
454 Demod.state = DEMOD_START_OF_COMMUNICATION2;
455 Demod.posCount = 1;
456 Demod.sub = SUB_NONE;
457 } else {
458 Demod.output[Demod.len] = 0xab;
459 Demod.state = DEMOD_ERROR_WAIT;
460 error = 0xd2;
461 }
462 break;
463 case DEMOD_START_OF_COMMUNICATION2:
464 if (Demod.sub == SUB_SECOND_HALF) {
465 Demod.state = DEMOD_START_OF_COMMUNICATION3;
466 } else {
467 Demod.output[Demod.len] = 0xab;
468 Demod.state = DEMOD_ERROR_WAIT;
469 error = 0xd3;
470 }
471 break;
472 case DEMOD_START_OF_COMMUNICATION3:
473 if (Demod.sub == SUB_SECOND_HALF) {
474 Demod.state = DEMOD_SOF_COMPLETE;
475 } else {
476 Demod.output[Demod.len] = 0xab;
477 Demod.state = DEMOD_ERROR_WAIT;
478 error = 0xd4;
479 }
480 break;
481 case DEMOD_SOF_COMPLETE:
482 case DEMOD_MANCHESTER_D:
483 case DEMOD_MANCHESTER_E:
484 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
485 // 00001111 = 1 (0 in 14443)
486 if (Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
487 Demod.bitCount++;
488 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
489 Demod.state = DEMOD_MANCHESTER_D;
490 } else if (Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
491 Demod.bitCount++;
492 Demod.shiftReg >>= 1;
493 Demod.state = DEMOD_MANCHESTER_E;
494 } else if (Demod.sub == SUB_BOTH) {
495 Demod.state = DEMOD_MANCHESTER_F;
496 } else {
497 Demod.state = DEMOD_ERROR_WAIT;
498 error = 0x55;
499 }
500 break;
501
502 case DEMOD_MANCHESTER_F:
503 // Tag response does not need to be a complete byte!
504 if (Demod.len > 0 || Demod.bitCount > 0) {
505 if (Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
506 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
507 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
508 Demod.len++;
509 }
510
511 Demod.state = DEMOD_UNSYNCD;
512 return true;
513 } else {
514 Demod.output[Demod.len] = 0xad;
515 Demod.state = DEMOD_ERROR_WAIT;
516 error = 0x03;
517 }
518 break;
519
520 case DEMOD_ERROR_WAIT:
521 Demod.state = DEMOD_UNSYNCD;
522 break;
523
524 default:
525 Demod.output[Demod.len] = 0xdd;
526 Demod.state = DEMOD_UNSYNCD;
527 break;
528 }
529
530 if (Demod.bitCount >= 8) {
531 Demod.shiftReg >>= 1;
532 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
533 Demod.len++;
534 Demod.bitCount = 0;
535 Demod.shiftReg = 0;
536 }
537
538 if (error) {
539 Demod.output[Demod.len] = 0xBB;
540 Demod.len++;
541 Demod.output[Demod.len] = error & 0xFF;
542 Demod.len++;
543 Demod.output[Demod.len] = 0xBB;
544 Demod.len++;
545 Demod.output[Demod.len] = bit & 0xFF;
546 Demod.len++;
547 Demod.output[Demod.len] = Demod.buffer & 0xFF;
548 Demod.len++;
549 // Look harder ;-)
550 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
551 Demod.len++;
552 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
553 Demod.len++;
554 Demod.output[Demod.len] = 0xBB;
555 Demod.len++;
556 return true;
557 }
558
559 }
560
561 } // end (state != UNSYNCED)
562
563 return false;
564 }
565
566 //=============================================================================
567 // Finally, a `sniffer' for iClass communication
568 // Both sides of communication!
569 //=============================================================================
570
571 //-----------------------------------------------------------------------------
572 // Record the sequence of commands sent by the reader to the tag, with
573 // triggering so that we start recording at the point that the tag is moved
574 // near the reader.
575 //-----------------------------------------------------------------------------
576 void RAMFUNC SnoopIClass(void) {
577
578 // We won't start recording the frames that we acquire until we trigger;
579 // a good trigger condition to get started is probably when we see a
580 // response from the tag.
581 //int triggered = false; // false to wait first for card
582
583 // The command (reader -> tag) that we're receiving.
584 // The length of a received command will in most cases be no more than 18 bytes.
585 // So 32 should be enough!
586 #define ICLASS_BUFFER_SIZE 32
587 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
588 // The response (tag -> reader) that we're receiving.
589 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
590
591 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
592
593 // free all BigBuf memory
594 BigBuf_free();
595 // The DMA buffer, used to stream samples from the FPGA
596 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
597
598 set_tracing(true);
599 clear_trace();
600 iso14a_set_trigger(false);
601
602 int lastRxCounter;
603 uint8_t *upTo;
604 int smpl;
605 int maxBehindBy = 0;
606
607 // Count of samples received so far, so that we can include timing
608 // information in the trace buffer.
609 int samples = 0;
610 rsamples = 0;
611
612 // Set up the demodulator for tag -> reader responses.
613 Demod.output = tagToReaderResponse;
614 Demod.len = 0;
615 Demod.state = DEMOD_UNSYNCD;
616
617 // Setup for the DMA.
618 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
619 upTo = dmaBuf;
620 lastRxCounter = DMA_BUFFER_SIZE;
621 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
622
623 // And the reader -> tag commands
624 memset(&Uart, 0, sizeof(Uart));
625 Uart.output = readerToTagCmd;
626 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
627 Uart.state = STATE_UNSYNCD;
628
629 // And put the FPGA in the appropriate mode
630 // Signal field is off with the appropriate LED
631 LED_D_OFF();
632 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
633 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
634
635 uint32_t time_0 = GetCountSspClk();
636 uint32_t time_start = 0;
637 uint32_t time_stop = 0;
638
639 int div = 0;
640 //int div2 = 0;
641 int decbyte = 0;
642 int decbyter = 0;
643
644 // And now we loop, receiving samples.
645 for (;;) {
646 LED_A_ON();
647 WDT_HIT();
648 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1);
649 if (behindBy > maxBehindBy) {
650 maxBehindBy = behindBy;
651 if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
652 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
653 goto done;
654 }
655 }
656 if (behindBy < 1) continue;
657
658 LED_A_OFF();
659 smpl = upTo[0];
660 upTo++;
661 lastRxCounter -= 1;
662 if (upTo - dmaBuf > DMA_BUFFER_SIZE) {
663 upTo -= DMA_BUFFER_SIZE;
664 lastRxCounter += DMA_BUFFER_SIZE;
665 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
666 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
667 }
668
669 //samples += 4;
670 samples += 1;
671
672 if (smpl & 0xF) {
673 decbyte ^= (1 << (3 - div));
674 }
675
676 // FOR READER SIDE COMMUMICATION...
677
678 decbyter <<= 2;
679 decbyter ^= (smpl & 0x30);
680
681 div++;
682
683 if ((div + 1) % 2 == 0) {
684 smpl = decbyter;
685 if (OutOfNDecoding((smpl & 0xF0) >> 4)) {
686 rsamples = samples - Uart.samples;
687 time_stop = (GetCountSspClk()-time_0) << 4;
688 LED_C_ON();
689
690 //if (!LogTrace(Uart.output, Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
691 //if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
692 uint8_t parity[MAX_PARITY_SIZE];
693 GetParity(Uart.output, Uart.byteCnt, parity);
694 LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, parity, true);
695
696 /* And ready to receive another command. */
697 Uart.state = STATE_UNSYNCD;
698 /* And also reset the demod code, which might have been */
699 /* false-triggered by the commands from the reader. */
700 Demod.state = DEMOD_UNSYNCD;
701 LED_B_OFF();
702 Uart.byteCnt = 0;
703 } else {
704 time_start = (GetCountSspClk()-time_0) << 4;
705 }
706 decbyter = 0;
707 }
708
709 if (div > 3) {
710 smpl = decbyte;
711 if (ManchesterDecoding(smpl & 0x0F)) {
712 time_stop = (GetCountSspClk()-time_0) << 4;
713
714 rsamples = samples - Demod.samples;
715 LED_B_ON();
716
717 uint8_t parity[MAX_PARITY_SIZE];
718 GetParity(Demod.output, Demod.len, parity);
719 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false);
720
721 // And ready to receive another response.
722 memset(&Demod, 0, sizeof(Demod));
723 Demod.output = tagToReaderResponse;
724 Demod.state = DEMOD_UNSYNCD;
725 LED_C_OFF();
726 } else {
727 time_start = (GetCountSspClk()-time_0) << 4;
728 }
729
730 div = 0;
731 decbyte = 0x00;
732 }
733
734 if (BUTTON_PRESS()) {
735 DbpString("cancelled_a");
736 goto done;
737 }
738 }
739
740 DbpString("COMMAND FINISHED");
741
742 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
743 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
744
745 done:
746 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
747 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
748 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
749 LEDsoff();
750 }
751
752 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
753 int i;
754 for (i = 0; i < 8; i++) {
755 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
756 }
757 }
758
759 // Encode SOF only
760 static void CodeIClassTagSOF() {
761 //So far a dummy implementation, not used
762 //int lastProxToAirDuration =0;
763
764 ToSendReset();
765 // Send SOF
766 ToSend[++ToSendMax] = 0x1D;
767 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
768
769 // Convert from last byte pos to length
770 ToSendMax++;
771 }
772
773 static void AppendCrc(uint8_t *data, int len) {
774 ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
775 }
776
777
778 /**
779 * @brief Does the actual simulation
780 */
781 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
782
783 // free eventually allocated BigBuf memory
784 BigBuf_free_keep_EM();
785
786 State cipher_state;
787
788 uint8_t *emulator = BigBuf_get_EM_addr();
789 uint8_t *csn = emulator;
790 uint8_t sof_data[] = { 0x0F } ;
791
792 // CSN followed by two CRC bytes
793 uint8_t anticoll_data[10] = { 0 };
794 uint8_t csn_data[10] = { 0 };
795 memcpy(csn_data, csn, sizeof(csn_data));
796 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x", csn[0], csn[1], csn[2], csn[3], csn[4], csn[5], csn[6], csn[7]);
797
798 // Construct anticollision-CSN
799 rotateCSN(csn_data, anticoll_data);
800
801 // Compute CRC on both CSNs
802 AppendCrc(anticoll_data, 8);
803 AppendCrc(csn_data, 8);
804
805 uint8_t diversified_key[8] = { 0 };
806 // e-Purse
807 uint8_t card_challenge_data[8] = { 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
808 //uint8_t card_challenge_data[8] = { 0 };
809 if (simulationMode == ICLASS_SIM_MODE_FULL) {
810 // The diversified key should be stored on block 3
811 // Get the diversified key from emulator memory
812 memcpy(diversified_key, emulator + (8 * 3), 8);
813 // Card challenge, a.k.a e-purse is on block 2
814 memcpy(card_challenge_data, emulator + (8 * 2), 8);
815 // Precalculate the cipher state, feeding it the CC
816 cipher_state = opt_doTagMAC_1(card_challenge_data, diversified_key);
817 }
818 // save card challenge for sim2,4 attack
819 if (reader_mac_buf != NULL) {
820 memcpy(reader_mac_buf, card_challenge_data, 8);
821 }
822
823 int exitLoop = 0;
824 // Reader 0a
825 // Tag 0f
826 // Reader 0c
827 // Tag anticoll. CSN
828 // Reader 81 anticoll. CSN
829 // Tag CSN
830
831 uint8_t *modulated_response;
832 int modulated_response_size = 0;
833 uint8_t *trace_data = NULL;
834 int trace_data_size = 0;
835
836 // Respond SOF -- takes 1 bytes
837 uint8_t *resp_sof = BigBuf_malloc(2);
838 int resp_sof_Len;
839
840 // Anticollision CSN (rotated CSN)
841 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
842 uint8_t *resp_anticoll = BigBuf_malloc(22);
843 int resp_anticoll_len;
844
845 // CSN (block 0)
846 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
847 uint8_t *resp_csn = BigBuf_malloc(22);
848 int resp_csn_len;
849
850 // configuration (block 1) picopass 2ks
851 uint8_t *resp_conf = BigBuf_malloc(22);
852 int resp_conf_len;
853 uint8_t conf_data[10] = {0x12, 0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0xFF, 0x3C, 0x00, 0x00};
854 AppendCrc(conf_data, 8);
855
856 // e-Purse (block 2)
857 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
858 uint8_t *resp_cc = BigBuf_malloc(18);
859 int resp_cc_len;
860
861 // Kd, Kc (blocks 3 and 4). Cannot be read. Always respond with 0xff bytes only
862 uint8_t *resp_ff = BigBuf_malloc(22);
863 int resp_ff_len;
864 uint8_t ff_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
865 AppendCrc(ff_data, 8);
866
867 // Application Issuer Area (block 5)
868 uint8_t *resp_aia = BigBuf_malloc(22);
869 int resp_aia_len;
870 uint8_t aia_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
871 AppendCrc(aia_data, 8);
872
873 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
874 int len;
875
876 // Prepare card messages
877 ToSendMax = 0;
878
879 // First card answer: SOF only
880 CodeIClassTagSOF();
881 memcpy(resp_sof, ToSend, ToSendMax);
882 resp_sof_Len = ToSendMax;
883
884 // Anticollision CSN
885 CodeIso15693AsTag(anticoll_data, sizeof(anticoll_data));
886 memcpy(resp_anticoll, ToSend, ToSendMax);
887 resp_anticoll_len = ToSendMax;
888
889 // CSN (block 0)
890 CodeIso15693AsTag(csn_data, sizeof(csn_data));
891 memcpy(resp_csn, ToSend, ToSendMax);
892 resp_csn_len = ToSendMax;
893
894 // Configuration (block 1)
895 CodeIso15693AsTag(conf_data, sizeof(conf_data));
896 memcpy(resp_conf, ToSend, ToSendMax);
897 resp_conf_len = ToSendMax;
898
899 // e-Purse (block 2)
900 CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
901 memcpy(resp_cc, ToSend, ToSendMax);
902 resp_cc_len = ToSendMax;
903
904 // Kd, Kc (blocks 3 and 4)
905 CodeIso15693AsTag(ff_data, sizeof(ff_data));
906 memcpy(resp_ff, ToSend, ToSendMax);
907 resp_ff_len = ToSendMax;
908
909 // Application Issuer Area (block 5)
910 CodeIso15693AsTag(aia_data, sizeof(aia_data));
911 memcpy(resp_aia, ToSend, ToSendMax);
912 resp_aia_len = ToSendMax;
913
914 //This is used for responding to READ-block commands or other data which is dynamically generated
915 uint8_t *data_generic_trace = BigBuf_malloc(32 + 2); // 32 bytes data + 2byte CRC is max tag answer
916 uint8_t *data_response = BigBuf_malloc( (32 + 2) * 2 + 2);
917
918 LED_A_ON();
919 bool buttonPressed = false;
920 enum { IDLE, ACTIVATED, SELECTED, HALTED } chip_state = IDLE;
921
922 while (!exitLoop) {
923 WDT_HIT();
924 LED_B_OFF();
925 //Signal tracer
926 // Can be used to get a trigger for an oscilloscope..
927 LED_C_OFF();
928
929 uint32_t reader_eof_time = 0;
930 len = GetIso15693CommandFromReader(receivedCmd, MAX_FRAME_SIZE, &reader_eof_time);
931 if (len < 0) {
932 buttonPressed = true;
933 break;
934 }
935
936 //Signal tracer
937 LED_C_ON();
938
939 // Now look at the reader command and provide appropriate responses
940 // default is no response:
941 modulated_response = NULL;
942 modulated_response_size = 0;
943 trace_data = NULL;
944 trace_data_size = 0;
945
946 if (receivedCmd[0] == ICLASS_CMD_ACTALL && len == 1) {
947 // Reader in anticollision phase
948 if (chip_state != HALTED) {
949 modulated_response = resp_sof;
950 modulated_response_size = resp_sof_Len;
951 trace_data = sof_data;
952 trace_data_size = sizeof(sof_data);
953 chip_state = ACTIVATED;
954 }
955
956 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) { // identify
957 // Reader asks for anticollision CSN
958 if (chip_state == SELECTED || chip_state == ACTIVATED) {
959 modulated_response = resp_anticoll;
960 modulated_response_size = resp_anticoll_len;
961 trace_data = anticoll_data;
962 trace_data_size = sizeof(anticoll_data);
963 }
964
965 } else if (receivedCmd[0] == ICLASS_CMD_SELECT && len == 9) {
966 // Reader selects anticollision CSN.
967 // Tag sends the corresponding real CSN
968 if (chip_state == ACTIVATED || chip_state == SELECTED) {
969 if (!memcmp(receivedCmd+1, anticoll_data, 8)) {
970 modulated_response = resp_csn;
971 modulated_response_size = resp_csn_len;
972 trace_data = csn_data;
973 trace_data_size = sizeof(csn_data);
974 chip_state = SELECTED;
975 } else {
976 chip_state = IDLE;
977 }
978 } else if (chip_state == HALTED) {
979 // RESELECT with CSN
980 if (!memcmp(receivedCmd+1, csn_data, 8)) {
981 modulated_response = resp_csn;
982 modulated_response_size = resp_csn_len;
983 trace_data = csn_data;
984 trace_data_size = sizeof(csn_data);
985 chip_state = SELECTED;
986 }
987 }
988
989 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
990 uint16_t blockNo = receivedCmd[1];
991 if (chip_state == SELECTED) {
992 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
993 // provide defaults for blocks 0 ... 5
994 switch (blockNo) {
995 case 0: // csn (block 00)
996 modulated_response = resp_csn;
997 modulated_response_size = resp_csn_len;
998 trace_data = csn_data;
999 trace_data_size = sizeof(csn_data);
1000 break;
1001 case 1: // configuration (block 01)
1002 modulated_response = resp_conf;
1003 modulated_response_size = resp_conf_len;
1004 trace_data = conf_data;
1005 trace_data_size = sizeof(conf_data);
1006 break;
1007 case 2: // e-purse (block 02)
1008 modulated_response = resp_cc;
1009 modulated_response_size = resp_cc_len;
1010 trace_data = card_challenge_data;
1011 trace_data_size = sizeof(card_challenge_data);
1012 // set epurse of sim2,4 attack
1013 if (reader_mac_buf != NULL) {
1014 memcpy(reader_mac_buf, card_challenge_data, 8);
1015 }
1016 break;
1017 case 3:
1018 case 4: // Kd, Kc, always respond with 0xff bytes
1019 modulated_response = resp_ff;
1020 modulated_response_size = resp_ff_len;
1021 trace_data = ff_data;
1022 trace_data_size = sizeof(ff_data);
1023 break;
1024 case 5: // Application Issuer Area (block 05)
1025 modulated_response = resp_aia;
1026 modulated_response_size = resp_aia_len;
1027 trace_data = aia_data;
1028 trace_data_size = sizeof(aia_data);
1029 break;
1030 // default: don't respond
1031 }
1032 } else if (simulationMode == ICLASS_SIM_MODE_FULL) {
1033 if (blockNo == 3 || blockNo == 4) { // Kd, Kc, always respond with 0xff bytes
1034 modulated_response = resp_ff;
1035 modulated_response_size = resp_ff_len;
1036 trace_data = ff_data;
1037 trace_data_size = sizeof(ff_data);
1038 } else { // use data from emulator memory
1039 memcpy(data_generic_trace, emulator + 8*blockNo, 8);
1040 AppendCrc(data_generic_trace, 8);
1041 trace_data = data_generic_trace;
1042 trace_data_size = 10;
1043 CodeIso15693AsTag(trace_data, trace_data_size);
1044 memcpy(data_response, ToSend, ToSendMax);
1045 modulated_response = data_response;
1046 modulated_response_size = ToSendMax;
1047 }
1048 }
1049 }
1050
1051 } else if ((receivedCmd[0] == ICLASS_CMD_READCHECK_KD
1052 || receivedCmd[0] == ICLASS_CMD_READCHECK_KC) && len == 2) {
1053 // Read e-purse (88 02 || 18 02)
1054 if (chip_state == SELECTED) {
1055 modulated_response = resp_cc;
1056 modulated_response_size = resp_cc_len;
1057 trace_data = card_challenge_data;
1058 trace_data_size = sizeof(card_challenge_data);
1059 LED_B_ON();
1060 }
1061
1062 } else if (receivedCmd[0] == ICLASS_CMD_CHECK && len == 9) {
1063 // Reader random and reader MAC!!!
1064 if (chip_state == SELECTED) {
1065 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1066 //NR, from reader, is in receivedCmd+1
1067 opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
1068 trace_data = data_generic_trace;
1069 trace_data_size = 4;
1070 CodeIso15693AsTag(trace_data, trace_data_size);
1071 memcpy(data_response, ToSend, ToSendMax);
1072 modulated_response = data_response;
1073 modulated_response_size = ToSendMax;
1074 //exitLoop = true;
1075 } else { // Not fullsim, we don't respond
1076 // We do not know what to answer, so lets keep quiet
1077 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
1078 if (reader_mac_buf != NULL) {
1079 // save NR and MAC for sim 2,4
1080 memcpy(reader_mac_buf + 8, receivedCmd + 1, 8);
1081 }
1082 exitLoop = true;
1083 }
1084 }
1085 }
1086
1087 } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1088 if (chip_state == SELECTED) {
1089 // Reader ends the session
1090 chip_state = HALTED;
1091 }
1092
1093 } else if (simulationMode == ICLASS_SIM_MODE_FULL && receivedCmd[0] == ICLASS_CMD_READ4 && len == 4) { // 0x06
1094 //Read 4 blocks
1095 if (chip_state == SELECTED) {
1096 memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8 * 4);
1097 AppendCrc(data_generic_trace, 8 * 4);
1098 trace_data = data_generic_trace;
1099 trace_data_size = 8 * 4 + 2;
1100 CodeIso15693AsTag(trace_data, trace_data_size);
1101 memcpy(data_response, ToSend, ToSendMax);
1102 modulated_response = data_response;
1103 modulated_response_size = ToSendMax;
1104 }
1105
1106 } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && (len == 12 || len == 14)) {
1107 // Probably the reader wants to update the nonce. Let's just ignore that for now.
1108 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1109 // We're expected to respond with the data+crc, exactly what's already in the receivedCmd
1110 // receivedCmd is now UPDATE 1b | ADDRESS 1b | DATA 8b | Signature 4b or CRC 2b
1111 if (chip_state == SELECTED) {
1112 memcpy(data_generic_trace, receivedCmd + 2, 8);
1113 AppendCrc(data_generic_trace, 8);
1114 trace_data = data_generic_trace;
1115 trace_data_size = 10;
1116 CodeIso15693AsTag(trace_data, trace_data_size);
1117 memcpy(data_response, ToSend, ToSendMax);
1118 modulated_response = data_response;
1119 modulated_response_size = ToSendMax;
1120 }
1121
1122 } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL && len == 4) {
1123 // Pagesel
1124 if (chip_state == SELECTED) {
1125 // Pagesel enables to select a page in the selected chip memory and return its configuration block
1126 // Chips with a single page will not answer to this command
1127 // It appears we're fine ignoring this.
1128 // Otherwise, we should answer 8bytes (block) + 2bytes CRC
1129 }
1130
1131 } else if (receivedCmd[0] == 0x26 && len == 5) {
1132 // standard ISO15693 INVENTORY command. Ignore.
1133
1134 } else {
1135 // don't know how to handle this command
1136 char debug_message[250]; // should be enough
1137 sprintf(debug_message, "Unhandled command (len = %d) received from reader:", len);
1138 for (int i = 0; i < len && strlen(debug_message) < sizeof(debug_message) - 3 - 1; i++) {
1139 sprintf(debug_message + strlen(debug_message), " %02x", receivedCmd[i]);
1140 }
1141 Dbprintf("%s", debug_message);
1142 // Do not respond
1143 }
1144
1145 /**
1146 A legit tag has about 311,5us delay between reader EOT and tag SOF.
1147 **/
1148 if (modulated_response_size > 0) {
1149 uint32_t response_time = reader_eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
1150 TransmitTo15693Reader(modulated_response, modulated_response_size, response_time, false);
1151 LogTrace(trace_data, trace_data_size, response_time + DELAY_ARM_TO_READER_SIM, response_time + (modulated_response_size << 6) + DELAY_ARM_TO_READER_SIM, NULL, false);
1152 }
1153
1154 }
1155
1156 LED_A_OFF();
1157 LED_B_OFF();
1158 LED_C_OFF();
1159
1160 if (buttonPressed)
1161 {
1162 DbpString("Button pressed");
1163 }
1164 return buttonPressed;
1165 }
1166
1167 /**
1168 * @brief SimulateIClass simulates an iClass card.
1169 * @param arg0 type of simulation
1170 * - 0 uses the first 8 bytes in usb data as CSN
1171 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
1172 * in the usb data. This mode collects MAC from the reader, in order to do an offline
1173 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
1174 * - Other : Uses the default CSN (031fec8af7ff12e0)
1175 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
1176 * @param arg2
1177 * @param datain
1178 */
1179 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) {
1180 uint32_t simType = arg0;
1181 uint32_t numberOfCSNS = arg1;
1182
1183 // setup hardware for simulation:
1184 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1185 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1186 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1187 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1188 StartCountSspClk();
1189
1190 // Enable and clear the trace
1191 set_tracing(true);
1192 clear_trace();
1193 //Use the emulator memory for SIM
1194 uint8_t *emulator = BigBuf_get_EM_addr();
1195
1196 if (simType == ICLASS_SIM_MODE_CSN) {
1197 // Use the CSN from commandline
1198 memcpy(emulator, datain, 8);
1199 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1200 } else if (simType == ICLASS_SIM_MODE_CSN_DEFAULT) {
1201 //Default CSN
1202 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1203 // Use the CSN from commandline
1204 memcpy(emulator, csn_crc, 8);
1205 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1206 } else if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
1207 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1208 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1209 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1210 // in order to collect MAC's from the reader. This can later be used in an offline-attack
1211 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1212 int i;
1213 for (i = 0; i < numberOfCSNS && i*16+16 <= USB_CMD_DATA_SIZE; i++) {
1214 // The usb data is 512 bytes, fitting 32 responses (8 byte CC + 4 Byte NR + 4 Byte MAC = 16 Byte response).
1215 memcpy(emulator, datain+(i*8), 8);
1216 if (doIClassSimulation(ICLASS_SIM_MODE_EXIT_AFTER_MAC, mac_responses+i*16)) {
1217 // Button pressed
1218 break;
1219 }
1220 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1221 datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
1222 datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
1223 Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
1224 mac_responses[i*16+ 8], mac_responses[i*16+ 9], mac_responses[i*16+10], mac_responses[i*16+11],
1225 mac_responses[i*16+12], mac_responses[i*16+13], mac_responses[i*16+14], mac_responses[i*16+15]);
1226 SpinDelay(100); // give the reader some time to prepare for next CSN
1227 }
1228 cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
1229 } else if (simType == ICLASS_SIM_MODE_FULL) {
1230 //This is 'full sim' mode, where we use the emulator storage for data.
1231 doIClassSimulation(ICLASS_SIM_MODE_FULL, NULL);
1232 } else {
1233 // We may want a mode here where we hardcode the csns to use (from proxclone).
1234 // That will speed things up a little, but not required just yet.
1235 Dbprintf("The mode is not implemented, reserved for future use");
1236 }
1237 Dbprintf("Done...");
1238
1239 }
1240
1241
1242 /// THE READER CODE
1243
1244 //-----------------------------------------------------------------------------
1245 // Transmit the command (to the tag) that was placed in ToSend[].
1246 //-----------------------------------------------------------------------------
1247 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait) {
1248 int c;
1249 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1250 AT91C_BASE_SSC->SSC_THR = 0x00;
1251 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
1252
1253 if (wait) {
1254 if (*wait < 10) *wait = 10;
1255
1256 for (c = 0; c < *wait;) {
1257 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1258 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1259 c++;
1260 }
1261 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1262 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1263 (void)r;
1264 }
1265 WDT_HIT();
1266 }
1267 }
1268
1269 uint8_t sendbyte;
1270 bool firstpart = true;
1271 c = 0;
1272 for (;;) {
1273 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1274
1275 // DOUBLE THE SAMPLES!
1276 if (firstpart) {
1277 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1278 } else {
1279 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1280 c++;
1281 }
1282 if (sendbyte == 0xff) {
1283 sendbyte = 0xfe;
1284 }
1285 AT91C_BASE_SSC->SSC_THR = sendbyte;
1286 firstpart = !firstpart;
1287
1288 if (c >= len) {
1289 break;
1290 }
1291 }
1292 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1293 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1294 (void)r;
1295 }
1296 WDT_HIT();
1297 }
1298 if (samples && wait) *samples = (c + *wait) << 3;
1299 }
1300
1301
1302 //-----------------------------------------------------------------------------
1303 // Prepare iClass reader command to send to FPGA
1304 //-----------------------------------------------------------------------------
1305 void CodeIClassCommand(const uint8_t *cmd, int len) {
1306 int i, j, k;
1307
1308 ToSendReset();
1309
1310 // Start of Communication: 1 out of 4
1311 ToSend[++ToSendMax] = 0xf0;
1312 ToSend[++ToSendMax] = 0x00;
1313 ToSend[++ToSendMax] = 0x0f;
1314 ToSend[++ToSendMax] = 0x00;
1315
1316 // Modulate the bytes
1317 for (i = 0; i < len; i++) {
1318 uint8_t b = cmd[i];
1319 for (j = 0; j < 4; j++) {
1320 for (k = 0; k < 4; k++) {
1321 if (k == (b & 3)) {
1322 ToSend[++ToSendMax] = 0xf0;
1323 } else {
1324 ToSend[++ToSendMax] = 0x00;
1325 }
1326 }
1327 b >>= 2;
1328 }
1329 }
1330
1331 // End of Communication
1332 ToSend[++ToSendMax] = 0x00;
1333 ToSend[++ToSendMax] = 0x00;
1334 ToSend[++ToSendMax] = 0xf0;
1335 ToSend[++ToSendMax] = 0x00;
1336
1337 // Convert from last character reference to length
1338 ToSendMax++;
1339 }
1340
1341 static void ReaderTransmitIClass(uint8_t *frame, int len) {
1342 int wait = 0;
1343 int samples = 0;
1344
1345 // This is tied to other size changes
1346 CodeIClassCommand(frame, len);
1347
1348 // Select the card
1349 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1350 if (trigger)
1351 LED_A_ON();
1352
1353 // Store reader command in buffer
1354 uint8_t par[MAX_PARITY_SIZE];
1355 GetParity(frame, len, par);
1356 LogTrace(frame, len, rsamples, rsamples, par, true);
1357 }
1358
1359 //-----------------------------------------------------------------------------
1360 // Wait a certain time for tag response
1361 // If a response is captured return true
1362 // If it takes too long return false
1363 //-----------------------------------------------------------------------------
1364 static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) {
1365 //uint8_t *buffer
1366 // buffer needs to be 512 bytes
1367 int c;
1368
1369 // Set FPGA mode to "reader listen mode", no modulation (listen
1370 // only, since we are receiving, not transmitting).
1371 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1372
1373 // Now get the answer from the card
1374 Demod.output = receivedResponse;
1375 Demod.len = 0;
1376 Demod.state = DEMOD_UNSYNCD;
1377
1378 uint8_t b;
1379 if (elapsed) *elapsed = 0;
1380
1381 bool skip = false;
1382
1383 c = 0;
1384 for (;;) {
1385 WDT_HIT();
1386
1387 if (BUTTON_PRESS()) return false;
1388
1389 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1390 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1391 if (elapsed) (*elapsed)++;
1392 }
1393 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1394 if (c < timeout) {
1395 c++;
1396 } else {
1397 return false;
1398 }
1399 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1400 skip = !skip;
1401 if (skip) continue;
1402
1403 if (ManchesterDecoding(b & 0x0f)) {
1404 *samples = c << 3;
1405 return true;
1406 }
1407 }
1408 }
1409 }
1410
1411 static int ReaderReceiveIClass(uint8_t *receivedAnswer) {
1412 int samples = 0;
1413 if (!GetIClassAnswer(receivedAnswer, 160, &samples, 0)) {
1414 return false;
1415 }
1416 rsamples += samples;
1417 uint8_t parity[MAX_PARITY_SIZE];
1418 GetParity(receivedAnswer, Demod.len, parity);
1419 LogTrace(receivedAnswer, Demod.len, rsamples, rsamples, parity, false);
1420 if (samples == 0) return false;
1421 return Demod.len;
1422 }
1423
1424 static void setupIclassReader() {
1425 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1426 // Reset trace buffer
1427 set_tracing(true);
1428 clear_trace();
1429
1430 // Setup SSC
1431 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
1432 // Start from off (no field generated)
1433 // Signal field is off with the appropriate LED
1434 LED_D_OFF();
1435 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1436 SpinDelay(200);
1437
1438 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1439
1440 // Now give it time to spin up.
1441 // Signal field is on with the appropriate LED
1442 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1443 SpinDelay(200);
1444 LED_A_ON();
1445
1446 }
1447
1448 static bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries) {
1449 while (retries-- > 0) {
1450 ReaderTransmitIClass(command, cmdsize);
1451 if (expected_size == ReaderReceiveIClass(resp)) {
1452 return true;
1453 }
1454 }
1455 return false;//Error
1456 }
1457
1458 /**
1459 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1460 * @param card_data where the CSN and CC are stored for return
1461 * @return 0 = fail
1462 * 1 = Got CSN
1463 * 2 = Got CSN and CC
1464 */
1465 static uint8_t handshakeIclassTag_ext(uint8_t *card_data, bool use_credit_key) {
1466 static uint8_t act_all[] = { 0x0a };
1467 //static uint8_t identify[] = { 0x0c };
1468 static uint8_t identify[] = { 0x0c, 0x00, 0x73, 0x33 };
1469 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1470 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
1471 if (use_credit_key)
1472 readcheck_cc[0] = 0x18;
1473 else
1474 readcheck_cc[0] = 0x88;
1475
1476 uint8_t resp[ICLASS_BUFFER_SIZE];
1477
1478 uint8_t read_status = 0;
1479
1480 // Send act_all
1481 ReaderTransmitIClass(act_all, 1);
1482 // Card present?
1483 if (!ReaderReceiveIClass(resp)) return read_status;//Fail
1484 //Send Identify
1485 ReaderTransmitIClass(identify, 1);
1486 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1487 uint8_t len = ReaderReceiveIClass(resp);
1488 if (len != 10) return read_status;//Fail
1489
1490 //Copy the Anti-collision CSN to our select-packet
1491 memcpy(&select[1], resp, 8);
1492 //Select the card
1493 ReaderTransmitIClass(select, sizeof(select));
1494 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1495 len = ReaderReceiveIClass(resp);
1496 if (len != 10) return read_status;//Fail
1497
1498 //Success - level 1, we got CSN
1499 //Save CSN in response data
1500 memcpy(card_data, resp, 8);
1501
1502 //Flag that we got to at least stage 1, read CSN
1503 read_status = 1;
1504
1505 // Card selected, now read e-purse (cc) (only 8 bytes no CRC)
1506 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1507 if (ReaderReceiveIClass(resp) == 8) {
1508 //Save CC (e-purse) in response data
1509 memcpy(card_data+8, resp, 8);
1510 read_status++;
1511 }
1512
1513 return read_status;
1514 }
1515
1516 static uint8_t handshakeIclassTag(uint8_t *card_data) {
1517 return handshakeIclassTag_ext(card_data, false);
1518 }
1519
1520
1521 // Reader iClass Anticollission
1522 void ReaderIClass(uint8_t arg0) {
1523
1524 uint8_t card_data[6 * 8] = {0};
1525 memset(card_data, 0xFF, sizeof(card_data));
1526 uint8_t last_csn[8] = {0,0,0,0,0,0,0,0};
1527 uint8_t resp[ICLASS_BUFFER_SIZE];
1528 memset(resp, 0xFF, sizeof(resp));
1529 //Read conf block CRC(0x01) => 0xfa 0x22
1530 uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x01, 0xfa, 0x22};
1531 //Read App Issuer Area block CRC(0x05) => 0xde 0x64
1532 uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x05, 0xde, 0x64};
1533
1534 int read_status= 0;
1535 uint8_t result_status = 0;
1536 // flag to read until one tag is found successfully
1537 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1538 // flag to only try 5 times to find one tag then return
1539 bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY;
1540 // if neither abort_after_read nor try_once then continue reading until button pressed.
1541
1542 bool use_credit_key = arg0 & FLAG_ICLASS_READER_CEDITKEY;
1543 // test flags for what blocks to be sure to read
1544 uint8_t flagReadConfig = arg0 & FLAG_ICLASS_READER_CONF;
1545 uint8_t flagReadCC = arg0 & FLAG_ICLASS_READER_CC;
1546 uint8_t flagReadAA = arg0 & FLAG_ICLASS_READER_AA;
1547
1548 set_tracing(true);
1549 setupIclassReader();
1550
1551 uint16_t tryCnt = 0;
1552 bool userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1553 while (!userCancelled) {
1554 // if only looking for one card try 2 times if we missed it the first time
1555 if (try_once && tryCnt > 2) {
1556 break;
1557 }
1558 tryCnt++;
1559 if (!get_tracing()) {
1560 DbpString("Trace full");
1561 break;
1562 }
1563 WDT_HIT();
1564
1565 read_status = handshakeIclassTag_ext(card_data, use_credit_key);
1566
1567 if (read_status == 0) continue;
1568 if (read_status == 1) result_status = FLAG_ICLASS_READER_CSN;
1569 if (read_status == 2) result_status = FLAG_ICLASS_READER_CSN | FLAG_ICLASS_READER_CC;
1570
1571 // handshakeIclass returns CSN|CC, but the actual block
1572 // layout is CSN|CONFIG|CC, so here we reorder the data,
1573 // moving CC forward 8 bytes
1574 memcpy(card_data+16, card_data+8, 8);
1575 //Read block 1, config
1576 if (flagReadConfig) {
1577 if (sendCmdGetResponseWithRetries(readConf, sizeof(readConf), resp, 10, 10)) {
1578 result_status |= FLAG_ICLASS_READER_CONF;
1579 memcpy(card_data+8, resp, 8);
1580 } else {
1581 Dbprintf("Failed to dump config block");
1582 }
1583 }
1584
1585 //Read block 5, AA
1586 if (flagReadAA) {
1587 if (sendCmdGetResponseWithRetries(readAA, sizeof(readAA), resp, 10, 10)) {
1588 result_status |= FLAG_ICLASS_READER_AA;
1589 memcpy(card_data + (8*5), resp, 8);
1590 } else {
1591 //Dbprintf("Failed to dump AA block");
1592 }
1593 }
1594
1595 // 0 : CSN
1596 // 1 : Configuration
1597 // 2 : e-purse
1598 // 3 : kd / debit / aa2 (write-only)
1599 // 4 : kc / credit / aa1 (write-only)
1600 // 5 : AIA, Application issuer area
1601 //Then we can 'ship' back the 6 * 8 bytes of data,
1602 // with 0xFF:s in block 3 and 4.
1603
1604 LED_B_ON();
1605 //Send back to client, but don't bother if we already sent this -
1606 // only useful if looping in arm (not try_once && not abort_after_read)
1607 if (memcmp(last_csn, card_data, 8) != 0) {
1608 // If caller requires that we get Conf, CC, AA, continue until we got it
1609 if ( (result_status ^ FLAG_ICLASS_READER_CSN ^ flagReadConfig ^ flagReadCC ^ flagReadAA) == 0) {
1610 cmd_send(CMD_ACK, result_status, 0, 0, card_data, sizeof(card_data));
1611 if (abort_after_read) {
1612 LED_A_OFF();
1613 LED_B_OFF();
1614 return;
1615 }
1616 //Save that we already sent this....
1617 memcpy(last_csn, card_data, 8);
1618 }
1619
1620 }
1621 LED_B_OFF();
1622 userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1623 }
1624 if (userCancelled) {
1625 cmd_send(CMD_ACK, 0xFF, 0, 0, card_data, 0);
1626 } else {
1627 cmd_send(CMD_ACK, 0, 0, 0, card_data, 0);
1628 }
1629 LED_A_OFF();
1630 }
1631
1632 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1633
1634 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1635 uint16_t block_crc_LUT[255] = {0};
1636
1637 //Generate a lookup table for block crc
1638 for (int block = 0; block < 255; block++){
1639 char bl = block;
1640 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1641 }
1642 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1643
1644 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1645 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1646
1647 uint16_t crc = 0;
1648 uint8_t cardsize = 0;
1649 uint8_t mem = 0;
1650
1651 static struct memory_t {
1652 int k16;
1653 int book;
1654 int k2;
1655 int lockauth;
1656 int keyaccess;
1657 } memory;
1658
1659 uint8_t resp[ICLASS_BUFFER_SIZE];
1660
1661 setupIclassReader();
1662 set_tracing(true);
1663
1664 while (!BUTTON_PRESS()) {
1665
1666 WDT_HIT();
1667
1668 if (!get_tracing()) {
1669 DbpString("Trace full");
1670 break;
1671 }
1672
1673 uint8_t read_status = handshakeIclassTag(card_data);
1674 if (read_status < 2) continue;
1675
1676 //for now replay captured auth (as cc not updated)
1677 memcpy(check+5, MAC, 4);
1678
1679 if (!sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 5)) {
1680 Dbprintf("Error: Authentication Fail!");
1681 continue;
1682 }
1683
1684 //first get configuration block (block 1)
1685 crc = block_crc_LUT[1];
1686 read[1] = 1;
1687 read[2] = crc >> 8;
1688 read[3] = crc & 0xff;
1689
1690 if (!sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10)) {
1691 Dbprintf("Dump config (block 1) failed");
1692 continue;
1693 }
1694
1695 mem = resp[5];
1696 memory.k16 = (mem & 0x80);
1697 memory.book = (mem & 0x20);
1698 memory.k2 = (mem & 0x8);
1699 memory.lockauth = (mem & 0x2);
1700 memory.keyaccess = (mem & 0x1);
1701
1702 cardsize = memory.k16 ? 255 : 32;
1703 WDT_HIT();
1704 //Set card_data to all zeroes, we'll fill it with data
1705 memset(card_data, 0x0, USB_CMD_DATA_SIZE);
1706 uint8_t failedRead = 0;
1707 uint32_t stored_data_length = 0;
1708 //then loop around remaining blocks
1709 for (int block = 0; block < cardsize; block++) {
1710 read[1] = block;
1711 crc = block_crc_LUT[block];
1712 read[2] = crc >> 8;
1713 read[3] = crc & 0xff;
1714
1715 if (sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10)) {
1716 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1717 block, resp[0], resp[1], resp[2],
1718 resp[3], resp[4], resp[5],
1719 resp[6], resp[7]);
1720
1721 //Fill up the buffer
1722 memcpy(card_data+stored_data_length, resp, 8);
1723 stored_data_length += 8;
1724 if (stored_data_length +8 > USB_CMD_DATA_SIZE) {
1725 //Time to send this off and start afresh
1726 cmd_send(CMD_ACK,
1727 stored_data_length,//data length
1728 failedRead,//Failed blocks?
1729 0,//Not used ATM
1730 card_data, stored_data_length);
1731 //reset
1732 stored_data_length = 0;
1733 failedRead = 0;
1734 }
1735
1736 } else {
1737 failedRead = 1;
1738 stored_data_length += 8;//Otherwise, data becomes misaligned
1739 Dbprintf("Failed to dump block %d", block);
1740 }
1741 }
1742
1743 //Send off any remaining data
1744 if (stored_data_length > 0) {
1745 cmd_send(CMD_ACK,
1746 stored_data_length,//data length
1747 failedRead,//Failed blocks?
1748 0,//Not used ATM
1749 card_data,
1750 stored_data_length);
1751 }
1752 //If we got here, let's break
1753 break;
1754 }
1755 //Signal end of transmission
1756 cmd_send(CMD_ACK,
1757 0,//data length
1758 0,//Failed blocks?
1759 0,//Not used ATM
1760 card_data,
1761 0);
1762
1763 LED_A_OFF();
1764 }
1765
1766 void iClass_ReadCheck(uint8_t blockNo, uint8_t keyType) {
1767 uint8_t readcheck[] = { keyType, blockNo };
1768 uint8_t resp[] = {0,0,0,0,0,0,0,0};
1769 size_t isOK = 0;
1770 isOK = sendCmdGetResponseWithRetries(readcheck, sizeof(readcheck), resp, sizeof(resp), 6);
1771 cmd_send(CMD_ACK,isOK, 0, 0, 0, 0);
1772 }
1773
1774 void iClass_Authentication(uint8_t *MAC) {
1775 uint8_t check[] = { ICLASS_CMD_CHECK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1776 uint8_t resp[ICLASS_BUFFER_SIZE];
1777 memcpy(check+5, MAC, 4);
1778 bool isOK;
1779 isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 6);
1780 cmd_send(CMD_ACK,isOK, 0, 0, 0, 0);
1781 }
1782
1783 bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) {
1784 uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1785 char bl = blockNo;
1786 uint16_t rdCrc = iclass_crc16(&bl, 1);
1787 readcmd[2] = rdCrc >> 8;
1788 readcmd[3] = rdCrc & 0xff;
1789 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1790 bool isOK = false;
1791
1792 //readcmd[1] = blockNo;
1793 isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, 10, 10);
1794 memcpy(readdata, resp, sizeof(resp));
1795
1796 return isOK;
1797 }
1798
1799 void iClass_ReadBlk(uint8_t blockno) {
1800 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1801 bool isOK = false;
1802 isOK = iClass_ReadBlock(blockno, readblockdata);
1803 cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8);
1804 }
1805
1806 void iClass_Dump(uint8_t blockno, uint8_t numblks) {
1807 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1808 bool isOK = false;
1809 uint8_t blkCnt = 0;
1810
1811 BigBuf_free();
1812 uint8_t *dataout = BigBuf_malloc(255*8);
1813 if (dataout == NULL) {
1814 Dbprintf("out of memory");
1815 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1816 LED_D_OFF();
1817 cmd_send(CMD_ACK, 0, 1, 0, 0, 0);
1818 LED_A_OFF();
1819 return;
1820 }
1821 memset(dataout, 0xFF, 255*8);
1822
1823 for ( ; blkCnt < numblks; blkCnt++) {
1824 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1825 if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again
1826 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1827 if (!isOK) {
1828 Dbprintf("Block %02X failed to read", blkCnt+blockno);
1829 break;
1830 }
1831 }
1832 memcpy(dataout + (blkCnt*8), readblockdata, 8);
1833 }
1834 //return pointer to dump memory in arg3
1835 cmd_send(CMD_ACK, isOK, blkCnt, BigBuf_max_traceLen(), 0, 0);
1836 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1837 LEDsoff();
1838 BigBuf_free();
1839 }
1840
1841 static bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) {
1842 uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1843 //uint8_t readblockdata[10];
1844 //write[1] = blockNo;
1845 memcpy(write+2, data, 12); // data + mac
1846 char *wrCmd = (char *)(write+1);
1847 uint16_t wrCrc = iclass_crc16(wrCmd, 13);
1848 write[14] = wrCrc >> 8;
1849 write[15] = wrCrc & 0xff;
1850 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1851 bool isOK = false;
1852
1853 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10);
1854 if (isOK) { //if reader responded correctly
1855 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
1856 if (memcmp(write+2, resp, 8)) { //if response is not equal to write values
1857 if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
1858 //error try again
1859 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10);
1860 }
1861 }
1862 }
1863 return isOK;
1864 }
1865
1866 void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) {
1867 bool isOK = iClass_WriteBlock_ext(blockNo, data);
1868 if (isOK){
1869 Dbprintf("Write block [%02x] successful", blockNo);
1870 } else {
1871 Dbprintf("Write block [%02x] failed", blockNo);
1872 }
1873 cmd_send(CMD_ACK, isOK, 0, 0, 0, 0);
1874 }
1875
1876 void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) {
1877 int i;
1878 int written = 0;
1879 int total_block = (endblock - startblock) + 1;
1880 for (i = 0; i < total_block; i++) {
1881 // block number
1882 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1883 Dbprintf("Write block [%02x] successful", i + startblock);
1884 written++;
1885 } else {
1886 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1887 Dbprintf("Write block [%02x] successful", i + startblock);
1888 written++;
1889 } else {
1890 Dbprintf("Write block [%02x] failed", i + startblock);
1891 }
1892 }
1893 }
1894 if (written == total_block)
1895 Dbprintf("Clone complete");
1896 else
1897 Dbprintf("Clone incomplete");
1898
1899 cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
1900 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1901 LEDsoff();
1902 }
Impressum, Datenschutz