]> cvs.zerfleddert.de Git - proxmark3-svn/blob - fpga/xst_hf.scr
fix 'hf iclass sim':
[proxmark3-svn] / fpga / xst_hf.scr
1 run -ifn fpga_hf.v -ifmt Verilog -ofn fpga_hf.ngc -ofmt NGC -p xc2s30-5-vq100 -top fpga_hf -opt_mode area -opt_level 2 -resource_sharing yes -fsm_style bram -fsm_encoding compact
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